| Commit message (Collapse) | Author | Age | Lines |
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Commit 3b8ac464 "FPGA: add support for downloading Lattice bitstream"
added support for Lattice devices, but failed to add #ifdef's that are
needed when building for non-Lattice devices, which results in build
failures like these:
Configuring for GEN860T board...
drivers/fpga/libfpga.a(fpga.o): In function `fpga_dev_info':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:145: undefined reference to `lattice_info'
drivers/fpga/libfpga.a(fpga.o): In function `fpga_dump':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:269: undefined reference to `lattice_dump'
drivers/fpga/libfpga.a(fpga.o): In function `fpga_load':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:233: undefined reference to `lattice_load'
make: *** [u-boot] Error 1
Add the missing code.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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This patch fixes the LINUX_BOOT_PARAM_ADDR define to be based off of
PHYS_SDRAM_1 instead of CONFIG_SYS_MEMTEST_START. On da830 they are the same
thing but on da850 the CONFIG_SYS_MEMSTART define is offset from the
PHYS_SDRAM_1 start.
Without this patch it is not possible to boot linux on da850 -- bootm hangs
at "Uncompressing Linux... done, booting the kernel."
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The current da850evm support in u-boot/master omits any use of
the davinci EMAC. This patch adds basic support for the EMAC using
the MII PHY found on the baseboard of the EVM. The MAC address is
read from the environment variable 'ethadd'. Note that this is
different from the da850evm support in the u-boot omapl1 tree
where the MAC address is read from SPI flash.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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This patch enables also the mtdpart, ubi and ubifs commands when NAND support
is enabled.
Signed-off-by: Ben Gardiner<bengardiner@nanometrics.ca>
To: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The current da850evm config is missing the pieces for NAND support that can be
found in Sandeep's u-boot-davinci tree [1].
This patch adds NAND support in the spirit of the support in the u-boot-davinci
tree where NAND support for the da850evm can be enabled by putting a single
'#define CONFIG_USE_NAND' at the top of the include/configs/da850evm.h file.
[1] http://arago-project.org/git/people/?p=sandeep/u-boot-davinci.git;a=tree
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The default NAND flash timings are very conservative. This patch assigns the
timings reccomended in the recent linux kernel patch [1] from Sekhar Nori. The
speedup, as reported in that patch, is 5.3x for reads.
[1] http://www.spinics.net/lists/arm-kernel/msg100278.html
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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There is currently no NAND pinmux enabled by the da850evm board setup code.
This is fine when booting from NAND since the early boot code (UBL) will setup
the pinmux; however, when the boot mode is any other setting NAND is unusable
when enabled in the config.
This patch adds a pinmux list for NAND and enables it when NAND is enabled in
the config. Tested by booting from SPI on the da850evm and verifying NAND
was usable.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The ECC calculations were started by writing 1 << 13 to the nand FCR register;
that value is also defined as DAVINCI_NANDFCR_4BIT_CALC_START in emif_defs.h.
This patch substitutes the macro DAVINCI_NANDFCR_4BIT_CALC_START for the
magic number '1 << 13'.
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The IGEP module is a low-power, high performance production-ready
system-on-module (SOM) based on TI's OMAP3 family.The IGEP module
solution based upon TI OMAP3 provides a low-power/low-cost platform
for a variety of consumer/industrial/medical devices.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The IGEP v2 board is a low-cost, fan-less and industrial temperature
range single board computer that unleashes laptop-like performance and
expandability without the bulk, expense, or noise of typical desktop
machines. Its architecture shares much in common with other OMAP3 boards.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Steve Sakoman <steve.sakoman@linaro.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Introduce Numonyx DDR timings and provide CONFIG_OMAP3_NUMONYX_DDR
config options to allow for platform files to setup their timings.
Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Steve Sakoman <steve.sakoman@linaro.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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This patch fixes the build breakage introduced by the recent relocation
changes for ARMV7
Signed-off-by: Steve Sakoman <steve@sakoman.com>
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This patch fixes a typo in the routine to calculate the cs offset
based upon the contents of the SDRC cs_cfg register. This function
mistakenly shifts the CS1STARTLOW field 17 bits right instead of
17 bits left.
This hasn't been an issue to date because all OMAP3 boards currently
are configured to have zeros in this field.
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
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Signed-off-by: Steve Sakoman <steve@sakoman.com>
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This patch fixes the build breakage introduced by the recent relocation
changes for ARMV7
Signed-off-by: Steve Sakoman <steve@sakoman.com>
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The SDP4430 does not have onboard NAND, it has eMMC on the second
MMC slot. This patch adds support for saving the u-boot environment
to eMMC.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
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This patch switches from the legacy mmc driver to the new generic mmc driver
Signed-off-by: Steve Sakoman <steve@sakoman.com>
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This patch switches from the legacy mmc driver to the new generic mmc driver
Signed-off-by: Steve Sakoman <steve@sakoman.com>
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This patch switches from the legacy mmc driver to the new generic mmc driver
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
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This patch switches from the legacy mmc driver to the new generic mmc driver
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
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OMAP boards currently use a legacy mmc driver. This patch adds a new
mmc driver which will work with the generic mmc driver in u-boot.
This new driver will work with both OMAP3 and OMAP4 boards.
This patch does not remove the old driver. It should remain in the
tree until all boards that use it switch to the new driver.
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
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The current mmc driver returns erroneous capacity information for
eMMC. The capacity of eMMC devices is available only in the ext-CSD
register. This patch add code to read the ext-CDSD register and
correctly calculate eMMC capacity.
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Acked-by: Steve Sakoman <steve@sakoman.com>
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TI hasn't reserved a USB Product ID for gadgets, so use the default
vendor and product ID to avoid confusion.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
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Signed-off-by: Loic Minier <loic.minier@linaro.org>
CC: stefano babic <sbabic@denx.de>
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Signed-off-by: Stefano Babic <sbabic@denx.de>
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The patch adds the EHCI controller for the i.MX31 Soc.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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The patch adds a utility function and defines
to set the pad as it is done in linux.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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The patch adds the possibility to update the QONG
FPGA (a Lattice XP2-5E) with u-boot using some GPIOs
to drive the JTAG interface.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Stefano Babic <sbabic@denx.de>
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The patch adds support to load a Lattice's bitstream
image (called VME file) into a Lattice FPGA. The code
containing the state machine delivered as part of
Lattice's ispVMtools is integrated.
The FPGA is programmed using the JTAG interface. The
board maintainer must provide accessors to drive the
JTAG signals TCK, TMS, TDI and to get the value of the
input signal TDO.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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The crash was occuring in env_relocate because it was being called prior
to mmc_initialize. This patch moves the MMC initialization earlier in
the init process.
This patch also cleans up the env_relocate_spec code in env_mmc.c
Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
Acked-by: Stefano Babic <sbabic@denx.de>
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We cannot rely on the syscontrol rom func to program PLL_DIV with anomaly
05000440 is in effect, so manually program the MMR when necessary.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The env change its implementation after this log, while env mmc
didn't change it immediately, which cause issue. Follow to the
new style to fix it.
commit ea882baf9c17cd142c99e3ff640d3ab01daa5cec
Author: Wolfgang Denk <wd@denx.de>
Date: Sun Jun 20 23:33:59 2010 +0200
New implementation for internal handling of environment variables.
Signed-off-by: Lei Wen <leiwen@marvell.com>
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Call watchdog_reset() upon newline. This is done here in putc
since the environment code uses a single puts() to print the complete
envrironment upon "printenv". So we can't put this watchdog call
in puts().
This is needed for boards with a very short watchdog timeout, like the
lwmon5 with a 100ms timeout. Without this patch this board resets in the
commands with long outputs, like "printenv" or "fdt print".
Note that the image size is not increased with this patch when
CONFIG_HW_WATCHDOG or CONFIG_WATCHDOG are not defined since the compiler
optimizes this additional code away.
Signed-off-by: Stefan Roese <sr@denx.de>
Fix typo in comment.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Only a few PPC boards actually use the common BAT manipulation
functions, so only compile it for them.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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Originally the Makefile defines CONFIG_ADS5121_REV2 when configuring
for board mpc5121ads_rev2. The config in include/configs/mpc5121ads.h
expects a define CONFIG_MPC5121ADS_REV2 for this.
Therefore there are two defines used but only 1 is defined.
This patch renames references to CONFIG_ADS5121_REV2 to CONFIG_MPC5121ADS_REV2
to have one common define.
This patch fixes faulty mem size detection caused by wrong config in
include/configs/mpc5121ads.h
Signed-off-by: Mark Vels <mark.vels@team-embedded.nl>
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This patch fixes an error when running MAKEALL for ARM9.
On OS X /bin/sh uses builtin echo which does not utilise '-n' switch.
GNU manual for builtins recomend to use here-document style to solve
this portability issue.
This patch removes the usage of 'echo -n' and replace by here-document
style or a oneline echo command.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
CC: Peter Pearse <peter.pearse@arm.com>
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The pl01x serial driver was lacking the code to switch baudrates from the
command line. Fixed by simply saving the new baudrate and calling
serial_init() again. Also fixed CamelCase variables, I/O accessors and
comment style.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
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Adds support for the ARM quad-core Cortex-A9 processor
This system includes a motherboard(Versatile Express), daughterboard
(Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet,
and flash systems work with these additions. The naming convention
is:
SOC -> CortexA9 quad core = ca9x4
daughterboard -> Coretile = ct
motherboard -> Versatile Express = vxp
This gives ca9x4_ct_vxp.c as the board support file.
Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
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Merge several sizes.h in asm/arch subdirectories into a single
asm/sizes.h file.
Fixup usage of asm/arch/sizes.h in some files to use the merged file.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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All Kirkwood based boards are supported for this new implementation
ref: docs/README.arm-relocation
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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It is observed that, in most of the board configs the code is being
duplicated, also for any common change all board files needs update
This issue was under discussion from long on mailing list and we
converge on introducing common config file.
With this patch-
1. Total Kirkwood specific configuration code is reduced by 210 lines
2. All common configuration can be shared by multiple boards
3. Easy to manage common updates like ARM relocation changes
mv-common.h file is added to include/configs/
It contains all common configuration supported for all Kirkwood boards
The respective board configs are updated for its usage
Build tested for guruplug, mv88f6281gtw_ge, openrd_base,
rd6281a and sheevaplug
Binary execution tested for sheevaplug
Todo:
1. Other custom Kirkwood boards to be synced
2. The support to be extended for Orion5X based boards
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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For all Kirkwood boards so far dram_init function is duplicated
dram_init function is moved to dram.c and relevant code from all
board specific files removed
If any board needs specific dram init handling than standard one,
then, a macro CONFIG_SYS_BOARD_DRAM_INIT should be defined in
board config header file and the dram_init function can be put
in board specific source file
For ex. keymile boards
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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Signed-off-by: Chris Moore <moore@free.fr>
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
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Earlier Device Identification register was used to detect
the type for SoC, considering 88F6282 support to be added,
It is not possible to detect the same using current
algorithm.
With this patch, device ID is being read using PCIE devid
register, also valid chip revision ID will also be read and
displayed
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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