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* MX5: added CONFIG_PMIC_FSL_MC13892 to mx53evkStefano Babic2012-10-26-0/+1
| | | | | | | | Recent patches adding FSL_PMIC_I2C_LENGTH require that the PMIC model is defined. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Jason Liu <jason.hui@linaro.org>
* mx6qsabre_common: Allow booting a zImage kernelFabio Estevam2012-10-26-0/+1
| | | | | | Allow booting a zImage kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx35pdk: Allow booting a zImage kernelFabio Estevam2012-10-26-0/+1
| | | | | | Allow booting a zImage kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx51evk: Allow booting a zImage kernelFabio Estevam2012-10-26-1/+1
| | | | | | Allow booting a zImage kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx25pdk: Allow booting a zImage kernelFabio Estevam2012-10-26-0/+1
| | | | | | Allow booting a zImage kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx53loco: Allow booting a zImage kernelFabio Estevam2012-10-26-0/+1
| | | | | | Allow booting a zImage kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx25pdk: Add Ethernet supportFabio Estevam2012-10-26-0/+83
| | | | | | | | | | | mx25pdk has a Ethernet port that is connected to its internal FEC controller. In order to power up the Ethernet PHY (DP83640) it is necessary to communicate with the MC34704 PMIC via I2C. Make the FEC ethernet port functional Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* pmic: Add support for mc34704Fabio Estevam2012-10-26-0/+51
| | | | | | Add the register layout for the MC34704 PMIC from Freescale. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx25: Place common functions into sys_proto.hFabio Estevam2012-10-26-4/+4
| | | | | | | | imx-regs.h is meant to contain SoC register definitions. Common SoC funtions should go to sys_proto.h instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* pmic_fsl: Introduce FSL_PMIC_I2C_LENGTHFabio Estevam2012-10-26-1/+7
| | | | | | | | | | | | | Introduce FSL_PMIC_I2C_LENGTH to configure the number of bytes that are used to communicate with the PMIC via I2C. Instead of hardcoding the value, pass the number via a configurable option per PMIC type. This will be useful for adding support for PMIC MC34704 from Freescale, which uses only one byte in its I2C protocol. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx25pdk: Add esdhc supportFabio Estevam2012-10-26-1/+68
| | | | | | | | mx25pdk has a SD/MMC slot connected to esdhc1. Add support for it and allow the environment variables to be saved into SD/MMC. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx25pdk: Include CONFIG_MX25Fabio Estevam2012-10-26-0/+1
| | | | | | | It is necessary to include CONFIG_MX25 as several i.mx drivers handle the SoC differences based on the this config option. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX35: add support for woodburn boardStefano Babic2012-10-26-0/+896
| | | | | | | | | | | | | | | | | | | | | The woodburn board is based on the MX35 SOC. Support for both external (NOR) and internal (SD Card) boot mode are added. It uses the generic SPL framework to implement the internal boot mode. The following peripherals are supported: - Ethernet (FEC) - SD Card - NAND (512 MB) - NOR Flash In the internal boot mode, a simple imximage header is generated to set the address in internal RAM where the SOC must copy the SPL code. The initial setup is then demanded to the SPL itself. Signed-off-by: Stefano Babic <sbabic@denx.de>
* ARM: Add SPL target to arm1136Stefano Babic2012-10-26-0/+4
| | | | | | | | The patch adds SPL for the arm1136 architecture and inserts SPL (the produced binary) to clobber target in the main Makefile. Signed-off-by: Stefano Babic <sbabic@denx.de>
* SPL: Added SPL target for mx35 SOC to SPL MakefileStefano Babic2012-10-26-0/+6
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX35: Add soc_boot_mode and soc_boot_device to MX35Stefano Babic2012-10-26-0/+206
| | | | | | | The functions are required to use the generic SPL Framework. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX35: add LOW_LEVEL_SRAM_STACK to use SPL_FRAMEWORKStefano Babic2012-10-26-0/+2
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* ARM: Fix start.S when used with SPL in arm1136Stefano Babic2012-10-26-11/+24
| | | | | | | | This patch modifies start.S for the arm1136 to make it conform to start.S in armv7 architecture, to make it usable if the SPL framework is used. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX5: fix warning in clock.cStefano Babic2012-10-26-1/+1
| | | | | | | | | | Patch fix warnings compiling with ELDK-4.2: clock.c: In function 'get_standard_pll_sel_clk': clock.c:341: warning: 'freq' may be used uninitialized in this function Reported-by : Marek Vasut <marex@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de>
* imximage: make set_imx_hdr_v1/v2 easier to readTroy Kisky2012-10-20-19/+11
| | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* imximage: change parameters to set_imx_hdrTroy Kisky2012-10-20-15/+11
| | | | | | | Call with the value the function will use instead of going through a pointer. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* imximage: delay setting of image sizeTroy Kisky2012-10-20-6/+6
| | | | | | | | When later we change to variable length header, we won't know the file size when set_imx_hdr is called. So this is prep work. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* imximage: fix size of image to load.Troy Kisky2012-10-20-4/+2
| | | | | | | sbuf->st_size already includes sizeof(struct imx_header), so remove extra addition. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* imximage: move flash_offset check to common locationTroy Kisky2012-10-20-14/+5
| | | | | | | | Both set_imx_hdr_v1 and set_imx_hdr_v2 perform the same check. Move check to before the set_imx_hdr call. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
* imximage: remove redundant setting of app_dest_ptrTroy Kisky2012-10-20-1/+0
| | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
* imximage: check dcd_len as entries addedTroy Kisky2012-10-20-15/+11
| | | | | | | Before the len was checked after the entire file was processed, so it could have already overflowed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mx6qarm2: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFERFabio Estevam2012-10-20-2/+1
| | | | | | Data cache and CONFIG_MMC_BOUNCE_BUFFER can be safely enabled now. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6qsabre_common: Enable DCACHE and CONFIG_MMC_BOUNCE_BUFFERFabio Estevam2012-10-20-2/+1
| | | | | | Data cache and CONFIG_MMC_BOUNCE_BUFFER can be safely enabled now. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx25pdk: Use internal RAM for stack pointerFabio Estevam2012-10-20-2/+9
| | | | | | Use internal RAM for stack pointer as it is done in other i.MX boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx5: Add workaround for ARM erratum ID 468414Fabio Estevam2012-10-17-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add the software workaround for ARM erratum ID 468414. According to mx53/mx51 errata document: "ENGcm11133 - ARM: NEON load data can be incorrectly forwarded to a subsequent request Description: Under very specific set of conditions, data from a Neon load request can be incorrectly forwarded to a subsequent, unrelated memory request. The conditions are as follows: • Neon loads and stores must be in use • Neon L1 caching must be disabled • Trustzone must be configured and in use • The secure memory address space and the non-secure memory address space both use the same physical addresses, either as an alias or the same memory location or for separate memory locations The issue is reported by ARM, erratum ID 468414, Category 2" Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6qsabrelite: enable DCache and MMC bounce bufferDirk Behme2012-10-17-2/+1
| | | | | | | | | The recent U-Boot version 2012.07 has improved drivers (e.g. MMC and network/FEC) regarding DCache handling. So it should be safe to use the DCache on the i.MX6, now. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de>
* configs: mx53evk: Remove CONFIG_HAS_ETH1Fabio Estevam2012-10-17-1/+0
| | | | | | mx53evk has only one Ethernet port, so remove CONFIG_HAS_ETH1 option. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* configs: mx51evk: Remove CONFIG_HAS_ETH1Fabio Estevam2012-10-17-1/+0
| | | | | | mx51evk has only one Ethernet port, so remove CONFIG_HAS_ETH1 option. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* configs: mx53loco: Remove CONFIG_HAS_ETH1Fabio Estevam2012-10-17-1/+0
| | | | | | mx53loco has only one Ethernet port, so remove CONFIG_HAS_ETH1 option. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx53loco: Adapt the IPU clockFabio Estevam2012-10-17-1/+1
| | | | | | | Since PLL2 now has changed, it is necessary to adapt the CONFIG_IPUV3_CLK accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx5: lowlevel_init.S: Fix PLL settings for mx53Fabio Estevam2012-10-17-33/+67
| | | | | | | | | | | | | | | | | | Currently PLL2 is not explicitely configured for mx53 and it runs at 333MHz. Since PLL2 is the parent clock for DDR2, IPU, VPU, we should set it at 400MHz instead. Without doing so, it is not possible to use a 2.6.35 FSL kernel and display HDMI at 1080p because the IPU clock cannot reach the requested frequency. Set PLL2 to 400MHz, so that 1080p can be played and the DDR2 can run at its maximum frequency. Also, setup the other PLL's as done in FSL U-boot and re-arrange the code a little bit to allow easier comparison with the original clock setup from FSL U-boot. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx5: lowlevel_init.S: Split init_clock macroFabio Estevam2012-10-17-30/+65
| | | | | | | | | | | init_clock is currently shared between mx51 and mx53 and it contains lots of ifdef's which makes it really hard to follow the code. Split the init_clock between mx51 and mx53 to allow easier readability. No functional changes are made. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx25: Clean up imx-regs.hBenoît Thébaudeau2012-10-16-3/+3
| | | | | | | | | | Clean up i.MX25 imx-regs.h: - Update mx31 imx-regs.h filename. - Test for __KERNEL_STRICT_NAMES just in case. - Define internal RAM size. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* i.MX6: mx6qsabrelite: Add splash screen supportEric Nelson2012-10-16-1/+343
| | | | | | | | | | | | | | | | | | | | | Adds support for HDMI, two LVDS panels and one RGB panel to the SABRE-Lite board. Displays supported: HDMI - 1024 x 768 for maximum compatibility Hannstar-XGA - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1) wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600) wvga-rgb - 800 x 480 RGB (Boundary p/n Nit6X_800x480) Since the ipuv3_fb display driver currently supports only a single display, this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect or the I2C touch controller of the LVDS and RGB displays in the priority listed above. Setting 'panel' environment variable to one of the names above will override auto-detection. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* i.MX6: add HDMI transmitter register declarations from kernel WIP.Eric Nelson2012-10-16-0/+1053
| | | | | | | | Original source from Pengutronix HDMI driver work: http://git.pengutronix.de/?p=imx/linux-2.6.git;a=commitdiff;h=72c31cd67ac880bd90785af86f8e46f8ea7b3bb0 Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* i.MX6: set drive strength for parallel RGB padsEric Nelson2012-10-16-29/+29
| | | | | | Default drive strength is disabled and won't function. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* i.MX: ipufb: add const to fb_videomode declarationsEric Nelson2012-10-16-3/+3
| | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* i.MX video: struct fb_videomode can be constEric Nelson2012-10-16-4/+8
| | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* i.MX: declare iomux_v3_cfg_t arrays as constEric Nelson2012-10-16-27/+27
| | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* i.MX: iomux: input pad array can be constEric Nelson2012-10-16-3/+5
| | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Stefano Babic <sbabic@denx.de>
* mx6qsabreauto: Pass the board revision to the kernelFabio Estevam2012-10-16-2/+52
| | | | | | | | | | | The kernel from Freescale expects that the bootloader passes the board revision. Read the board revision and pass it via get_board_rev(). Without passing the board revision the kernel does not operate properly as the initialization of peripherals are different in revA versus revB boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6qsabreauto: Change mmcroot so it works out of boxOtavio Salvador2012-10-16-2/+4
| | | | | | | | The mmcroot setting vary between mx6qsabreauto and mx6qsabresd so we move this to the board configuration file. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* mxc: Fix SDHC multi-instance clockBenoît Thébaudeau2012-10-16-2/+40
| | | | | | | | | | | | | | | | | | On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not suitable for the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). This patch fixes this issue by adding a configuration field for the SDHC input clock frequency. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jason Liu <r64343@freescale.com> Cc: Matt Sealey <matt@genesi-usa.com> Cc: Andy Fleming <afleming@gmail.com>
* mx35: Fix eSDHC clocksBenoît Thébaudeau2012-10-16-3/+15
| | | | | | | | | | | | | | Each eSDHC instance has a dedicated clock. gd->sdhc_clk must also be set accordingly. This is good for the case only a single SDHC instance is used (initialization made with fsl_esdhc_mmc_init()). A future patch will fix the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
* mx35: Clean up lowlevel_initBenoît Thébaudeau2012-10-16-279/+97
| | | | | | | | | | | | Clean up mx35 lowlevel_init: - Indent with tabs. - Fix comments. - Use defined values instead of literal constants. - Use defined macros instead of duplicating code. - Use macro parameters with default values instead of #define'd configs. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
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