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* mpc: iim: Switch to common fsl_iimBenoît Thébaudeau2013-04-28-399/+16
| | | | | | | Make all mpc512x code point to the new common fsl_iim driver, and remove the former mpc512x-specific iim driver. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* Add fsl_iim driverBenoît Thébaudeau2013-04-28-0/+340
| | | | | | Add a fsl_iim driver common to i.MX and MPC. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* Add fuse API and commandsBenoît Thébaudeau2013-04-28-0/+282
| | | | | | This can be useful for fuse-like hardware, OTP SoC options, etc. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* imx: Add useful fuse definitionsBenoît Thébaudeau2013-04-28-3/+61
| | | | | | Define the UID (SoC unique ID) fuses, and the fuses available for the user. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* imx: Homogenize and fix fuse register definitionsBenoît Thébaudeau2013-04-28-22/+38
| | | | | | | | | | | | | | | | | | IIM: - Homogenize prg_p naming (the reference manuals are not always self-consistent for that). - Add missing SCSx and bank registers. - Fix the number of banks on i.MX53. OCOTP: - Rename iim to ocotp in order to avoid confusion. - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the reference manual. - Merge the existing spinoff gp1 fuse definition on i.MX6. - Fix the number of banks on i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx23: Put back RAM voltage level to its original valueFabio Estevam2013-04-28-2/+2
| | | | | | | | | | commit 5c2f444c9 (mxs: Reset the EMI block on mx23) changed the DDR voltage level, which causes mx23evk to fail to load a kernel. Put back the original values, so that mx23evk can boot a kernel again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Robert Nelson <robertcnelson@gmail.com>
* mx53ard: Rework default environment to support FDT, MMC and netbootOtavio Salvador2013-04-26-23/+78
| | | | | | | | | This reworks the environment settings to be aligned with the other i.MX boards. The loadaddr has been changed to allow the Freescale kernel and mainline kernel to work without environment changes. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* mxs: mxsboot: Move sdcard BCB header to 4 sectors offsetOtavio Salvador2013-04-26-4/+4
| | | | | | | | | | | | | The MX23 Boot ROM does blindly load from 2048 offset while the MX28 does parse the BCB header to known where to load the image from. We move the BCB header to 4 sectors offset so same code can be used by both SoCs avoiding code duplication. This idea was given by Marek Vasut <marex@denx.de> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Marek Vasut <marex@denx.de>
* mx53ard: Move register masks into imx-regs.hFabio Estevam2013-04-25-2/+2
| | | | | | | imx-regs.h is more appropriate location for containing register masks. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* mx5: Select CONFIG_REVISION_TAGFabio Estevam2013-04-25-0/+3
| | | | | | | | | FSL 2.6.35 kernel expects that revision tag is passed by the bootloader. Select CONFIG_REVISION_TAG so that mx53 boards can work properly with 2.6.35. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* mx5: Define a common get_board_rev()Fabio Estevam2013-04-25-0/+7
| | | | | | | | | | When booting a FSL kernel based on 2.6.35 it is necessary to pass the revision tag to the kernel. Place a common weak function into soc.c for such purpose. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* mx51evk: Do not force the rootfs typeFabio Estevam2013-04-25-4/+2
| | | | | | | | | | Currently mmcrootfstype is set to ext3 type. It is better not to force it in the env vars, because users may prefer a different file system type, so let's get rid of 'mmcrootfstype'. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
* mx51evk: Update environment in order to allow booting a dt kernelFabio Estevam2013-04-25-3/+39
| | | | | | | | | | | | | | | | | | | | | Update the environment as done in other imx boards to allow easy switching between booting a non-dt kernel and a dt kernel. Change CONFIG_LOADADDR to 0x92000000, so that we can have the: - uImage at 0x92000000 - imx51-babbage.dtb at 0x91000000 ,which are adequate locations in RAM to avoid overlapping. Boot tested the following kernels: - 2.6.35 from FSL (11.09 branch) - 3.9-rc7 non-dt - 3.9-rc7 dt Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
* wandboard: Add boot selection supportOtavio Salvador2013-04-25-0/+21
| | | | | | | | Adds support for 'bmode' command which let user to choose where to boot from; this allows U-Boot to load system from another storage without messing with jumpers. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* wandboard: Add support for Carrier Board MicroSD cardOtavio Salvador2013-04-25-7/+60
| | | | | | | | Allow use of the carrier board MicroSD card available in the Wandboard; this allow for loading alternative system from the other card for testing or upgrade proposes. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* wandboard: Add card detection for SOM MicroSD cardOtavio Salvador2013-04-25-0/+19
| | | | | | | | This add support to identify if the card is connected or not; so it does not try to communicate with the controller if no card is available. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* wandboard: Add update_sd_firmware supportOtavio Salvador2013-04-25-0/+16
| | | | | | | This allow for easy update of firmware in the SD card from a running U-Boot. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* wandboard: Use env storage info for mmcdev/mmcpartOtavio Salvador2013-04-25-2/+3
| | | | | | | This makes environment and mmcdev/mmcpart in sync with SYS_MMC_ENV_DEV and SYS_MMC_ENV_PART settings. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mx6qsabresd: Return status when initializing MMCOtavio Salvador2013-04-25-6/+7
| | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mx6qsabre{sd, auto}: Add update_sd_firmware supportOtavio Salvador2013-04-25-0/+14
| | | | | | | This allow for easy update of firmware in the SD card from a running U-Boot. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* nitrogen6x: Setup CCM_CCOSR registerFabio Estevam2013-04-25-0/+12
| | | | | | | | | | | | CKO1 drives sgtl5000 codec clock on nitrogen boards and wandboard. Doing this setup in the bootloader will allow us to remove a lot of code in arch/arm/mach-imx/mach-imx6q.c from the mainline kernel. Also, according to Eric Nelson: "enabling the clock <in the bootloader> will remove squeal after an ungraceful reboot (watchdog) if hooked up to speakers." Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* imx: mx6q_4x_mt41j128.cfg: Setup CCM_CCOSR registerFabio Estevam2013-04-25-0/+11
| | | | | | | | | | | | | Setup CCM_CCOSR register to provide a CKO1 clock frequency of 16.5 MHz. CKO1 drives sgtl5000 codec clock on mx6qsabrelite and doing this setup in the bootloader will allow us to remove a lot of code in arch/arm/mach-imx/mach-imx6q.c from the mainline kernel. mx6q_4x_mt41j128.cfg is also used by mx6qsabresd, and it is safe to use it for this board as well. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx35 iomux: correct input select register indexPhilip Paeps2013-04-25-0/+1
| | | | | | | | Prior to this fix, calls to mxc_iomux_set_input() for registers after MUX_IN_GPIO2_IN_19 would write to the wrong registers, possibly resulting in unexpected behaviour. Signed-off-by: Philip Paeps <philip@paeps.cx>
* arm: imx: Codingstyle enhancement of include/asm/arch-mx6/crm_regs.hStefan Roese2013-04-25-86/+86
| | | | | | | | | Add spaces before and after "<<". Please note that I intentionally didn't wrap the > 80 lines for the sake of better readability. Signed-off-by: Stefan Roese <sr@denx.de>
* imx: Add titanium board support (i.MX6 based)Stefan Roese2013-04-22-2/+845
| | | | | | | | | | Titanium is a i.MX6 based board from ProjectionDesign / Barco. This patch adds support for this board with the newly introduced NAND support for i.MX6. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* mtd: mxs_nand: Add support for i.MX6Stefan Roese2013-04-22-2/+26
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* dma: Add i.MX6 support to drivers/dma/apbh_dma.cStefan Roese2013-04-22-2/+34
| | | | | | | | | This will be used by the i.MX6 NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* imx: Move some i.MX common functions into the imx-common directoryStefan Roese2013-04-22-64/+102
| | | | | | | | | | | | | | | | | | This patch moves the following functions into the imx-common directory: - mxs_wait_mask_set() - mxs_wait_mask_clr() - mxs_reset_block() These are currently used by i.MX28. But the upcoming GPMI NAND port for i.MX6 will also use these functions. So lets move them to a common location to re-use them. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* imx: Move some header files from arch-mxs to imx-commonStefan Roese2013-04-22-24/+27
| | | | | | | | | | | | | | | | | | | The following headers are moved to a i.MX common location: - regs-common.h - regs-apbh.h - regs-bch.h - regs-gpmi.h - dma.h This way this header can be re-used also by other i.MX platforms. For example the i.MX6 which will need it for the upcoming NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* mx6sl: Add initial support for mx6slevk boardFabio Estevam2013-04-22-0/+439
| | | | | | | | | | mx6slevk board is a development board from Freescale based on the mx6 solo-lite processor. For details about mx6slevk, please refer to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=IMX6SLEVK&parentCode=i.MX6SL&fpsp=1 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6: Add solo-lite variant supportFabio Estevam2013-04-22-3/+132
| | | | | | | | | mx6 solo-lite is another member of the mx6 series. For more information about mx6 solo-lite, please visit: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6SL&nodeId=018rH3ZrDRB24A Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* iomux-v3: Place pad control definitions into common fileFabio Estevam2013-04-22-55/+26
| | | | | | | Instead of having the same PAD control definition in each MX6 variant pin file, place it into a common location. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* Merge branch 'next'Stefano Babic2013-04-21-17/+11
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| * ARM: mx6: define CONFIG_ARM_ERRATA_742230Shawn Guo2013-04-17-0/+1
| | | | | | | | | | | | | | | | | | | | The ARM errata 742230 - "ARM errata: DMB operation may be faulty" is claimed for Cortex-A9 (r1p0..r2p2). Though i.MX6 uses a newer revision than r2p2, we are seeing a reboot failure on i.MX6 SMP build that can be fixed by applying the workaround for this errata. So for safety, let's define CONFIG_ARM_ERRATA_742230 to enable the workaround on i.MX6. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * arm: imx: Change iomux functions to void typeStefan Roese2013-04-16-15/+7
| | | | | | | | | | | | | | | | They never return anything also than 0, so lets change the function to void instead. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
| * mx28evk: add trimffs to nand commandEric Benard2013-04-16-0/+1
| | | | | | | | | | | | | | | | this is usefull when writing an UBI image which contains and UBIFS volume (check README.nand and UBI FAQ for more details) Signed-off-by: Eric Bénard <eric@eukrea.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * mx35 iomux: correct offsets of IOMUX registersPhilip Paeps2013-04-16-2/+2
| | | | | | | | | | | | | | | | | | | | This makes mxc_iomux_set_input() work correctly. Previously, the incorrect offset of IOMUXSW_INPUT_CTL caused mxc_iomux_set_input() to write to the wrong register, possibly resulting in unexpected behaviour. Signed-off-by: Philip Paeps <philip@paeps.cx> Acked-by: Stefano Babic <sbabic@denx.de>
* | exynos: fdt: Add TMU node for snowSimon Glass2013-04-17-0/+14
| | | | | | | | | | | | | | | | Snow is missing a TMU node, and with TMU support this is not allowed, so it fails to boot. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | exynos: Correct use of 64-bit divisionSimon Glass2013-04-17-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | The current code is causing errors like this on my toolchains: /usr/x86_64-pc-linux-gnu/armv7a-cros-linux-gnueabi/binutils-bin/2.22/ ld.bfd.real: failed to merge target specific data of file /usr/lib/gcc/ armv7a-cros-linux-gnueabi/4.7.x-google/libgcc.a(_divdi3.o) Use do_div() to avoid this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Exynos5: Add support for USB download boot modeVivek Gautam2013-04-17-2/+43
| | | | | | | | | | | | | | | | | | | | | | | | Exynos5250 supports secondary USB device boot mode. If the iROM fails to download u-boot from the primary boot device (such as SD or eMMC), it will try to retrieve from the secondary boot device (such as USB). Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Tegra: T30: Beaver board support.Tom Warren2013-04-15-0/+149
| | | | | | | | | | | | | | | | Beaver is a Tegra30 board that is nearly 100% compatible w/Cardhu. Add a Beaver build so it can begin to be differentiated, if need be. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Tegra: Split tegra_get_chip_type() into soc & sku funcsTom Warren2013-04-15-37/+84
| | | | | | | | | | | | | | | | | | | | | | As suggested by Stephen Warren, use tegra_get_chip() to return the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true function, i.e. tegra_get_chip_sku(), which returns an ID like TEGRA_SOC_T25, TEGRA_SOC_T33, etc. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Tegra: Fix MSELECT clock divisors for T30/T114.Tom Warren2013-04-15-8/+6
| | | | | | | | | | | | | | | | | | A comparison of registers between our internal NV U-Boot and u-boot-tegra/next showed some discrepancies in the MSELECT clock divisor programming. T20 doesn't have a MSELECT clk src reg. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Tegra114: Initialize System Counter (TSC) with osc frequencyTom Warren2013-04-15-0/+72
| | | | | | | | | | | | | | | | | | T114 needs the SYSCTR0 counter initialized so the TSC can be read by the kernel. Do it in the bootloader since it's a write-once deal (secure/non-secure mode dependent). Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Tegra: Configure L2 cache control reg properly.Tom Warren2013-04-15-8/+52
| | | | | | | | | | | | | | | | | | | | Without this change, kernel fails at calling function cache_clean_flush during kernel early boot. Aprocryphally, intended for T114 only, so I check for a T114 SoC. Works (i.e. dalmore 3.8 kernel now starts printing to console). Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Tegra: TEC: Enable boot script supportThierry Reding2013-04-15-7/+3
| | | | | | | | | | | | | | | | | | | | Boot script support brings TEC in line with other Tegra boards. To enable booting a Linux kernel with initial ramdisk, also include support for the new FIT image type. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Tegra: Plutux: Enable NAND and boot script supportThierry Reding2013-04-15-7/+11
| | | | | | | | | | | | | | | | | | | | Boot script support brings Plutux in line with other Tegra boards. In order to enable booting a Linux kernel with initial ramdisk, also add support for the new FIT image type. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Tegra: Medcom-Wide: Enable NAND and boot script supportThierry Reding2013-04-15-9/+12
| | | | | | | | | | | | | | | | | | | | Boot script support brings Medcom-Wide in line with other Tegra boards. In order to enable booting a Linux kernel with initial ramdisk, also add support for the new FIT image type. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Tegra: All Tamonten-derived boards use onboard NANDThierry Reding2013-04-15-11/+11
| | | | | | | | | | | | | | | | | | Move the nand-controller node to the tegra20-tamonten.dtsi so that it can be shared between all derived boards. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Tegra: Restore cp15 VBAR _start vector write for ARMv7Tom Warren2013-04-15-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | A start vector fix was added by AneeshV for OMAP4 (commit 0d479b53), and caused the old monilithic Tegra builds to hang due to an undefined instruction trap. Previously, the code needed to run on both the AVP (ARM7TDI) and A9, and the AVP doesn't have a CP15 register. I corrected this in commit 6d6c0bae w/#ifndef CONFIG_TEGRA, but now that we use SPL, and boot the AVP w/o any ARMv7 code, I can revert my change, and make Aneesh's change apply to Tegra. Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-12-19 01:56:48 +0000