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* Merge branch 'master' of git://git.denx.de/u-boot-nds32Wolfgang Denk2011-11-16-1/+1237
|\ | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nds32: adp-ag101p: add product into MAINTAINERS list adp-ag101p: Add SoC and board support of ag101p nds32: fix data section of linker script dwcddr21mctl: Synopsys DWC DDR2/1 Memory Controller andes_pcu.h: header file of andes_pcu power control unit
| * adp-ag101p: add product into MAINTAINERS listMacpaul Lin2011-11-10-0/+2
| | | | | | | | | | | | | | Add ADP-AG101P into MAINTAINERS list. Add ADP-AG101P into boards.cfg. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * adp-ag101p: Add SoC and board support of ag101pMacpaul Lin2011-11-10-0/+530
| | | | | | | | | | | | Add softcore SoC ag101p and the board adp-ag101p support. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * nds32: fix data section of linker scriptMacpaul Lin2011-11-09-1/+1
| | | | | | | | | | | | | | | | Make linker script handles .data.rel sections. Signed-off-by: Macpaul Lin <macpaul@andestech.com> Tested-by: Macpaul Lin <macpaul@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org>
| * dwcddr21mctl: Synopsys DWC DDR2/1 Memory ControllerMacpaul Lin2011-11-09-0/+337
| | | | | | | | | | | | Header definitions of Synopsys DWC DDR2/1 Memory Controller. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * andes_pcu.h: header file of andes_pcu power control unitMacpaul Lin2011-11-09-0/+367
| | | | | | | | | | | | header file of andes_pcu power control unit Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2011-11-16-1/+1
|\ \ | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-i2c: fsl_i2c: Fix compile warning
| * | fsl_i2c: Fix compile warningKumar Gala2011-11-09-1/+1
| |/ | | | | | | | | | | | | fsl_i2c.c: In function 'i2c_init': fsl_i2c.c:245:7: warning: assignment discards qualifiers from pointer target type Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Tegra2: mmc: Factor out mmc_wait_inhibit functionalityAnton staaf2011-11-12-19/+27
| | | | | | | | | | | | | | | | | | | | | | This is a well encapsulated section of mmc_send_cmd, by moving it to it's own function it increases the readability of mmc_send_cmd. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | Tegra2: mmc: Add data transfer completion timeoutAnton staaf2011-11-12-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently when no expected completion condition occures in the mmc_send_cmd while loop that is waiting for a data transfer to complete the MMC driver just hangs. This patch adds an arbitrary 2 second timeout. If nothing we recognize occures within 2 seconds some diagnostic information is printed and we fail out. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | Tegra2: mmc: Support DMA restarts at buffer boundariesAnton staaf2011-11-12-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently if a DMA buffer straddles a buffer alignment boundary (512KiB) then the DMA engine will pause and generate a DMA interrupt. Since the DMA interrupt is not enabled it will hang the MMC driver. This patch adds support for restarting the DMA transfer. The SYSTEM_ADDRESS register contains the next address that would have been read/written when a boundary is hit. So we can read that and write it back. The write triggers the resumption of the transfer. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | Tegra2: mmc: define register field values in tegra2_mmc.hAnton staaf2011-11-12-27/+85
| | | | | | | | | | | | | | | | | | | | | | | | This moves the magic numbers sprinkled about the MMC driver to a single location in the header file and gives them meaningful names. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | MMC: PL180: Fix infinite loop with VExpress extended fifo implementationJon Medhurst (Tixy)2011-11-08-26/+0
|/ | | | | | | | | | | | | | | | | | | The new IO FPGA implementation for Versatile Express contains an MMCI (PL180) cell with the FIFO extended to 128 words. This causes the read_bytes() function to go into an infinite loop; as it will wait for for the half-full signal (SDI_STA_RXFIFOBR) if there are more than 8 words remaining (SDI_FIFO_BURST_SIZE), but it won't receive this signal once there are fewer than 64 words left to transfer. One possible fix is to add some build time configuration to change SDI_FIFO_BURST_SIZE for the new implementation. However, the problematic code only seems to exist as a small performance optimisation, so the solution implemented by this patch is to simply remove it. The error checking following the loop is also removed as this will be handled by code further down the function. Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Jon Medhurst <jon.medhurst@linaro.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2011-11-08-2214/+3437
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc83xx: powerpc/mpc83xx: Add 33.33MHz support for mpc8360emds powerpc/mpc83xx: Add 512MB DDR support for mpc8360emds mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code mpc83xx: Cleanup usage of LBC constants mpc83xx: Cleanup usage of DDR constants mpc83xx: Cleanup usage of BAT constants mpc83xx: cosmetic: vme8349.h checkpatch compliance mpc83xx: cosmetic: ve8313.h checkpatch compliance mpc83xx: cosmetic: sbc8349.h checkpatch compliance mpc83xx: cosmetic: mpc8308_p1m.h checkpatch compliance mpc83xx: cosmetic: kmeter1.h checkpatch compliance mpc83xx: cosmetic: TQM834x.h checkpatch compliance mpc83xx: cosmetic: SIMPC8313.h checkpatch compliance mpc83xx: cosmetic: MVBLM7.h checkpatch compliance mpc83xx: cosmetic: MPC837XERDB.h checkpatch compliance mpc83xx: cosmetic: MPC837XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8360ERDK.h checkpatch compliance mpc83xx: cosmetic: MPC8360EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8349ITX.h checkpatch compliance mpc83xx: cosmetic: MPC8349EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC832XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8323ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8315ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8313ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8308RDB.h checkpatch compliance mpc83xx: cosmetic: MERGERBOX.h checkpatch compliance mpc83xx: Fix ipic structure definition powerpc, mpc83xx: add DDR SDRAM Timing Configuration 3 definitions cosmetic, powerpc, mpc83xx: checkpatch cleanup powerpc/83xx: move km 83xx specific i2c code to km83xx_i2c mpc83xx: fix global timer structure definition
| * powerpc/mpc83xx: Add 33.33MHz support for mpc8360emdsJerry Huang2011-11-07-10/+50
| | | | | | | | | | | | | | | | The new MPC8360EMDS board changes the oscillator to 33.33MHz in order to support QE 500MHz since 2008. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * powerpc/mpc83xx: Add 512MB DDR support for mpc8360emdsJerry Huang2011-11-03-2/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new MPC8360EMDS board supports 512MB DDR since 2008. For 512MB DDR: BAT0 is used for the first 256MB memory, BAT4 is used for the second 256MB memory and the address space of SDRAM follows the DDR, so if the size of DDR is 256MB, the BAT4 will be used for SDRAM and if the size of DDR is 512MB, the BAT4 will be used for the second 256MB memory and there is no BAT for SDRAM. Therefore, if the size of DDR is 512MB, this patch will use BAT6 for SDRAM and BAT5 will be used for PCI MEM to replace the BAT6 after the codes relocates to the DDR. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> CC: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds codeJoe Hershberger2011-11-03-68/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | Rename CONFIG_SYS_DDR_CONFIG to include which CS it is configuring Cleanup the setting of the csnbds to respect the setting of CONFIG_SYS_DDR_SDRAM_BASE Use __ilog2 instead of writing the code to compute it Disable unused CS configs Ensure ddrlaw.bar is configured Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Cleanup usage of LBC constantsJoe Hershberger2011-11-03-406/+548
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Cleanup usage of DDR constantsJoe Hershberger2011-11-03-50/+150
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Cleanup usage of BAT constantsJoe Hershberger2011-11-03-164/+162
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: vme8349.h checkpatch complianceJoe Hershberger2011-11-03-17/+18
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: ve8313.h checkpatch complianceJoe Hershberger2011-11-03-95/+109
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: sbc8349.h checkpatch complianceJoe Hershberger2011-11-03-93/+143
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: mpc8308_p1m.h checkpatch complianceJoe Hershberger2011-11-03-15/+14
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: kmeter1.h checkpatch complianceJoe Hershberger2011-11-03-2/+2
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: TQM834x.h checkpatch complianceJoe Hershberger2011-11-03-108/+169
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: SIMPC8313.h checkpatch complianceJoe Hershberger2011-11-03-124/+164
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MVBLM7.h checkpatch complianceJoe Hershberger2011-11-03-40/+76
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC837XERDB.h checkpatch complianceJoe Hershberger2011-11-03-100/+149
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC837XEMDS.h checkpatch complianceJoe Hershberger2011-11-03-117/+166
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8360ERDK.h checkpatch complianceJoe Hershberger2011-11-03-113/+169
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8360EMDS.h checkpatch complianceJoe Hershberger2011-11-03-82/+141
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8349ITX.h checkpatch complianceJoe Hershberger2011-11-03-123/+203
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8349EMDS.h checkpatch complianceJoe Hershberger2011-11-03-117/+178
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC832XEMDS.h checkpatch complianceJoe Hershberger2011-11-03-88/+141
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8323ERDB.h checkpatch complianceJoe Hershberger2011-11-03-103/+150
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8315ERDB.h checkpatch complianceJoe Hershberger2011-11-03-108/+145
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8313ERDB.h checkpatch complianceJoe Hershberger2011-11-03-106/+142
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MPC8308RDB.h checkpatch complianceJoe Hershberger2011-11-03-8/+8
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: cosmetic: MERGERBOX.h checkpatch complianceJoe Hershberger2011-11-03-6/+6
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Fix ipic structure definitionJoe Hershberger2011-11-03-4/+5
| | | | | | | | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Added siprr_{b,c} and sepcr for completeness. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * powerpc, mpc83xx: add DDR SDRAM Timing Configuration 3 definitionsHeiko Schocher2011-11-03-0/+6
| | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Added its mask, too, for intra-file consistency. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * cosmetic, powerpc, mpc83xx: checkpatch cleanupHeiko Schocher2011-11-03-132/+257
| | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * powerpc/83xx: move km 83xx specific i2c code to km83xx_i2cHolger Brunck2011-11-03-66/+98
| | | | | | | | | | | | | | | | | | The common code should be valid for more than one architecture. Therefore this code was reorganized and moved to the new file km83xx_i2c.c Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: fix global timer structure definitionKim Phillips2011-11-03-1/+1
| | | | | | | | | | | | | | | | The byte address distance between GTCFR2 and GTMDR1 is 11, not 10. Reported-by: Shawn Bai <programassem@hotmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-11-08-850/+7876
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: Arm: re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 board arm: jadecpu: Readd MACH_TYPE_JADECPU at91: defined mach-types for otc570 board in board config file at91: defined mach-types for meesc board in board config file mx31pdk: Enable D and I caches ehci-mxc: remove incorrect comment README: Fix supported i.MX SoC list for CONFIG_MXC_SPI mx53: Turn off child clocks before reconfigure perclk_root qong: enable support for compressed images imx: imx31_phycore.h: fix checkpatch warnings vision2: Remove unused get_board_rev function mx53smd: Remove unused get_board_rev function mx53ard: Remove unused get_board_rev function mx53evk: Remove unused get_board_rev function mx53evk: Add RTC support mx53loco: Remove unused get_board_rev function mx53evk: Remove unneeded '1' from mx53evk.h OMAP3: mvblx: Initial support for mvBlueLYNX-X ARM: dig297: Define MACH_TYPE_OMAP3_CPS and CONFIG_MACH_TYPE omap3: mem: Move comments next to definitions omap3: mem: Clean-up whitespaces omap3: mem: Define and use common macros Davinci: ea20: added PREBOOT to configuration Davinci: ea20: added I2C support Davinci: ea20: added video support VIDEO: davinci: add framebuffer to da8xx ARM: Davinci: added missing registers to hardware.h Davinci: ea20: add gpios for LCD backlight control Davinci: ea20: add gpio for keeping power on in board_late_init Davinci: ea20: Add default U-Boot environment Davinci: ea20: Add early init to get early output from console Davinci: ea20: Add NAND support Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console Davinci: ea20: set console on UART0 arm, davinci: add cam_enc_4xx support arm926ejs, davinci: add missing spi defines for dm365 arm926ejs, davinci: add cpuinfo for dm365 arm, davinci: add lowlevel function for dm365 soc arm, davinci: add header files for dm365 spl, nand: add 4bit HW ecc oob first nand_read_page function arm, davinci: add support for new spl framework spl: add option for adding post memory test to the SPL framework net, davinci_emac: make clock divider in MDIO control register configurable arm, usb, davinci: make USBPHY_CTL register configurable usb, davinci: add enable_vbus() weak function omap3evm: fix errors caused by multiple definitions omap3evm: Add (quick) configuration for NAND only omap3evm: Add (quick) configuration for MMC/SD only omap3evm: move common config options to new file omap3evm: Prepare to split configuration omap3evm: Reorder related config options omap/spl: actually enable the console davinci_emac: compilation fix, phy is array now omap3evm: Set environment variable 'ethaddr' arm, arm926: fix missing symbols in NAND_SPL mode arm, davinci: Add function lpsc_syncreset() arm, davinci: replace CONFIG_PRELOADER with CONFIG_SPL_BUILD arm/km: portl2 environment address update to P1B arm/km: adapt bootcounter evaluation arm/km: enable jffs2 cmds arm/km: trigger reconfiguration for the Xilinx FPGA arm/km: add boardid and hwkey to kernel command line ARM: Reintroduce MACH_TYPE_KM_KIRKWOOD for keymile ARM boards netspace_v2: enable I2C EEPROM support netspace_v2: fix SDRAM configuration armada100: define CONFIG_SYS_CACHELINE_SIZE pantheon: define CONFIG_SYS_CACHELINE_SIZE kirkwood: define CONFIG_SYS_CACHELINE_SIZE kirkwood: drop empty asm-offsets.s file arm/km/mgcoge3un: enhance "waitforne" feature arm/km: add variable waitforne to mgcoge3un gplugD: Fix for error:MACH_TYPE_SHEEVAD undeclared ARM: dreamplug: fix compilation ARM: DockStar: fix compilation ARM: netspace_v2: fix warnings am335x: Drop board_sysinfo struct am335x: Temporarily add MACH_TYPE define misc:pmic:samsung Enable PMIC driver at C210 Universal target dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p UNIVERSAL C210 target dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p GONI target smdkv310: use macro for mmc data read function address smdkv310: use spl framework for mmc spl SMDKV310: use get_ram_size() to validate dram size SMDKV310: Initialize board id using CONFIG_MACH_TYPE ORIGEN : use absolute paths and fix tool naming ORIGEN : enable device tree support MX25: tx25: Fix building due to missing MACH_TYPE mx31: Add board support for HALE TT-01 mx31: add ESD control registers mx31: define pins and init for UART2 and CSPI3 MX35: add support for flea3 board MX51: vision2: add MACH_TYPE in config file vision2: Remove unused header file mx51evk: Remove unused get_board_rev function mx51evk: Remove unneeded '1' from mx51evk.h I2C: Fix mxc_i2c.c problem on imx31_phycore mx35pdk: Add RTC support mx51evk: Use GPIO API for configuring the IOMUX mx51evk: Add RTC support rtc: Make mc13783-rtc driver generic qong: remove unneeded IOMUX settings qong: Use mx31_set_gpr to setup USBH2 pins mx31: Introduce mx31_set_gpr function mx31pdk: Add MC13783 PMIC support qong: remove unneeded "1" from qong.h misc: pmic: fix regression in pmic_fsl.c (SPI) mx5 configs: CONFIG_PRIME should really be CONFIG_ETHPRIME MX35: Drop unnecessary prototypes from imx-regs.h I2C: added I2C-2 and I2C-3 to MX35 MX35: factorize common assembly code MX35: add reset cause as provided by other i.MX MX35: add pins definition for UART3 MX35: added ESDC structure to imx-regs
| * | Arm: re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 boardJens Scharsig2011-11-05-0/+2
| | | | | | | | | | | | | | | | | | | | | * re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 board Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
| * | arm: jadecpu: Readd MACH_TYPE_JADECPUMatthias Weisser2011-11-05-1/+4
| | | | | | | | | | | | | | | | | | | | | MACH_TYPE_JADECPU was removed from mach-types.h. Add it to board config file. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
| * | at91: defined mach-types for otc570 board in board config fileDaniel Gorsulowski2011-11-05-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | quotation from Albert ARIBAUD: "Recently the ARM mach-types.h file has been brought in sync with its Linux original, leasing to a number of boards not being listed any more, as the new list only contains boards which have actual Linux support or were declared less than one year ago. The symptom is a build failure with a message of the form "error: 'MACH_TYPE_XXXXXX' undeclared (first use in this function)". U-Boot maintainers of such boards (in Cc: of this mail) should provide a patch to re-introduce the MACH_TYPE_XXXXXX definition in their boards' config header file in include/configs/." Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
| * | at91: defined mach-types for meesc board in board config fileDaniel Gorsulowski2011-11-05-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | quotation from Albert ARIBAUD: "Recently the ARM mach-types.h file has been brought in sync with its Linux original, leasing to a number of boards not being listed any more, as the new list only contains boards which have actual Linux support or were declared less than one year ago. The symptom is a build failure with a message of the form "error: 'MACH_TYPE_XXXXXX' undeclared (first use in this function)". U-Boot maintainers of such boards (in Cc: of this mail) should provide a patch to re-introduce the MACH_TYPE_XXXXXX definition in their boards' config header file in include/configs/." Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
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