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* s5pc1xx: gpio: bug fix at gpio_set_pull functionMinkyu Kang2010-06-14-1/+1
| | | | | | | When set to PULL_NONE, gpio_set_pull function is returned without write the register. This patch fixed it. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* DaVinci: Improve DaVinci SPI speed.Delio Brignoli2010-06-08-34/+43
| | | | | | | | | | | | | | | I have updated this patch based on the comments [1] by Wolfgang Denk and removed unused variables. [1][http://lists.denx.de/pipermail/u-boot/2010-May/071728.html] Reduce the number of reads per byte transferred on the BUF register from 2 to 1 and take advantage of the TX buffer in the SPI module. On LogicPD OMAP-L138 EVM, SPI read throughput goes up from ~0.8Mbyte/s to ~1.3Mbyte/s. Tested with a 2Mbyte image file. Remove unused variables in the spi_xfer() function. Signed-off-by: Delio Brignoli <dbrignoli@audioscience.com> Tested-by: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* AM35x: Add support for EMIF4Vaibhav Hiremath2010-06-08-1/+274
| | | | | | | | | This patch adds support for the EMIF4 interface available in the AM35x processors. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* AM35x: Add support for AM3517EVMVaibhav Hiremath2010-06-08-0/+901
| | | | | | | | | | | | This patch adds basic support for the AM3517EVM. It includes: - Board files (.c and .h) - Default configuration file - Updates for Makefile Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: Consolidate SDRC related operationsVaibhav Hiremath2010-06-08-168/+236
| | | | | | | | | | | Consolidated SDRC related functions into one file - sdrc.c And also replaced sdrc_init with generic memory init function (mem_init), this generalization of omap memory setup is necessary to support the new emif4 interface introduced in AM3517. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap3: Calculate CS1 size only when SDRC isVaibhav Hiremath2010-06-08-3/+4
| | | | | | | | | | | | initialized for CS1 From: Vaibhav Hiremath <hvaibhav@ti.com> The patch makes sure that size for SDRC CS1 gets calculated only when the CS1 SDRC is initialized. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* OMAP3EVM: Added NAND supportVaibhav Hiremath2010-06-08-1/+7
| | | | | | | | | | | The EVMS have been shipping with NAND (instead of OneNAND) as default. So, this patch sets NAND as default. To choose OneNAND, define CMD_ONENAND instead of CMD_NAND in the config file omap3_evm.h. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* TI: TNETV107X EVM initial supportCyril Chemparathy2010-06-08-0/+379
| | | | | | | | | TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a bunch on on-chip integrated peripherals. This patch adds support for the TNETV107X EVM board. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARM1176: TI: TNETV107X soc initial supportCyril Chemparathy2010-06-08-0/+1872
| | | | | | | | | TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a bunch on on-chip integrated peripherals. This is an initial commit with basic functionality, more commits with drivers, etc. to follow. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARM1176: Coexist with other ARM1176 platformsCyril Chemparathy2010-06-08-23/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current ARM1176 CPU specific code is too specific to the SMDK6400 architecture. The following changes were necessary prerequisites for the addition of other SoCs based on ARM1176. Existing board's (SMDK6400) configuration has been modified to keep behavior unchanged despite these changes. 1. Peripheral port remap configurability The earlier code had hardcoded remap values specific to s3c64xx in start.S. This change makes the peripheral port remap addresses and sizes configurable. 2. U-Boot code relocation support Most architectures allow u-boot code to run initially at a different address (possibly in NOR) and then get relocated to its final resting place in RAM. Added support for this capability in ARM1176 architecture. 3. Disable TCM if necessary If a ROM based bootloader happened to have initialized TCM, we disable it here to keep things sane. 4. Remove unnecessary SoC specific includes ARM1176 code does not really need this SoC specific include. The presence of this include prevents builds on other ARM1176 archs. 5. Modified virt-to-phys conversion during MMU disable The original MMU disable code masks out too many bits from the load address when it tries to figure out the physical address of the jump target label. Consequently, it ends up branching to the wrong address after disabling the MMU. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* add new board pm9g45Asen Dimov2010-06-06-0/+435
| | | | | | | | | | | | | | Add the new board PM9G45 from Ronetix GmbH. * AT91SAM9G45 MCU at 400Mhz. * 128MB DDR2 SDRAM * 256MB NAND * 10/100 MBits Ethernet DP83848 * Serial number chip DS2401 The board is made as SODIMM200 module. For more info www.ronatix.at or info@ronetix.at. Signed-off-by: Asen Dimov <dimov@ronetix.at>
* ARM1136: Fix cache_flush() error and correct cpu_init_crit() commentsGeorge G. Davis2010-06-01-2/+3
| | | | | | | | | | | | | | | The ARM1136 cache_flush() function uses the "mcr p15, 0, rn, c7, c7, 0" instruction which means "Invalidate Both Caches" when in fact the intent is to clean and invalidate all caches. So add an "mcr p15, 0, %0, c7, c10, 0" instruction to "Clean Entire Data Cache" prior to the "Invalidate Both Caches" instruction to insure that memory is consistent with any dirty cache lines. Also fix a couple of "flush v*" comments in ARM1136 cpu_init_crit() so that they correctly describe the actual ARM1136 CP15 C7 Cache Operations used. Signed-off-by: George G. Davis <gdavis@mvista.com>
* ARM Update mach-typesTom2010-05-28-6/+500
| | | | | | | | | | Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 3defb2476166445982a90c12d33f8947e75476c4 Signed-off-by: Tom <Tom@bumblecow.com>
* ARM Update mach-typesTom2010-05-28-2/+665
| | | | | | | | | | Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 257dab81413b31b8648becfe11586b3a41e5c29a Signed-off-by: Tom <Tom@bumblecow.com>
* Prepare v2010.06-rc1v2010.06-rc1Wolfgang Denk2010-05-26-2/+2
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Coding style cleanup, update CHANGELOG.Wolfgang Denk2010-05-26-13/+4057
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2010-05-26-20/+20
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| * mpc83xx: don't shift pre-shifted ACR, SPCR, SCCR bitfield masks in cpu_init.cKim Phillips2010-05-21-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit c7190f028fa950d4d36b6d0b4bb3fc72602ec54c "mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields" incorrectly shifted <register>_<bitfield> (e.g. ACR_PIPE_DEP) values that were preshifted by their definition in mpc83xx.h. this patch removes the unnecessary shifting for the newly utilized mask values in cpu_init.c, and prevents seemingly unrelated symptoms such as an mpc8379erdb board from locking up whilst performing a networking operation, e.g. a tftp. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * Fixed two typos in arch/powerpc/cpu/mpc83xx/start.S.Horst Kronstorfer2010-05-21-2/+2
| | | | | | | | | | Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | config.mk: use different host compiler for OS X 10.6Andreas Biessmann2010-05-26-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compiling tools subdirectory on Mac OS X 10.6 (Snow Leopard) complains about wrong syntax in system includes. In file included from /usr/include/stdio.h:444, from ../source/u-boot/include/compiler.h:26, from ../source/u-boot/lib/crc32.c:15: /usr/include/secure/_stdio.h:46: error: syntax error in macro parameter list This can be fixed by reverting the workaround for prior OS X releases in config.mk conditionally for OS X 10.6+. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | Convert Makefiles from COBJS-${} to COBJS-$()Kumar Gala2010-05-26-17/+17
| | | | | | | | | | | | Match style we use almost everywhere else Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/bootcount: Fix endianness problemMichael Weiss2010-05-26-2/+4
| | | | | | | | | | | | | | For CONFIG_SYS_BOOTCOUNT_SINGLEWORD the code had an endianness problem. Signed-off-by: Michael Weiss <michael.weiss@ifm.com> Signed-off-by: Detlev Zundel <dzu@denx.de>
* | dm9000x.c: fix compile problemsWolfgang Denk2010-05-26-6/+6
| | | | | | | | | | | | | | Use readX() / writeX() accessors instead of inX() / outX(). Suggested-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Wolfgang Denk <wd@denx.de>
* | a320evb: fix udelay / __udelay confusionWolfgang Denk2010-05-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Fix the following compiler problems: arch/arm/cpu/arm920t/a320/liba320.a(timer.o): In function `udelay': /home/wd/git/u-boot/work/arch/arm/cpu/arm920t/a320/timer.c:160: multiple definition of `udelay' lib/libgeneric.a(time.o):/home/wd/git/u-boot/work/lib/time.c:34: first defined here lib/libgeneric.a(time.o): In function `udelay': time.c:(.text+0x1c): undefined reference to `__udelay' Signed-off-by: Wolfgang Denk <wd@denx.de>
* | ARM: */timer.c: fix spelling and vertical alignmentWolfgang Denk2010-05-21-18/+18
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | bugfix: Guruplug: Use standard miiphyMahavir Jain2010-05-21-8/+1
| | | | | | | | | | | | | | | | | | | | | | call to reset PHY chip. Current PHY Software Reset operation in guruplug does not poll reset bit in control register to go to 0(auto clearing) for making sure reset was successful.This patch uses standard miiphy call miiphy_reset to make sure proper PHY reset operation. Signed-off-by: Mahavir Jain <mjain@marvell.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ubiWolfgang Denk2010-05-21-3/+8
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| * | UBI: Fix problem in UBI/Linux "compatibility layer"Stefan Roese2010-05-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | "down_write_trylock" needs to return 1 instead of 0 for success. Otherwise copying a block with a read error (e.g. bit-flip on read) won't work correctly. Signed-off-by: Stefan Roese <sr@denx.de>
| * | UBI: Ensure that "background thread" operations are really executedStefan Roese2010-05-19-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current U-Boot UBI implementation is copied from Linux. In this porting the UBI background thread was not handled correctly. Upon write operations ubi_wl_flush() makes sure, that all queued operations, like page-erase, are completed. But this is missing for read operations. This patch now makes sure that such operations (like scrubbing upon bit-flip errors) are not queued, but executed directly. Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-05-21-107/+967
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| * | | MX31: Added support for the Casio COM57H5M10XRC to QONGStefano Babic2010-05-19-17/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds setup to connect a CASIO COM57H5M10XRC (640x480 TFT display) to the QONG module. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | Add SPI support to mx51evk boardStefano Babic2010-05-05-0/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds SPI devices to the mx51evk board. The MC13892 chip (PMIC) is supported. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | MX: Added definition file for MC13892Stefano Babic2010-05-05-0/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MC13892 is a Power Controller used with processors of the family MX.51. The file adds definitions to be used to setup the internal registers via SPI. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | SPI: added support for MX51 to mxc_spiStefano Babic2010-05-05-20/+211
| | | | | | | | | | | | | | | | | | | | | | | | This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | MX31: Add support for PMIC to the QONG moduleStefano Babic2010-05-05-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the PMIC (MC13783) controller and enables charging of the RTC battery. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | MX: RTC13783 uses general function to access PMICStefano Babic2010-05-05-67/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RTC is part of the Freescale's PMIC controller. Use general function to access to PMIC internal registers. Signed-off-by: Stefano Babic <sbabic@denx.de> Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
| * | | MX: Added Freescale Power Management DriverStefano Babic2010-05-05-0/+329
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch add supports for the Freescale's Power Management Controller (known as Atlas) used together with i.MX31/51 processors. It was tested with a MC13783 (MX31) and MC13892 (MX51). Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | i.MX31: Activate NAND support for i.MX31 Litekit board.Magnus Lilja2010-05-05-0/+10
| | | | | | | | | | | | | | | | Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
| * | | MX51: Fix MX51 CPU detect messageFabio Estevam2010-05-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix MX51 CPU detect message. Original string was: CPU: Freescale i.MX51 family 3.0V at 800 MHz which can be misinterpreted as 3.0 Volts instead of the silicon revision. ,change it to: CPU: Freescale i.MX51 family rev3.0 at 800 MHz Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | | MX51evk: Removed warningsStefano Babic2010-05-05-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes reflect modifications in the fsl_esdhc driver (the clk_enable field war removed in the configuration structure). Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | tx25: fix crash while booting LinuxAnatolij Gustschin2010-05-05-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently booting Linux on TX25 board doesn't work since there is no correct mach-id and boot parameters setup for tx25 board. Fix it now. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: John Rigby <jcrigby@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* | | | Fix "par[t]ition" typo.Wolfgang Denk2010-05-21-5/+5
| |_|/ |/| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | fsl_diu_fb.c: fix build warningsWolfgang Denk2010-05-17-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 15351855 "fsl-diu: Using I/O accessor to CCSR space" caused a number of "passing argument 2 of 'out_be32' makes integer from pointer without a cast" warnings; fix these. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Dave Liu <daveliu@freescale.com> Cc: Jerry Huang <Chang-Ming.Huang@freescale.com> Cc: Kumar Gala <galak@kernel.crashing.org>
* | | Avoid use of divides in print_sizeNick Thompson2010-05-17-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modification of print_size to avoid use of divides and especially long long divides. Keep the binary scale factor in terms of bit shifts instead. This should be faster, since the previous code gave the compiler no clues that the divides where always powers of two, preventing optimisation. Signed-off-by: Nick Thompson <nick.thompson@ge.com> Acked-by: Timur Tabi <timur@freescale.com>
* | | lan91c96, smc911x: remove useless free(ptr) calls on NULL ptrSerge Ziryukin2010-05-17-2/+0
| | | | | | | | | | | | Signed-off-by: Serge Ziryukin <ftrvxmtrx@gmail.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2010-05-17-2/+5
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| * | | Fix SICRL setting in SIMPC8313Ron Madrid2010-05-17-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch sets the SICRL_LBC bits in SICRL to change the function of the associated pins to GPIO functionality. Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
| * | | mpc83xx: fix NAND bootstrap too big errorKim Phillips2010-05-17-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 167cdad1372917bc11c636c359aad02625291fa9 "SERIAL: Enable port-mapped access" inadvertently broke 83xx nand boards by converting NS16550_init to use io accessors, which expanded the size of the generated code. this patch fixes the problem by removing icache functions from the nand builds, which somewhat follows commit 1a2e203b31d33fb720f2cf1033b241ad36ab405a "mpc83xx: turn on icache in core initialization to improve u-boot boot time" Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | Removal of checkboard from spl bootstrap build for SIMPC8313Ron Madrid2010-05-17-1/+1
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the checkboard function from the build of the 4k bootstrap section for the SIMPC8313 as it is not needed in the spl build. This will allow > 100 bytes of extra room for other uses. Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-05-17-1/+1
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