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* ppc4xx: Remove superfluous dram_init() call or replace it by initdram()Stefan Roese2008-06-03-286/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | Historically the 405 U-Boot port had a dram_init() call in early init stage. This function was still called from start.S and most of the time coded in assembler. This is not needed anymore (since a long time) and boards should implement the common initdram() function in C instead. This patch now removed the dram_init() call from start.S and removes the empty implementations that are scattered through most of the 405 board ports. Some older board ports really implement this dram_init() though. These are: csb272 csb472 ERIC EXBITGEN W7OLMC W7OLMG I changed those boards to call this assembler dram_init() function now from their board specific initdram() instead. This *should* work, but please test again on those platforms. And it is perhaps a good idea that those boards use some common 405 SDRAM initialization code from cpu/ppc4xx at some time. So further patches welcome here. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Use new 4xx SDRAM controller enable defines in common ECC codeStefan Roese2008-06-03-2/+3
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix common ECC generation code for 440GP style platformsStefan Roese2008-06-03-7/+34
| | | | | | | | | | | | This patch makes the common 4xx ECC code really usable on 440GP style platforms. Since the IBM DDR controller used on 440GP/GX/EP/GR is not register compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT we need to make some processor dependant defines used later on by the driver. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Change Kilauea to use the common DDR2 init functionStefan Roese2008-06-03-271/+29
| | | | | | | | | | | This patch changes the kilauea and kilauea_nand (for NAND booting) board port to not use a board specific DDR2 init routine anymore. Now the common code from cpu/ppc4xx is used. Thanks to Grant Erickson for all his basic work on this 405EX early bootup. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part2Stefan Roese2008-06-03-0/+1156
| | | | | | | This patch now adds a new header file (asm-ppc/ppc4xx-sdram.h) for all ppc4xx related SDRAM/DDR/DDR2 controller defines. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part1Stefan Roese2008-06-03-1461/+25
| | | | | | | | | | | | | | | | | | | This patch removes all SDRAM related defines from the PPC4xx headers ppc405.h and ppc440.h. This is needed since now some 405 PPC's use the same SDRAM controller as 440 systems do (like 405EX and 440SP). It also introduces new defines for the equipped SDRAM controller based on which PPC variant is used. There new defines are: used on 405GR/CR/EP and some Xilinx Virtex boards. used on 440GP/GX/EP/GR. used on 440EPx/GRx. used on 405EX/r/440SP/SPe/460EX/GT. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.SStefan Roese2008-06-03-132/+85
| | | | | | | | | | | | | | | | | This patch consolidates the 405 and 440 parts of the NAND booting code selected via CONFIG_NAND_SPL. Now common code is used to initialize the SDRAM by calling initdram() and to "copy/relocate" to SDRAM/OCM/etc. Only *after* running from this location, nand_boot() is called. Please note that the initsdram() call is now moved from nand_boot.c to start.S. I experienced problems with some boards like Kilauea (405EX), which don't have internal SRAM (OCM) and relocation needs to be done to SDRAM before the NAND controller can get accessed. When initdram() is called later on in nand_boot(), this can lead to problems with variables in the bss sections like nand_ecc_pos[]. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* ppc4xx: Enable Primordial Stack for 40x and Unify ECC HandlingGrant Erickson2008-06-03-444/+330
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch (Part 2 of 2): * Rolls up a suite of changes to enable correct primordial stack and global data handling when the data cache is used for such a purpose for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS). * Related to the first, unifies DDR2 SDRAM and ECC initialization by eliminating redundant ECC initialization implementations and moving redundant SDRAM initialization out of board code into shared 4xx code. * Enables MCSR visibility on the 405EX(r). * Enables the use of the data cache for initial RAM on both AMCC's Kilauea and Makalu and removes a redundant CFG_POST_MEMORY flag from each board's CONFIG_POST value. - Removed, per Stefan Roese's request, defunct memory.c file for Makalu and rolled sdram_init from it into makalu.c. With respect to the 4xx DDR initialization and ECC unification, there is certainly more work that can and should be done (file renaming, etc.). However, that can be handled at a later date on a second or third pass. As it stands, this patch moves things forward in an incremental yet positive way for those platforms that utilize this code and the features associated with it. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Enable Primordial Stack for 40x and Unify ECC HandlingGrant Erickson2008-06-03-274/+723
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch (Part 1 of 2): * Rolls up a suite of changes to enable correct primordial stack and global data handling when the data cache is used for such a purpose for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS). * Related to the first, unifies DDR2 SDRAM and ECC initialization by eliminating redundant ECC initialization implementations and moving redundant SDRAM initialization out of board code into shared 4xx code. * Enables MCSR visibility on the 405EX(r). * Enables the use of the data cache for initial RAM on both AMCC's Kilauea and Makalu and removes a redundant CFG_POST_MEMORY flag from each board's CONFIG_POST value. - Removed, per Stefan Roese's request, defunct memory.c file for Makalu and rolled sdram_init from it into makalu.c. With respect to the 4xx DDR initialization and ECC unification, there is certainly more work that can and should be done (file renaming, etc.). However, that can be handled at a later date on a second or third pass. As it stands, this patch moves things forward in an incremental yet positive way for those platforms that utilize this code and the features associated with it. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Signed-off-by: Stefan Roese <sr@denx.de>
* PPC4xx: Simplified post_word_{load, store}Grant Erickson2008-06-03-15/+11
| | | | | | | This patch simplifies post_word_{load,store} by using the preprocessor to eliminate redundant, copy-and-pasted code. Signed-off-by: Grant Erickson <gerickson@nuovations.com>
* Merge branch 'master' of /home/stefan/git/u-boot/u-bootStefan Roese2008-06-03-13672/+15233
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| * Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2008-05-27-48/+47
| |\ | | | | | | | | | | | | | | | | | | | | | Conflicts: include/configs/socrates.h Signed-off-by: Wolfgang Denk <wd@denx.de>
| | * USB: replace old swap_ with proper endianess conversion macrosChristian Eggers2008-05-22-45/+38
| | | | | | | | | | | | | | | Signed-off-by: Christian Eggers <ceggers@gmx.de> Signed-off-by: Markus Klotzbuecher <mk@denx.de>
| | * Fix endianess conversion in usb_ohci.cChristian Eggers2008-05-22-3/+3
| | | | | | | | | | | | | | | Signed-off-by: Christian Eggers <ceggers@gmx.de> Signed-off-by: Markus Klotzbuecher <mk@denx.de>
| | * USB: add support for multiple PCI OHCI controllersSergei Poselenov2008-05-22-3/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add new configuration variable CONFIG_PCI_OHCI_DEVNO. In case of several PCI USB controllers on a board this variable specifys which controller to use. Also add USB support for sokrates board. See doc/README.generic_usb_ohci for details. Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> Signed-off-by: Markus Klotzbuecher <mk@denx.de>
| * | Socrates: Added USB support.Sergei Poselenov2008-05-27-9/+12
| | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | USB: add new configuration variable CONFIG_PCI_OHCI_DEVNOSergei Poselenov2008-05-27-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | In case of several PCI USB controllers on a board this variable specifys which controller to use. See doc/README.generic_usb_ohci for details. Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | Socrates: add support for DS75 Digital Thermo Sensor on I2C bus.Sergei Poselenov2008-05-27-1/+11
| | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | Socrates: Config file cleanup.Sergei Poselenov2008-05-27-3/+4
| |/ | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-testingWolfgang Denk2008-05-21-9/+9
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| | * Fix some whitespace issuesWolfgang Denk2008-05-21-9/+9
| | | | | | | | | | | | | | | | | | introduced by 53677ef18 "Big white-space cleanup." Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | Merge branch 'socrates' of /home/wd/git/u-boot/projectsWolfgang Denk2008-05-21-9/+1160
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| | * | socrates: fix second TSEC configuration (it is actually TSEC3)Sergei Poselenov2008-05-20-6/+6
| | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| | * | Fixed reset for socratesSergei Poselenov2008-05-20-9/+14
| | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| | * | socrates: changes to support FDTSergei Poselenov2008-05-20-33/+50
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
| | * | Initial support for "Socrates" boardSergei Poselenov2008-05-20-0/+1129
| | | | | | | | | | | | | | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
| * | | Merge branch 'lwmon5' of /home/wd/git/u-boot/projectsWolfgang Denk2008-05-21-8/+155
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| | * | | POST: replace the LOGBUFF_INITIALIZED flag in gd->post_log_word (1 << 31) ↵Yuri Tikhonov2008-05-20-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | with the GD_FLG_LOGINIT flag in gd->flags. This way we become able to utilize the full post_log_word for POST activities (overwise, POST ECC, which has 0x8000 ID, could be erroneously treated as started in post_output_backlog() even if there was actually no POST ECC run (because of OCM POST failure, for example). Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
| | * | | POST: mark OCM test as POST_STOPYuri Tikhonov2008-05-20-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ilya Yanok <yanok@emcraft.com>
| | * | | POST: add POST_STOP flagYuri Tikhonov2008-05-20-2/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't run futher tests in case of a test fails that is marked as POST_STOP. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
| | * | | POST: switch CFG_POST_OCM with CFG_POST_CODEC (workaround)Yuri Tikhonov2008-05-20-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch the OCM testid with the codec one. The reason is that current implementation requires the POST_ROM testid to fit into lower 16 bits, and the codec test will never run with POST_ROM hopefully. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
| | * | | lwmon5: enable OCM post test on lwmon5 boardYuri Tikhonov2008-05-20-0/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ilya Yanok <yanok@emcraft.com>
| | * | | POST: OCM test added.Yuri Tikhonov2008-05-20-0/+104
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added OCM test to POST layer. This version runs before all other tests but doesn't yet interrupt post sequence on failure. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
| | * | | POST: typo fixYuri Tikhonov2008-05-20-1/+1
| | |/ / | | | | | | | | | | | | Signed-off-by: Ilya Yanok <yanok@emcraft.com>
| * | | Make ads5121 out-of-tree compiling safeYork Sun2008-05-21-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | Reuse the existing DIU driver in board/freescale/common. Signed-off-by: York Sun <yorksun@freescale.com>
| * | | Adding DIU support for Freescale 5121ADSYork Sun2008-05-21-21/+261
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DIU and cfb console support to FSL 5121ADS board. Use #define CONFIG_VIDEO in config file to enable fb console. Signed-off-by: York Sun <yorksun@freescale.com>
| * | | Replace DPRINTF with debugYork Sun2008-05-21-35/+29
| | | | | | | | | | | | | | | | | | | | | | | | Remove DPRINTF macro and replace it with generic debug macro. Signed-off-by: York Sun <yorksun@freescale.com>
| * | | Move pixel clock setting to board fileYork Sun2008-05-21-34/+25
| | |/ | |/| | | | | | | | | | | | | | | | The clock divider has different format in 5121 and 8610. This patch moves it to board specific code. Signed-off-by: York Sun <yorksun@freescale.com>
| * | Big white-space cleanup.Wolfgang Denk2008-05-21-13519/+13530
| |/ | | | | | | | | | | | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge branch 'quad100hd'Stefan Roese2008-05-21-0/+686
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| * ppc4xx: QUAD100HD: Allow the environment to be put into flash.Gary Jennejohn2008-05-14-4/+9
| | | | | | | | | | | | | | After moving TEXT_BASE the value for CFG_ENV_ADDR was incorrect. Also use a redundant environment. Signed-off-by: Gary Jennejohn <garyj@denx.de>
| * ppc4xx: Add the Harris QUAD100HD AMCC 405EP-based boardGary Jennejohn2008-05-08-0/+681
| | | | | | | | | | Signed-off-by: Gary Jennejohn <garyj@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | common/usb.c: fix incorrect escape sequenceHebbar2008-05-20-1/+1
| | | | | | | | Signed off by: Gururaja Hebbar <gururajakr@sanyo.co.in>
* | Fix 8313ERDB board configurationYork Sun2008-05-19-8/+6
| | | | | | | | | | | | | | | | | | Change LCRR clock ratio from 2 to 4 to commodate VSC7385. Correct TSEC1 vs TSEC2 assignment. Define ETHADDR and ETH1ADDR always. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com>
* | Release v1.3.3Wolfgang Denk2008-05-19-1/+299
| | | | | | | | | | | | Update CHANGELOG for release. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxWolfgang Denk2008-05-19-1/+30
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| * | ppc4xx: Canyonlands: Disable PCIe0/SATA in dev-tree depending on selectionStefan Roese2008-05-19-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When SATA is selected (via jumper J6) we need to disable the first PCIe node in the device tree, so that Linux doesn't initialize it. Otherwise the Linux SATA driver will fail to detect the devices. The same goes the other way around too. So if PCIe is selected we need to disable the SATA node in the device tree. This is because PCIe port 0 and SATA on 460EX share the same pins (multiplexed) and we have to configure in U-Boot which peripheral is enabled. Signed-off-by: Stefan Roese <sr@denx.de>
* | | i386: Fix multiple definitions of __show_boot_progressJean-Christophe PLAGNIOL-VILLARD2008-05-19-14/+14
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | sc530_spunk: add missing SOBJS entryJean-Christophe PLAGNIOL-VILLARD2008-05-19-1/+1
| | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | | sc520_spunk: Fix flashJean-Christophe PLAGNIOL-VILLARD2008-05-19-24/+6
| | | | | | | | | | | | | | | | | | | | | flash.c:593: warning: dereferencing type-punned pointer will break strict-aliasing rules flash.c:398: error: label at end of compound statement Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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