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* cm-t35: fix incorrect NAND_ECC layout selectionNikita Kiryanov2012-07-07-1/+1
| | | | | | | | The current configuration selects an incorrect NAND ECC layout, which causes u-boot to write HW ECC data incorrectly. This patch selects the right layout. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls.SRICHARAN R2012-07-07-7/+0
| | | | | | | | | | | | Currently on OMAP4/5 platforms, many kernel drivers are dependent upon the bootloaders for mux, dpll and clock configurations. This should not be the case and bootloaders should set only the minimum required for the uboot functionality and kernel boot. Note that this is going to break the kernel drivers. But this is the only way to get things fixed in the kernel. Signed-off-by: R Sricharan <r.sricharan@ti.com>
* ARM: OMAP4/5: Move USB pads to essential list.SRICHARAN R2012-07-07-22/+21
| | | | | | | | | USB module pads are getting enabled under non-essential group. These will be required for fastboot, tftp support. So move this to essential list to have them working when non-essential pads are no more muxed. Signed-off-by: R Sricharan <r.sricharan@ti.com>
* ARM: OMAP4/5: Move USB clocks to essential group.SRICHARAN R2012-07-07-9/+7
| | | | | | | | | USB clocks will be required for fastboot, tftp related functionalities. Move these clocks to essential group inorder to have the functionality working when non-essential clocks are not enabled. Signed-off-by: R Sricharan <r.sricharan@ti.com>
* ARM: OMAP4/5: Move gpmc clocks to essential group.SRICHARAN R2012-07-07-2/+2
| | | | | | | | | | GPMC clocks are currently getting enabled as a part non-essential clocks. This will be required during NOR boot. Move this to essential group to keep the functionality, when non-essential clocks are not enabled. Signed-off-by: R Sricharan <r.sricharan@ti.com>
* ARM: OMAP4+: Move external phy initialisations to arch specific place.SRICHARAN R2012-07-07-27/+39
| | | | | | | | | | The external phy is present in the case OMAP5 soc is currently configured in emif-common.c. This results in having dummy structures for those Socs which do not have a external phy. So by having a weak function in emif-common and overriding it in OMAP5, avoids the use of dummy structures. Signed-off-by: R Sricharan <r.sricharan@ti.com>
* omap4: Use a smaller M,N couple for IVA DPLLSebastien Jan2012-07-07-1/+1
| | | | | | | | | | This reduced M,N couple corresponds to the advised value from TI HW team. Tested on 4460 Pandaboard, it also provides peripheral clocks closer to the advised values. Signed-off-by: Sebastien Jan <s-jan@ti.com>
* da850/omap-l138: Enable auto negotiation in RMII modeRajashekhara, Sudhakar2012-07-07-0/+8
| | | | | | | | | | | | On DA850/OMAP-L138 it was observed that in RMII mode, auto negotiation was not performed. This patch enables auto negotiation in RMII mode. Without this patch, EMAC initialization takes more time and sometimes tftp fails in RMII mode. Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* omap: am33xx: accomodate input clocks other than 24 MhzSteve Sakoman2012-07-07-5/+5
| | | | | | | | | The PLL setup values currently assume a 24 Mhz input clock. This patch uses V_OSCK from the board config file to support boards with different input clock rates. Signed-off-by: Steve Sakoman <steve@sakoman.com>
* omap: emif: fix bug in manufacturer code testSteve Sakoman2012-07-07-1/+1
| | | | | | | Code currently tests for <= 0xff. Micron manufacturer code is 0xff, so Micron memory will not be detected! Signed-off-by: Steve Sakoman <steve@sakoman.com>
* omap: emif: deal with rams that return duplicate mr data on all byte lanesSteve Sakoman2012-07-07-1/+6
| | | | | | | | | | Some rams (Micron for example) return duplicate mr data on all byte lanes. Users of the get_mr function currently don't deal with this duplicated data gracefully. This patch detects the duplicated data and returns only the expected 8 bit mr data. Signed-off-by: Steve Sakoman <steve@sakoman.com>
* OMAP4+: Force DDR in self-refresh after warm resetLokesh Vutla2012-07-07-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Errata ID:i727 Description: The refresh rate is programmed in the EMIF_SDRAM_REF_CTRL[15:0] REG_REFRESH_RATE parameter taking into account frequency of the device. When a warm reset is applied on the system, the OMAP processor restarts with another OPP and so frequency is not the same. Due to this frequency change, the refresh rate will be too low and could result in an unexpected behavior on the memory side. Workaround: The workaround is to force self-refresh when coming back from the warm reset with the following sequence: • Set EMIF_PWR_MGMT_CTRL[10:8] REG_LP_MODE to 0x2 • Set EMIF_PWR_MGMT_CTRL[7:4] REG_SR_TIM to 0x0 • Do a dummy read (loads automatically new value of sr_tim) This will reduce the risk of memory content corruption, but memory content can't be guaranteed after a warm reset. This errata is impacted on OMAP4430: 1.0, 2.0, 2.1, 2.2, 2.3 OMAP4460: 1.0, 1.1 OMAP4470: 1.0 OMAP5430: 1.0 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
* OMAP4+: Handle sdram init after warm resetLokesh Vutla2012-07-07-4/+6
| | | | | | | | | | EMIF and DDR device state are preserved in warmreset. Redoing the full initialisation would cause unexpected behaviour. Do only partial initialisation to account for frequency change. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
* ARM: OMAP3+: Detect reset typeLokesh Vutla2012-07-07-0/+16
| | | | | | | | | | | | Certain modules are not affected by means of a warm reset and need not be configured again. Adding an API to detect the reset reason warm/cold. This will be used to skip the module configurations that are retained across a warm reset. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com>
* arm: bugfix: Move vector table before jumping relocated codeTetsuyuki Kobayashi2012-07-07-0/+12
| | | | | | | | | | Interrupts and exceptions doesn't work in relocated code. It badly use IRQ_STACK_START_IN in rom area as interrupt stack. It is because the vecotr table is not moved to ram area. This patch moves vector table before jumping relocated code. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Tested-by: Tom Rini <trini@ti.com>
* Kirkwood: Add support for Ka-Ro TK71Marek Vasut2012-07-07-0/+516
| | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Wolfgang Denk <wd@denx.de>
* arm/km: use spi claim bus to switch between SPI and NANDValentin Longchamp2012-07-07-40/+13
| | | | | | | | | | | | | | We overwrite these weak functions from the kirkwood spi code to use our own method to be able to switch between the SPI NOR and the NAND flash. This is needed e.g. to update the u-boot. The former command do_spi_toggle can therefore be removed. And the usage of this command is removed from the u-boot update command in the u-boot environment. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* arm/kirkwood: protect the ENV_SPI #definesValentin Longchamp2012-07-07-3/+9
| | | | | | | | So that they can be redefined by some boards specific values. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* ARM: don't probe PHY address for LaCie boardsSimon Guinot2012-07-07-20/+11
| | | | | | | | | | | | | The command miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr) always returns 8 for the PHY address. It is the reset value for the PHY Address Register. Obviously, this default value could be incorrect. Moreover, as the PHY address is well known, there is no need to auto-detect it. Now, the PHY address must given as a parameter to the PHY initialization function. Additionally this patch also fixes some aesthetic issues. Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
* lacie_kw: fix CONFIG_SYS_KWD_CONFIG for inetspace_v2Simon Guinot2012-07-07-1/+1
| | | | Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
* lacie_kw: fix SDRAM banks number for net2big_v2Simon Guinot2012-07-07-4/+0
| | | | Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
* Kirkwood: add lschlv2 and lsxhl board supportMichael Walle2012-07-07-0/+1049
| | | | | | | | This patch adds support for both the Linkstation Live (LS-CHLv2) and Linkstation Pro (LS-XHL) by Buffalo. Signed-off-by: Michael Walle <michael@walle.cc> Cc: Prafulla Wadaskar <prafulla@marvell.com>
* net: add helper to generate random mac addressMichael Walle2012-07-07-0/+39
| | | | | | | | Add new function eth_random_enetaddr() to generate a locally administered ethernet address. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
* net: use common rand()/srand() functionsMichael Walle2012-07-07-82/+34
| | | | | | | | | Replace rand() with the functions from lib/. The link-local network code stores its own seed, derived from the MAC address. Thus making it independent from calls to srand() in other modules. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* lib: add rand() functionMichael Walle2012-07-07-0/+57
| | | | | | | It's a PRNG using the simple and fast xorshift method. Signed-off-by: Michael Walle <michael@walle.cc> Cc: Wolfgang Denk <wd@denx.de>
* kwboot: boot kirkwood SoCs over a serial linkLuka Perkov2012-07-07-0/+832
| | | | | | | | | | | The kwboot program boots boards based on Marvell's Kirkwood platform via Xmodem over their integrated UART. Signed-off-by: Daniel Stodden <daniel.stodden@googlemail.com> Acked-by: Luka Perkov <uboot@lukaperkov.net> Tested-By: Holger Brunck <holger.brunck@keymile.com> Tested-By: David Purdy <david.c.purdy@gmail.com> Tested-by: Simon Guinot <simon.guinot@sequanux.org>
* kw_spi: add weak functions board_spi_claim/release_busValentin Longchamp2012-07-07-1/+12
| | | | | | | | | | This allows a final, board specific, step in the claim/relase_bus function for the SPI controller, which may be needed for some hardware designs. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* kw_spi: support spi_claim/release_bus functionsValentin Longchamp2012-07-07-0/+47
| | | | | | | | | | | | | These two function nows ensure that the MPP is configured correctly for the SPI controller before any SPI access, and restore the initial configuration when the access is over. Since the used pins for the SPI controller can differ (2 possibilities for each signal), the used pins are configured with CONFIG_SYS_KW_SPI_MPP. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* kw_spi: backup and reset the MPP of the chosen CS pinValentin Longchamp2012-07-07-9/+6
| | | | | | | | | This was not done before, and in the case of a shared pin (for MPP0 between NF_IO[2] and CSn) this could lead to problems. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* kirkwood: fix calls to kirkwood_mpp_confValentin Longchamp2012-07-07-15/+15
| | | | | | | | | With the new second save argument introduced by the previous patch, all the calls to the function had to be fixed. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* kirkwood: add save functionality kirkwood_mpp_conf functionValentin Longchamp2012-07-07-2/+10
| | | | | | | | | | | | | | If a second non NULL argument is given to the kirkwood_mpp_conf function, it will be used to store the current configuration of the MPP registers. mpp_save must be a preallocated table of the same size as mpp_list and it must be zero terminated as well. A later call to kirkwood_mpp_conf function with this saved list as first (mpp_conf) argment will set the configuration back. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* km_arm: use filesize for erase in update commandValentin Longchamp2012-07-07-1/+1
| | | | | | | | | | | | | We used to have an arbitrary value, which can be a problem if we have a u-boot image that is bigger than this value. This patch is dependant on the whole km/arm series and will be included in the v3 of the series if there is one. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* arm/km: enable mii cmdValentin Longchamp2012-07-07-0/+1
| | | | | | | | | This is useful to debug the switch initialization Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* arm/km: remove CONFIG_RESET_PHY_RHolger Brunck2012-07-07-1/+0
| | | | | | | | | This is already defined in the generic kirkwood header. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* arm/km: change maintainer for mgcoge3unHolger Brunck2012-07-07-1/+1
| | | | | | | | Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-By: Heiko Schocher <hs@denx.de> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com>
* arm/km: fix wrong comment in SDRAM config for mgcoge3unHolger Brunck2012-07-07-1/+1
| | | | | | | Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* arm/km: use ARRAY_SIZE macroHolger Brunck2012-07-07-1/+1
| | | | | | | Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* arm/km: rename CONFIG option CONFIG_KM_DEF_ENV_UPDATEHolger Brunck2012-07-07-2/+2
| | | | | | | | | | | | This config option sounds like the it is responsible for the update of the environment, but it is the u-boot update handling. Therefore we adapt it to a more apropriate naming. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* arm/km: add piggy mac adress offset for mgcoge3unHolger Brunck2012-07-07-0/+1
| | | | | | | | | On mgcoge3un the piggy mac adress is at offset 3. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* arm/km: add board type to boards.cfgHolger Brunck2012-07-07-4/+4
| | | | | | | | | | | Some other kirkwood boards from keymile will follow. They will have some small differences, but we want to use the km_kirkwood.h for all to distinguish them. This patch a preparation for this. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* AT91SAM9*: Change kernel address in dataflash to match u-boot's sizeAlexandre Belloni2012-07-07-18/+21
| | | | | | | | | | | | | | | | | | | | | | | On at91sam platforms, u-boot grew larger than the allocated size in dataflash, the layout was: bootstrap 0x00000000 ubootenv 0x00004200 uboot 0x00008400 kernel 0x00042000 fs 0x00252000 u-boot with the defconfig doesn't seem to fit in 0x42000 - 0x8400 = 0x39C00 bytes anymore. Now, the layout is: bootstrap 0x00000000 ubootenv 0x00004200 uboot 0x00008400 kernel 0x00084000 fs 0x00294000 Signed-off-by: Alexandre Belloni <alexandre.belloni@piout.net> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ATMEL/PIO: Enable new feature of PIO on Atmel deviceBo Shen2012-07-07-3/+167
| | | | | | | | Enable new PIO feature supported by Atmel SoC. Using CPU_HAS_PIO3 micro to enable PIO new feature. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ehci-atmel: fix compiler warningAndreas Bießmann2012-07-07-2/+2
| | | | | | | | | | | | | | | | Commit 7a101e946cba55e32d3d1265e30456c810046da3 introduced following warning: ---8<--- ehci-atmel.c: In function 'ehci_hcd_init': ehci-atmel.c:49:2: warning: suggest parentheses around comparison in operand of '&' [-Wparentheses] ehci-atmel.c: In function 'ehci_hcd_stop': ehci-atmel.c:79:2: warning: suggest parentheses around comparison in operand of '&' [-Wparentheses] --->8--- This patch fixes it. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> cc: Bo Shen <voice.shen@atmel.com> cc: Marek Vasut <marex@denx.de>
* AT91: at91sam9m10g45ek : Enable EHCI instead OHCIBo Shen2012-07-07-17/+3
| | | | | | | Enable EHCI support instead OHCI Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Atmel : usb : add EHCI driver for Atmel SoCBo Shen2012-07-07-0/+90
| | | | | | | | | | | | | | | Some Atmel SoC support USB EHCI, add the EHCI driver to support it. To enable the USB EHCI, add the following configuration options into board relative configuration file and remove USB OHCI options. #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_ATMEL #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Fix: AT91SAM9263 nor flash usageesw@bus-elektronik.de2012-07-07-2/+6
| | | | | | | | Fix: board doesn't boot from norflash Fix: environment can't write to flash (end address/start address not on sector boundary) Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Fix: broken boot message at serial line on AT91SAM9263-EK boardesw@bus-elektronik.de2012-07-07-1/+1
| | | | | Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* i.MX6 USDHC: Use the ESDHC clockMichael Langer2012-07-07-0/+4
| | | | | | | | | | | | | | | The commit "i.mx: fsl_esdhc: add the i.mx6q support" (4692708d) introduces support for the i.MX6Q MMC host controller USDHC. MXC_IPG_PERCLK sets the clock to 66MHz. This seems to be the default clock of the ESDHC IP found in < i.MX6 silicon. However, the default clock for the USDHC IP found in i.MX6 is 200MHz (MXC_ESDHC_CLK). This difference will cause a 3 times higher clock on SD_CLK than expected (see fsl_esdh.c -> set_sysctl()). Signed-off-by: Michael Langer <michael.langer@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Jason Liu <r64343@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx28evk: Fix boot by adjusting HW_DRAM_CTL29 registerFabio Estevam2012-07-07-0/+14
| | | | | | | | | | | commit acc4959fc1 (Revert "i.MX28: Enable additional DRAM address bits") broke mx28evk boot. Fix it by properly adjusting the HW_DRAM_CTL29 register value. Suggested-by: Marek Vasut <marex@denx.de> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* i.MX28: Add function to adjust memory parametersMarek Vasut2012-07-07-0/+8
| | | | | | | | | | | | | | This function can be overridden at run-time and allows implementors of new boards based on the i.MX28 chip to fine-tune the memory params. It is possible to write into the dram_vals array because when the SPL runs, it is located SRAM. Therefore the location is writable. There is no possibility of these data to be read-only. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com>
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