| Commit message (Collapse) | Author | Age | Lines |
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This patch modifies the MAX98095 audio codec to support
I2S0 channel in codec slave mode.
Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
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This patch makes required changes to make use
of I2S0 channel instead of I2S1 channel on exynos5250.
Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
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This patch makes the necessary changes for making use of
I2S0 channel instead of I2S1 channel on smdk board. This
changes are done to maintain the uniformity to use I2S0 channel.
Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
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This patch enables default I2S0 channel.And I2S platform
parameter has been moved to a common file viz exynos5.dtsi.
Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
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This patch modifies the WM8994 codec to support I2S0 channel
in codec slave mode
Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
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When we call do_bootm() with a vmlinuz, this would lead to a NULL
pointer dereference, and after talking with Wolfgang the right thing to
do here for now is to make sure that we pass cmdtp to these functions
rather than NULL.
Reported-by: Steven A. Falco <stevenfalco@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
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In 5c427e4 we pass BOOTM_STATE_OS_CMDLINE as part of the bootm states to
run, on all arches. However, this is only valid / useful on PowerPC and
MIPS, and causes a problem on ARM where we specifically do not use it.
Rather than make this state fake pass like we do for GO on some arches
(which need updating to use the GO state), we should just not pass
CMDLINE except when it may be used, like before.
Tested-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
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The patch fixes the improper read and write of sdhci
host control register for sdma transfer.
The problem comes when reading and writing 1 byte long
host control register with the sdhci_readl() and
sdhci_writel(). The misuse of these functions overwrite
the value of the next registers which are in 4 bytes boundary.
This patch replaces four byte register read/write functions
with one byte read/write ones. Beside, it eliminates
unnecessary bit operation. i.e. or-ing zero against a variable.
Signed-off-by: Juhyun (Justin) Oh <Juhyun_Oh@sigmadesigns.com>
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Without those it's very easy to make mistakes when for instance
the 'size' field is more than just a constant.
Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Anton Staaf <robotboy@chromium.org>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
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This fixes two issues:
* a descriptor was allocated for every block, while a descriptor can
take 8 blocks
* there was an off-by-one error in the descriptor preparation: there
were two last descriptors, one with length==0
Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Andy Fleming <afleming@gmail.com>
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In dwmci_prepare_data, the descriptors are allocated for DMA transfer.
These are allocated using the ALLOC_CACHE_ALIGN_BUFFER. This macro uses
the stack to allocate these descriptors. This becomes a problem if the
DMA transfer continues after the processor leaves the function in which
the descriptors were allocated.
Therefore, I have moved the allocated of the buffers up one level, to
dwmci_send_cmd(). The DMA transfer should be complete when leaving this
function.
Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Andy Fleming <afleming@gmail.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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For SPL builds this is just dead code since we'll only need to read.
Eliminating it results in a significant size reduction for the SPL
binary, which may be critical for certain platforms where the binary
size is highly constrained.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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When CONFIG_MMC_SPI is not enabled, the MMC_MODE_SPI capability can
never be set. However there is code in mmc.c which uses the
mmc_host_is_spi macro to check that capability & act accordingly. If we
expand that macro to 0 when CONFIG_MMC_SPI is not set (since it will
always be 0 at runtime anyway) then the compiler can optimize away the
SPI-specific code paths in mmc.c.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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If we don't have CONFIG_SPL_LIBCOMMON_SUPPORT defined then stdio
& *printf functions are unavailable & calling them will cause a link
failure.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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If we don't have CONFIG_SPL_LIBCOMMON_SUPPORT defined then stdio
functions are unavailable & calling them will cause a link failure.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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ARM is the only architecture which includes this header and nothing in
spl_mmc.c makes use of it. Remove the include.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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Enable 8-bit host capability for HSMMC2 and/or HSMMC3. CONFIG_HSMMC2_8BIT
(for OMAP4/5/DRA7xx) and/or CONFIG_HSMMC3_8BIT (for DRA7xx only) must be
defined in the board header if an 8-bit eMMC device is connected to the
corresponding port.
Fix the "No status update" error that appeared for eMMC devices by
inserting a 20 us delay between writing arguments and command. This
solution has been proposed by Michael Cashwell <mboards@prograde.net>.
A minor cosmetic fix in a comment as well.
Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
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"mmc_send_cmd: timeout: No status update" error sometimes happens in
omap_hsmmc driver func mmc_send_cmd() when the MMC controller card
identification and selection sequence is executed for eMMC on OMAP4
boards.
It happens due to incorrect execution of CMD line reset procedure
for OMAP4. Because CMD(DAT) lines reset procedures are slightly
different for OMAP3 and OMAP4(AM335x,OMAP5,DRA7xx).
According to OMAP3 TRM:
Set SRC(SRD) bit in MMCHS_SYSCTL register to 0x1 and wait until
it returns to 0x0.
According to OMAP4(AM335x,OMAP5,DRA7xx) TRMs, CMD(DATA) lines reset
procedure steps must be as follows:
1. Initiate CMD(DAT) line reset by writing 0x1 to SRC(SRD) bit in
MMCHS_SYSCTL register (SD_SYSCTL for AM335x).
2. Poll the SRC(SRD) bit until it is set to 0x1.
3. Wait until the SRC(SRD) bit returns to 0x0
(reset procedure is completed).
Unfortunately, at present omap_hsmmc driver has support only for
OMAP3. And as result step #2 is missing for OMAP4(AM335x,OMAP5,DRA7xx).
This sometimes leads to the fact that the waiting loop which is
required in step #3 does not executed, because SRC bit does not set
yet (at the moment of checking a condition of a loop execution).
And as a result this can cause to timeout error when sending a
next command.
In the particular case (working with eMMC witch do not respond to
some SD specific command) due to incorrect reset sequence after
command SD_CMD_SEND_IF_COND which finished with CTO flag within
64 clock cycles, the next command MMC_CMD_APP_CMD leads to a
timeout error within 1s.
So, extend CMD(DATA) lines reset procedure in func
mmc_reset_controller_fsm() by adding the missing step #2 for
OMAP4+/AM335x boards.
Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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Do not call a memset for unused variable backup every time.
Remove unused variable from function.
Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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Samsung SoC is supported the WIDE8, even if Controller version is v2.0.
So add the SDHCI_QUIRK_USE_WIDE8 for Samsung-SoC.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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Commit 27af930e9a5c91365ca639ada580b338eabe4989 changed the boards.cfg format
but missed to change the parsing in buildman.
This patch changes c'tor of Board class to the new sequence, but omits
maintainer field.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Becuase fdt_check_header function takes (const void *)
type argument, the argument should be passed to it
without being casted to (char *).
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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In commit 27af930, the top Makefile was adjusted to the new
boards.cfg format.
But at the same time, -d option was added.
If you configure and make separately, for example
like follows:
make omap4_panda_config
make CROSS_COMPILE=<your_compiler_prefix>
it works fine as it did before.
But if you do them in one time like follows:
make omap4_panda CROSS_COMPILE=<your_compiler_prefix>
The log is sprinkled with annoying make debug messages.
This commit deletes -d option again.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Nishanth Menon <nm@ti.com>
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Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
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The SPDX License List version 1.19 now contains an official entry for
the IBM-pibs license. However, instead of our suggestion "ibm-pibs",
the SPDX License List uses "IBM-pibs", with the following rationale:
"The reason being that all other SPDX License List short identifiers
tend towards using capital letters unless spelling a word. I'd prefer
to be consistent to this end".
Change the license IDs to use the official name.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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Fix various misspellings of things like "environment", "kernel",
"default" and "volatile", and throw in a couple grammar fixes.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
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Update git-mailrc with alias and nick name details.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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Tidy up, reorder, and add newer info to the arch/ directory subsection
of the README file.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
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Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Signed-off-by: Roger Meier <roger@bufferoverflow.ch>
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Add the missing bang (!) to execute external command, otherwise it does not
work.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
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the gpt_pte wasn't being freed if it was checked against an invalid
partition. The resulting memory leakage could make it impossible
to repeatedly attempt to load non-existent files in a script.
Also, downgrade the message for not finding an invalid partition
from a printf() to a debug() so as to minimize message spam in
perfectly normal situations.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
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Netconsole calls eth_halt() before giving control to another operating
system.
But the state machine of netconsole don't take it into account.
Thus, netconsole calls network functions of an halted network device,
making the whole system freeze.
Rather than modifying the state machine of netconsole, we just unregister
the current network device before booting. It does work because
nc_send_packet() verifies that the current network device is not null.
Signed-off-by: Frédéric Leroy <fredo@starox.org>
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Typoes fixed:
"partion" -> "partition"
"retrive", "retreive" -> "retrieve"
"th" -> "to"
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
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A plain bootm used to call the architecture specific boot function with
no flags, but was modified by commit 35fc84fa "Refactor the bootm
command to reduce code duplication" to call the architecture specific
boot function multiple times with various flags in sequence. The
BOOTM_STATE_OS_CMDLINE flag was not used, indeed it seems that at least
ARM prepares the command line on BOOTM_STATE_OS_PREP. However on MIPS
since commit 59e8cbdb "MIPS: bootm: refactor initialisation of kernel
cmdline" the command line is not prepared in response to a
BOOTM_STATE_OS_PREP flag, only on BOOTM_STATE_OS_CMDLINE or a call with
no flags. The end result is that a combination of those 2 commits leads
to MIPS boards booting kernels with no command line arguments.
An extra invocation of the architecture specific boot function with
BOOTM_STATE_OS_CMDLINE fixes this.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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Signed-off-by: Tom Rini <trini@ti.com>
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Since "sf update" erases the last block as a whole, but only rewrites
the meaningful initial part of it, the rest would be left erased,
potentially erasing meaningful information.
So, as a safety measure, have it rewrite the original content.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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The chipselect must be written into the CTRL0 register after the SSP
block is reset, otherwise the block will always use ChipSelect #0.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
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In a very rare condition, a system hang is possible when the e500 core
initiates a guarded load to PCI / PCIe /SRIO performs a coherent write
to memory. Please refer to errata document for more details. This erratum
applies to the following SoCs and their variants, if any.
BSC9132
BSC9131
MPC8536
MPC8544
MPC8548
MPC8569
MPC8572
P1010
P1020
P1021
P1022
P1023
P2020
C29x
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
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Without this patch, SPD access will fail which leads to DDR init fail.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
Acked-by: York Sun <yorksun@freescale.com>
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After further testing, this patch has two problems. First,
examples/standalone/Makefile was already inherting PLATFORM_LIBS from
the top-level Makefile so this lead to duplicating the private libgcc.
Second, currently the private libgcc has a reference to 'hang' that is
not being fulfilled.
This reverts commit 4412db46468d5965da736d06f84d13e68a6e0b51.
Signed-off-by: Tom Rini <trini@ti.com>
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Put all informations about targets, including state (active or
orphan) and maintainers, in boards.cfg; remove MAINTAINERS;
adjust the build system accordingly.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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Conflicts:
tools/Makefile
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This change allow to use sd card on Goni the same like mmc 0.
SD card is mmc dev 1, so it can be used like this: "fatls mmc 1:2".
SD card is inited even if eMMC initialization fails.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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On s5pc1xx mmc devices offset is multiply of 0x100000,
wrong value was 0x10000. Register offset always points
to mmc 0 before this change.
Add macro definition of mmc dev register offset to s5pc1xx and
exynos mmc.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung at samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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