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* kirkwood: kwbimage: refactor CONFIG_SYS_KWD_CONFIGMasahiro Yamada2014-03-12-18/+13
| | | | | | | | | | | | | | | | | | Pull out "$(SRCTREE)/" from CONFIG_SYS_KWD_CONFIG and push it into the top Makefile. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Michael Walle <michael@walle.cc> Cc: Simon Guinot <simon.guinot@sequanux.org> Cc: Dave Purdy <david.c.purdy@gmail.com> Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Cc: Luka Perkov <luka@openwrt.org> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Jason Cooper <u-boot@lakedaemon.net> Cc: Siddarth Gore <gores@marvell.com> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Eric Cooper <ecc@cmu.edu> Cc: Suriyan Ramasami <suriyan.r@gmail.com>
* freescale: pblimage: refactor CONFIG_SYS_FSL_PBL_{PBI, RCW}Masahiro Yamada2014-03-12-27/+22
| | | | | | | | | | Pull out "$(SRCTREE)/" from CONFIG_SYS_FSL_PBL_PBI and CONFIG_SYS_FSL_PBL_RCW and push it into the top Makefile. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: York Sun <yorksun@freescale.com> Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
* kbuild: delete redundant LDSCRIPT definitionMasahiro Yamada2014-03-12-6/+0
| | | | | | | | | | | | | $(SRCTREE)/$(CPUDIR)/u-boot.lds is our default location of arch-specific linker script. Remove redundant definitions in arch/{arc,microblaze,openrisc}/config.mk. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Alexey Brodkin <Alexey.Brodkin@synopsys.com> Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Acked-by: Michal Simek <monstr@monstr.eu>
* x86: specify CONFIG_USE_PRIVATE_LIBGCC more simplyMasahiro Yamada2014-03-12-3/+1
| | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org>
* kbuild, x86: use a short log for arch/x86/lib/libgcc.aMasahiro Yamada2014-03-12-2/+3
| | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org>
* kbuild: use short logs for some board specific make rulesMasahiro Yamada2014-03-12-5/+26
| | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: David Updegraff <dave@cray.com> Cc: Andre Schwarz <andre.schwarz@matrix-vision.de>
* kbuild,mxs: use short logs for MXS imagesMasahiro Yamada2014-03-12-15/+16
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Lauri Hintsala <lauri.hintsala@bluegiga.com> Acked-by: Marek Vasut <marex@denx.de>
* usb: net: update README.usb to list all USB ethernet optionsGerhard Sittig2014-03-12-2/+11
| | | | | | | | | | | | | - extend the discussion of USB network related config options such that all available adapter drivers are listed, and that the 'usb' command for the interactive prompt and scripting becomes available - suggest to *not* put individual IP configuration parameters into the exectuable, but instead to put them into external environment or fetch them from network Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* at91: enable USB ethernet for taskit stamp9g20Gerhard Sittig2014-03-12-1/+4
| | | | | | | | | | | enabling CONFIG_MACB makes other locations in the stamp config file enable network related commands (actually prevents disabling them) enable USB ethernet support by activating generic support as well as Asix and Moschip ethernet adapters Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Andreas Bießman <andreas.devel@googlemail.com>
* tegra: imx: omap: enable Moschip USB ethernet support for several boardsGerhard Sittig2014-03-12-0/+5
| | | | | | | | | | enable support for the Moschip USB ethernet adapter for those boards which previously had support for "all other" USB ethernet adapters (that's Asix _and_ SMSC) enabled -- which applies to harmony, m53evk, mx53loco, nitrogen6x, omap3_beagle Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* tegra: omap: alpha-sort USB ethernet items for Asix and SMSCGerhard Sittig2014-03-12-2/+2
| | | | | | | | | adjust the harmony and omap3_beagle board configs to make their CONFIG_USB_ETHER_* items appear in alphabetical order Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* usb: net: introduce support for Moschip USB ethernetGerhard Sittig2014-03-12-0/+826
| | | | | | | | | | | | | | | introduce an 'mcs7830' driver for Moschip MCS7830 based (7730/7830/7832) USB 2.0 Ethernet Devices see "MCS7830 -- USB 2.0 to 10/100M Fast Ethernet Controller" at http://www.asix.com.tw/products.php?op=pItemdetail&PItemID=109;74;109 the driver was implemented based on the U-Boot Asix driver with additional information gathered from the Moschip Linux driver, development was done on "Delock 61147" and "Logilink UA0025C" dongles Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* usb: net: don't ifdef routine declarations in usb_ether.hGerhard Sittig2014-03-12-6/+2
| | | | | | | | | | | | while compilation of implemented routines and references from calling sites may be optional, declarations in header files should not be unconditionally declare the Asix and SMSC related public USB ethernet driver routines in the usb_ether.h header file Signed-off-by: Gerhard Sittig <gsi@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* fw_env: correct writes to devices with small erase blocksDustin Byford2014-03-12-2/+2
| | | | | | | | | | | | | | | | | Some NOR flash devices have a small erase block size. For example, the Micron N25Q512 can erase in 4K blocks. These devices expose a bug in fw_env.c where flash_write_buf() incorrectly calculates bytes written and attempts to write past the environment sectors. Luckily, a range check prevents any real damage, but this does cause fw_setenv to fail with an error. This change corrects the write length calculation. The bug was introduced with commit 56086921 from 2008 and only affects configurations where the erase block size is smaller than the total environment data size. Signed-off-by: Dustin Byford <dustin@cumulusnetworks.com>
* fw_env: calculate default number of env sectorsDustin Byford2014-03-12-7/+9
| | | | | | | | | | | | | | | The assumed number of environment sectors (always 1) leads to an incorrect top_of_range calculation in fw.env.c when a flash device has an erase block size smaller than the environment data size (number of environment sectors > 1). This change updates the default number of environment sectors to at least cover the size of the environment. Also corrected a false statement about the number of sectors column in fw_env.config. Signed-off-by: Dustin Byford <dustin@cumulusnetworks.com>
* boards.cfg: Run the reformatter scriptTom Rini2014-03-11-20/+20
| | | | | | Some recent changes got parts of the file out of order again, correct. Signed-off-by: Tom Rini <trini@ti.com>
* boards.cfg: move boards with invalid emails to OrphanMasahiro Yamada2014-03-11-60/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When I cc board maintainers, some of them result in bounce mails. It turned out the following do not work any more: Yuli Barcohen <yuli@arabellasw.com> Travis Sawyer <travis.sawyer@sandburst.com> Yusdi Santoso <yusdi_santoso@adaptec.com> David Updegraff <dave@cray.com> Sangmoon Kim <dogoil@etinsys.com> Anton Vorontsov <avorontsov@ru.mvista.com> Blackfin Team <u-boot-devel@blackfin.uclinux.org> Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org> Andre Schwarz <andre.schwarz@matrix-vision.de> For the blackfin boards where Sonic Zhang is also listed as a maintainer, dead addresses should be simply dropped. For all of the others, the status should be changed to "Orphan". We have adopted the definition of "Orphan" as: board is not actively maintained any more but still builds, and any address associated with it is that of the last known maintainer(s) Even though the emails do not work any more, they carry information. We want to keep them. Besides, Orphan boards have been collected at the bottom of boards.cfg. (This is done when we run "tools/reformat.py") Add separators to distinguish them from those which were moved to Orphan 6 months ago. I believe it will be helpful in future to find which boards are old enough to be removed from the code base. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Detlev Zundel <dzu@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* Prepare v2014.04-rc2Tom Rini2014-03-10-1/+1
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-03-10-91/+983
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| * arm: atmel: sama5d3: add nand spl boot supportBo Shen2014-03-09-0/+18
| | | | | | | | | | | | | | Add NAND SPL boot support with hardware PMECC. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * mtd: nand: atmel: prepare for nand spl boot supportBo Shen2014-03-09-0/+214
| | | | | | | | | | | | | | | | | | Prepare for nand spl boot support. It supports nand software ECC and hardware PMECC. This patch is take <drivers/mtd/nand/nand_spl_simple.c> as reference. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: atmel: sama5d3: add spi spl boot supportBo Shen2014-03-09-0/+17
| | | | | | | | | | | | | | Add SPI SPL boot support for sama5d3xek board. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * ARM: atmel: add sama5d3 Xplained board supportBo Shen2014-03-09-0/+350
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add sama5d3 Xplained board support which use Atmel SAMA5D36 SoC. Now it supports boot from NAND flash and SD/MMC card. Features support: - NAND flash - SD/MMC card - Two USB hosts - Ethernet (one GMAC, one EMAC) Signed-off-by: Bo Shen <voice.shen@atmel.com> [reorder boards.cfg] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * at91 gpio: fix typo in compatibility macroAndreas Henriksson2014-03-09-1/+1
| | | | | | | | | | | | | | | | | | | | It's called _pio_ in the version that was added to git. Apparently it got renamed without updating the macros before it was applied, c.f. http://u-boot.10912.n7.nabble.com/U-Boot-PATCH-3-9-V3-add-a-new-AT91-GPIO-driver-td75922.html Signed-off-by: Andreas Henriksson <andreas.henriksson@endian.se> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * at91sam9263ek: add mmc supportAndreas Henriksson2014-03-09-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for using the Atmel MCI driver on at91sam9263ek. This change is modeled after the existing at91sam9260ek support. Please note that this hooks up slot1 (MCI1) for SD. Not both. Tested with at91bootstrap and u-boot on dataflash in slot 0 and fat-formatted 8GB SDHC in slot 1 on first revision at91sam9263ek (which must use dataflash in slot0 to boot). CONFIG_ATMEL_MCI_PORTB not tested. Signed-off-by: Andreas Henriksson <andreas.henriksson@endian.se> [remove empty line] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-07-51/+95
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| | * ARM: tegra: implement bootcmd_pxeStephen Warren2014-03-05-1/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | This retrieves a PXE config file over the network, and executes it. This allows an extlinux config file to be retrieved over the network and executed, whereas the existing bootcmd_dhcp retrieves a U-Boot script. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: rework boot scriptsStephen Warren2014-03-05-9/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the common Tegra boot scripts in the default environment to a) Make use of the new "test -e" shell command to avoid some error messages. b) Allow booting using the sysboot command and extlinux.conf. This allows easy creation of boot menus, and provides a simple interface for distros to parameterize/configure the boot process. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: convert tegra to use distro defaultsStephen Warren2014-03-05-16/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Modify all Tegra boards to include the "distro defaults" header, so that all the config options distros expect are enabled. Remove any #defines that enable the same options from the Tegra files. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: set CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTSStephen Warren2014-03-05-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra's EHCI controllers only have a single PORTSC register. Configure U-Boot to know this. This prevents e.g. ehci_shutdown() from touching non-existent registers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: simplify halt_avp()Stephen Warren2014-03-05-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to completely halt the AVP processor, we should simply write FLOW_MODE_STOP without any extra options that allow wakeup. Amend the code to do this. I believe that enabling FIQ_1 and IRQ_1 allow the CPU to be awoken by interrupts. We don't want this; if later SW wishes to use the AVP, it should be reset and booted from scratch. Related, the bits that were previously IRQ_1 and FIQ_1 have a slightly different definition starting with Tegra114, so the values we're writing don't entirely make sense there anyway. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: fix NV_PA_CSITE_BASE for Tegra124Stephen Warren2014-03-05-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Tegra124 moved the CSITE block's base address. Fix U-Boot to use the correct address. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: fix pmc_pwrgate_timer_mult register definitionStephen Warren2014-03-05-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register pmc_pwrgate_timer_mult has a different layout on Tegra114 and Tegra124. Reflect this in pmc.h. Also, simply write the whole of the register in start_cpu() rather than doing a read-modify-write; the register is simple enough that the code can easily construct the entire desired value. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * ARM: tegra: move CONFIG_TEGRAnnStephen Warren2014-03-05-20/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | <asm/arch-tegra/tegra.h> needs to use CONFIG_TEGRA* to conditionalize some definitions, since some modules moved between generations. Move the definition of CONFIG_TEGRAnn to a header that's included earlier, so that it's set by the time tegra.h needs to use it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | OMAP3: igep00x0: Enable required clocks for GPIO that are used.Enric Balletbo i Serra2014-03-06-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable required clocks for GPIO to fix a boot issue introduced by commit f33b9bd3984fb11e1d8566a866adc5957b1e1c9d (arm: omap3: Enable clocks for peripherals only if they are used). Without this patch the u-boot freezes after the following messages OMAP36XX/37XX-GP ES1.2, CPU-OPP2, L3-200MHz, Max CPU Clock 1 Ghz IGEPv2 + LPDDR/NAND I2C: ready DRAM: 512 MiB NAND: 512 MiB MMC: OMAP SD/MMC: 0 Diving into the issue, the sequence that produces the u-boot freezes is setup_net_chip |--> gpio_direction_out |--> _set_gpio_dataout |--> __raw_writel To avoid this we just need enable the clocks for GPIOs that are used, but it would be interesting implement a mechanism to protect these situations and make sure that the clock is enabled when we request a GPIO. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
| * | board/BuR/common: fix phy addressesHannes Petermaier2014-03-06-2/+2
| |/ | | | | | | | | | | | | | | B&R boards are using Phy Addresses 'one' and 'two', prior this was defined through #define PHYADDR 1 within a header file. Now this is addresses are given with device-driver structure. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
| * arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootupStefan Roese2014-03-04-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | Since the switch may be re-configured for VLAN usage in Linux (or any other OS), lets reset the switch to its default register values upon power-up. Otherwise network might not be available in U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Roger Meier <r.meier@siemens.com> Cc: Lukas Stockmann <lukas.stockmann@siemens.com> Cc: Tom Rini <trini@ti.com>
| * ARM: AM43xx: Change DDR3 Reset ValueDave Gerlach2014-03-04-1/+1
| | | | | | | | | | | | | | | | | | The bit DDR3_RST_DEF_VAL inside CTRL_DDR_IO represents the default value of the ddr reset value for DDR3 before the EMIF takes over. We must have this bit set high so that on exit from DeepSleep0 within the kernel the reset line has the proper value. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
| * ARM: AM43xx: Write sdram_config to secure_emif_sdram_configDave Gerlach2014-03-04-0/+1
| | | | | | | | | | | | | | | | | | The register secure_emif_sdram_config in control module is copied to the EMIF sdram_config register when it is coming out of DeepSleep0 in order to ensure that the EMIF comes up for the correct type of DDR. Without this, resume can hang from within the kernel. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
| * ARM: AM43xx: EMIF: configure self-refresh entry delayDave Gerlach2014-03-04-2/+2
| | | | | | | | | | | | | | | | | | | | Per a suggestion from the hardware team, program the emif_pwr_mgmt_ctrl and emif_pwr_mgmt_ctrl_shdw registers within the EMIF to hold the desired delay in cycles that the EMIF waits without an access to enter self-refresh, in this case 8192 cycles. With this, code desiring to enter self refresh only has to toggle one bit to enable it. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
| * ARM: AM43xx: Add Ethernet boot support to SPLMugunthan V N2014-03-04-4/+8
| | | | | | | | | | | | | | Add Ethernet Boot support to SPL Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * ARM: AM4372: Update EMIF registers for DDR3Lokesh Vutla2014-03-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Updating EMIF_PHY_CTRL and adding EMIF_READ_WRITE_EXECUTION_THRESHOLD registers. In EMIF_PHY_CTRL: Updating [4:0]READ_LATENCY to 8, because at higher frequencies like 400MHz the read latency expected will be CL+3 as per tests from HW folks. Clearing [19]PHY_DIS_CALIB_RST bit as this is used onl for debug purpose. With out this resume is not working(Still waiting for PHY team to come back for better explanation). Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: DRA7xx: add support for reading cpsw 2nd mac from efuseMugunthan V N2014-03-04-0/+15
| | | | | | | | | | | | | | | | | | Adding support for reading cpsw 2nd mac address from efuse and pass it to kernel via dtb which will be used in dual emac mode of cpsw. Also correct the bit masking of mac id read from the efuse. Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * ARM: AM335x: add support for reading cpsw 2nd mac address from efuseMugunthan V N2014-03-04-0/+16
| | | | | | | | | | | | | | | | | | Adding support for reading cpsw 2nd mac address from efuse and pass it to kernel via dtb which will be used in dual emac mode of cpsw. Also adding mii command support to am335x common config. Acked-by: Tom Rini <trini@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * ARM: AM43xx: Add CPSW support to AM43xx EPOS and GP EVMMugunthan V N2014-03-04-2/+162
| | | | | | | | | | | | | | | | Adding support for CPSW to AM43xx EPOS nad GP EVM which is connected to RMII and RGMII phy respectively and enable cpsw in config. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * ARM: AM43xx: clocks: Enable CPGMAC clock controlMugunthan V N2014-03-04-0/+1
| | | | | | | | | | | | Enable CPGMAC clock control for AM43xx to use ethernet in U-Boot Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * drivers: net: cpsw: add support to have phy address from cpsw platform dataMugunthan V N2014-03-04-33/+22
| | | | | | | | | | | | | | | | | | | | | | | | Some platforms like AM437x have different EVMs with different phy addresses, so this patch adds support for passing phy address via cpsw plaform data. Also renamed phy_id to phy_addr so better understanding of the code. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> [trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335 pengwyn boards] Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2014-03-10-997/+149
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| * | usb: create common header virtual root hub descriptorsStephen Warren2014-03-10-995/+143
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many USB host controller drivers contain almost identical copies of the same virtual root hub descriptors. Put these into a common file to avoid duplication. Note that there were some very minor differences between the descriptors in the various files, such as: - USB 1.0 vs. USB 1.1 - Manufacturer/Device ID - Max packet size - String content I assume these aren't relevant. Cc: Thomas Lange <thomas@corelatus.se> Cc: Shinya Kuribayashi <skuribay@pobox.com> Cc: Gary Jennejohn <garyj@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Eric Millbrandt <emillbrandt@coldhaus.com> Cc: Pierre Aubert <p.aubert@staubli.com> Cc: Stefan Roese <sr@denx.de> Cc: Daniel Hellstrom <daniel@gaisler.com> Cc: Denis Peter <d.peter@mpl.ch> Cc: Rodolfo Giometti <giometti@linux.it> Cc: Zhang Wei <wei.zhang@freescale.com> Cc: Mateusz Zalega <m.zalega@samsung.com> Cc: Remy Bohmer <linux@bohmer.net> Cc: Markus Klotzbuecher <mk@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Gary Jennejohn <garyj@denx.de> Cc: C Nauman <cnauman@diagraph.com> Cc: David Müller <d.mueller@elsoft.ch> Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Thomas Abraham <t-abraham@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Andrew Murray <amurray@embedded-bits.co.uk> Cc: Matej Frančeškin <matej.franceskin@comtrade.com> Cc: Cliff Cai <cliff.cai@analog.com> Cc: Bryan Wu <cooloney@gmail.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
| * | usb: ehci: fully align interrupt QHs/QTDsStephen Warren2014-03-10-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | These data structures are passed to cache-flushing routines, and hence must be conform to both the USB the cache-flusing alignment requirements. That means aligning to USB_DMA_MINALIGN. This is important on systems where cache lines are >32 bytes. Signed-off-by: Stephen Warren <swarren@nvidia.com>
generated by cgit v1.1 at 2024-12-26 05:10:03 +0000