| Commit message (Collapse) | Author | Age | Lines |
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The ext4write command was taking the in-memory address and filename path
in reverse order from the rest of the filesystem read and write
commands. This corrects the order to be the same as fatload, etc.
Signed-off-by: Tom Rini <trini@ti.com>
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usleep_range() is a Linux facility, ignore it when udelay()
is encountered.
Signed-off-by: Matt Porter <mporter@ti.com>
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While the kernel mainly uses pr_debug(...), etc, for debug messages, we
use debug(...). Add this to the list of logFunctions so that they are
correctly checked (and not warned against) for long string literals.
Signed-off-by: Tom Rini <trini@ti.com>
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This is not called outside of env_callback.c so mark static, remove from
<env_callback.h>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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This allows:
MAKEALL -s tegra
to replace:
MAKEALL -s tegra20 -s tegra30 -s tegra114
The following also works:
MAKEALL -s tegra -s omap
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The verify code is broken on archs with signed char. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This command is useful for measuring SPI flash load times and the like.
Enable gettime as well to obtain absolute time tick values.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Turn on SPI flash support and related commands.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Add a memory-mapped 8GB SPI chip.
Signed-off-by: Simon Glass <sjg@chromium.org>
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It is possible that our PCI bus will provide the SPI controller, so change
the init order to make this work.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enable device tree control of SPI flash, and use this to implement
memory-mapped SPI flash, which is supported on Intel chips.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This SPI controller can only write 64 bytes at a time. Add this restriction
in so that 'sf write' works correct for blocks larger than 64 bytes.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of
bytes that can be in a write transaction. Support this by breaking the
writes into multiple transactions.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Some SPI controllers (e.g. Intel ICH) have a limit on the number of SPI
bytes that can be written at a time. Add this as a parameter so that
clients of the SPI interface can respect this value.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This supports Intel ICH7/9. The Intel controller is a little unusual in
that it is mostly intended for use with SPI flash, and has some
optimisations and features specifically for that application. In
particular it is not possible to support ongoing transactions that
continue over many calls with SPI_XFER_BEGIN and SPI_XFER_END.
This driver supports writes of up to 64 bytes at a time, the limit
for the controller. Future work will improve this.
Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
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Rather than each device having its own way to allocate a SPI flash
structure, use the new allocation function everywhere. This will make it
easier to extend the interface without breaking devices.
Signed-off-by: Simon Glass <sjg@chromium.org>
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At present it is difficult to extend the SPI flash structure since
all devices allocate it themselves, and few of them zero all fields.
Add a new function spi_flash_alloc() which can be used by SPI devices
to perform this allocation, and thus ensure that all devices can
better cope with SPI structure changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Rather than each driver having its own way to allocate a SPI slave,
use the new allocation function everywhere. This will make it easier
to extend the interface without breaking drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
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At present it is difficult to extend the SPI structure since all
drivers allocate it themselves, and few of them zero all fields. Add
a new function spi_alloc_slave() which can be used by SPI drivers
to perform this allocation, and thus ensure that all drivers can
better cope with SPI structure changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
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It is common to have a "reg = <address size>" property in the FDT.
Add a function to handle this, similar to the existing
fdtdec_get_addr();
Signed-off-by: Simon Glass <sjg@chromium.org>
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Use the ability to have several active EHCI controller on a system
in the PCI EHCI controller implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enable PCI EHCI, storage, keyboard and Ethernet for USB.
Signed-off-by: Simon Glass <sjg@chromium.org>
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[port of Linux kernel commit bcd218be5aeb by Steve Glendinning]
The eeprom read & write commands currently check the E2P_CMD_LOADED_ bit is
set before allowing any operations. This prevents any reading or writing
unless a correctly programmed EEPROM is installed.
Signed-off-by: Michael Spang <spang@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
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The interrupt endpoint handling code stores the buffer pointer in the QH
padding field. We need to make it the size of a pointer to avoid strict
aliasing issue with the compiler.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
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Interrupt transfers aren't meant to be used from the async list
(the EHCI spec indicates trouble with low/full-speed intr on async).
Build a periodic list instead, and provide an API to make use of it.
Then, use that API from the existing interrupt transfer API.
This provides support for USB keyboards using EHCI.
Use timeouts to ensure we cannot get stuck in the keyboard scanning
if something wrong happens (USB device unplugged or fatal I/O error)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
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Enabling the non-dt path for the driver so that
we don't get any build errors for non-dt configuration.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
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With current FDT support driver tries to parse device node
twice in ehci_hcd_init() and ehci_hcd_stop(), which shouldn't
happen ideally.
Making provision to store data in a global structure and thereby
passing its pointer when needed.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
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This patch enables new "ums" command on Trats board
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
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This patch adds the USB Mass Storage Gadget to u-boot
New command called "ums" is implemented to provide access
to on-device embedded persistent memory.
USB Mass Storage is supposed to work on top of the USB
Gadget framework
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Marek Vasut <marek.vasut@gmail.com>
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The f_mass_storage.c source file from v2.6.36 Linux kernel.
commit 8876f5e7d3b2a320777dd4f6f5301d474c97a06c
Author: Michal Nazarewicz <m.nazarewicz@samsung.com>
Date: Mon Jun 21 13:57:09 2010 +0200
USB: gadget: f_mass_storage: added eject callback
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Marek Vasut <marek.vasut@gmail.com>
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The storage_common.c source file from v2.6.36 Linux kernel.
commit d26a6aa08b9f12b44fb1ee65625e7480d3d5bb81
Author: Michal Nazarewicz <m.nazarewicz@samsung.com>
Date: Mon Nov 9 14:15:23 2009 +0100
USB: g_mass_storage: code cleaned up and comments updated
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Marek Vasut <marek.vasut@gmail.com>
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interface
This commit fixes problems with some non-standard requests send with
device address instead of interface address (bmRequestType.Receipent field).
This happens with dfu-util (debian version: 0.5), which address non standard
requests (like w_value=0x21 and bRequest=GET_DESCRIPTOR) to device.
Without this fix, the above request is STALLED, and hence causes dfu-util
to assume some standard configuration (packet size = 1024B instead of 4096B)
In turn it displays following errors:
Error obtaining DFU functional descriptor
Warning: Assuming DFU version 1.0
Warning: Transfer size can not be detected
...
Warning: Trying default transfer size 1024
This fix allows passing non-standard request to function setup code, where
it shall be handled.
Tested at: Trats (exynos4210)
Tested with:DFU and UMS gadgets
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
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Increase buffer sizes at driver and tty level to accommodate kermit
large packet support.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
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Add EHCI support for spear boards
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
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When both CONFIG_USB_GADGET & CONFIG_USB_ETHER are defined
the makefile links objects twice.
This patch uses a Makefile specific idiom of
'if defined(CONFIG_USB_GADGET) || defined(CONFIG_USB_ETHER)'
to handle the case.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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Dealing with raw block numbers with the dfu is very annoying.
Introduce a partition method.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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Zero out timeout value; letting it filled with undefined values
ends up with the dfu host hanging.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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Fix obvious crash when not enough arguments are given to the dfu
command.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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USB initialization shouldn't happen for all the boards.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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On EHCI controller with 64-bit address space support, we must initialize
properly the high word for the PCI bus master accesses.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
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Instead of hardcoding the PCI IDs on the USB controller, use the PCI
class to detect them.
Ensure the busmaster bit is properly set in the PCI configuration.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Albert's rework of the linker scripts conflicted with Simon's making
everyone use __bss_end. We also had a minor conflict over
README.scrapyard being added to in mainline and enhanced in
u-boot-arm/master with proper formatting.
Conflicts:
arch/arm/cpu/ixp/u-boot.lds
arch/arm/cpu/u-boot.lds
arch/arm/lib/Makefile
board/actux1/u-boot.lds
board/actux2/u-boot.lds
board/actux3/u-boot.lds
board/dvlhost/u-boot.lds
board/freescale/mx31ads/u-boot.lds
doc/README.scrapyard
include/configs/tegra-common.h
Build tested for all of ARM and run-time tested on am335x_evm.
Signed-off-by: Tom Rini <trini@ti.com>
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Pad config registers exist in APB_MISC_GP space, and control slew
rate, drive strengh, schmidt, high-speed, and low-power modes for
all of the pingroups in Tegra30. This builds off of the pinmux
way of constructing init tables to configure select pads (SDIOCFG,
for instance) during pinmux_init().
Currently, no padcfg entries exist. SDIO3CFG will be added when the
MMC driver is added as per the TRM to work with the SD-card slot on
Dalmore E1611.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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All other Tegra boards have their alias nodes in the .dts file
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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The pinmux code issues a warning if the caller attempts to disable the
lock bit in a pinmux register, since this is impossible (once it's
locked, the only way to unlock it is to reset the device/pmt controller).
The I2C/DDC/CEC/USB macros expect a lock setting to be passed in,
and the previous setting of DISABLE caused the pinmux table parsing
code to issue the warning. Changing the lock bits in these table
entries to DEFAULT (i.e. don't touch it) fixes this.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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Differences in padcfg registers (some removed, some added) between
Tegra30 and Tegra114 weren't picked up when I first ported this file.
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This caused CAM_MCLK's pinmux reg to be locked out, since the
table parsing code couldn't find a matching entry for VI_ALT3
and wrote garbage to the register.
Signed-off-by: Tom Warren <twarren@nvidia.com>
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