| Commit message (Collapse) | Author | Age | Lines |
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Correct the wrong setting, otherwise, i2c recovery code will use
the wrong scl pin to recove, and will never recovery successfully.
Signed-off-by: Robin Gong <b38343@freescale.com>
(cherry picked from commit c3e9e81a4c6ae7306c273cbe4b5d96ef44222711)
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Let's use the i.MX common miscellaneous reset API
to reset the LCDIF block so that we may eliminate
a random hang issue at the arch_preboot_os() stage
when we disable the LCDIF. This patch also waits
for a VSYNC interrupt to guarantee the reset is
done at the VSYNC edge, which somehow makes the
LCDIF consume the display FIFO(?) and helps the
LCDIF work normally at the kernel stage.
Tested-by: Jason Liu <r64343@freescale.com>
Tested-by: Sandor Yu <R01008@freescale.com>
Tested-by: Ye.Li <B37916@freescale.com>
Tested-by: Guo Sally <b38912@freescale.com>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 45fa2ad38b846596e61ce8fc477713dede8a43e7)
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Align the keymap with Android rootfs as:
FUNC1 -- > Volume +
FUNC2 -- > Volume -
Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
(cherry picked from commit 875410fa2ddc8f8d2317c597db167a6a9b1b8a1f)
Signed-off-by: Ye.Li <B37916@freescale.com>
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set console value to show download log info for mfgtool NAND download.
Signed-off-by: Allen Xu <b45815@freescale.com>
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Since QSPI will be disabled for NAND module(pin conflict), the mtd
partition number will be count from 0, the last partition for rootfs
need to be changed from 4 to 3.
Signed-off-by: Allen Xu <b45815@freescale.com>
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imx6 q/dl/solo pcie would be failed to work properly in kernel, if
the pcie module is iniialized/enumerated both in uboot and linux
kernel.
rootcause:imx6 q/dl/solo pcie don't have the reset mechanism.
it is only be RESET by the POR. So, the pcie module only be
initialized/enumerated once in one POR.
Set to use pcie in kernel defaultly, mask the pcie config here.
Remove the mask freely, if the uboot pcie functions, rather than
the kernel's, are required.
Signed-off-by: Richard Zhu <r65037@freescale.com>
(cherry picked from commit 30d6a9abccb9c5424fce9dec2085db0ac21579b1)
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The iMX6SX SABRESD RevB board uses Micron N25Q128 to replace Spansion S25FL128
on RevA board.
So enable the CONFIG_SPI_FLASH_STMICRO and CONFIG_SPI_FLASH_SPANSION to support
both two revisions.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 4c144fcbcdc60329765b59ff79891e792aec59ad)
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Add new function "arch_auxiliary_core_check_up" to check whether M4
is already up. Therefore, avoid starting M4 again when it is running.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 54a0803b29c5ab459bedfb2c68c1e94b89866aa1)
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The mxc gis driver should not disable mxsfb, instead,
mxsfb could be disabled in machine layer.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit d74815051120adcad041f4480db49402db4f9823)
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The kernel may break the display pipeline at boot stage and
introduce various display artifacts, so let's disable mxsfb
in uboot when necessary.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 539b8416299ec1ae3f57f866dd3f016bdfaa6875)
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DIV_SELECT is used as Fout = Fin * div_select / 2.0, so we should do
the shift after the multiply to avoid rounding errors
Signed-off-by: Andre Renaud <andre@bluewatersys.com>
(cherry picked from commit 2eb268f6fd236a5ad9d51e7e47190d7994b3920f)
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Commit 3d622b78 (mx6: soc: Introduce set_ldo_voltage()) introduces
set_ldo_voltage() function that can be used to set the voltages
of any of the three LDO regulators controlled by the PMU_REG_CORE register.
Prior to this commit there was a single set_vddsoc() which only configured the
VDDSOC regulator.
Update the comments to align with the new set_ldo_voltage() implementation.
Acked-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
(cherry picked from commit 157f45da91b306d71dbf3a51325352dc11bf16d1)
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Vadc need long time to auto standards detection,
the default standard is NTSC, if vadc connect to PAL
camera and no enough time to detect the video mode,
driver will get wrong standard.
Confirmation from chip design architecture that auto detect function
is not required by rear-view camera application.
Setting register vdec_stddbg standard_filte bits to 0
makes the standard detection faster, the issue duplicate
decrease to 1%.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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When booting from NAND, the memory copy to boothdr uses the size
of fastboot_boot_img_hdr structure which is actually larger than
boothdr size. This causes the u-boot heap corruption and failed
to allocate memory any more.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 442529a6ff23016e7eb01f39c9fe3f51cda88234)
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GIS module need about 3M+3M+1.5M+1.5M=9M memory.
When gis module enabled, malloc may failed to allocate memory
for other modules, that may cause system hang.
Expand malloc pool to 32M, system hang issue can not duplicate
on mx6sx arm2 board.
pass one night reset stress test.
Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit 3695635d2f7d6e62ce555c684426aa36df2f6df6)
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When gis enable in uboot, the CSI0 input mux select setting
to vadc module, clean the bit when gis disabled.
Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit ae66b17b7da3be50dc81ca636b67e8e879f52e26)
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Android supports to two ways to pass serialno:
1. ATAG_SERIAL
2. "androidboot.serialno=" argument in boot commandline.
Since we support the DTB for android, so the ATAGS can't work. We have to choose
the second way.
This patch only applys the bootargs in bootimg, while the bootargs saved in u-boot
env variables won't have this argument appended.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 4ca9535c91c40da93703bd20727700cd33994f93)
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The android boot needs get_board_serial function to get the
CPU uid as the serial number. Implement this function to read
the uid from fuse for all iMX6 platforms.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 8d355a9d6f138e1c1cd04dbadb7b5b3e2d692701)
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The v2014 u-boot provides some “mmc” sub-commands for setting eMMC
boot parameters, such as boot bus, partition, etc.
These sub-commands are controlled by "CONFIG_SUPPORT_EMMC_BOOT".
Enable this configuration for iMX6SXSABRESD board.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 40ed36029030b5a1167011366d532f5361cbd7fd)
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The mtest is no longer default in v2014.
To test the DDR, enable this command for each iMX6 board.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 55460c9192c98c8ce90655db7d16c155af8bb354)
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The kernel changes to fix the mmcblk index with USDHC controllers
as below:
mmcblk0 ---> USDHC1
mmcblk1 ---> USDHC2
mmcblk2 ---> USDHC3
mmcblk3 ---> USDHC4
So in u-boot, the "mmcroot" must be updated together.
When booting from SD/MMC device, change the "mmcroot" to
dynamically set according to the boot USDHC controller.
It is the same mechanism as "mmcdev" used for kernel image loading.
Therefore, the uboot, kernel image, dtb and rootfs are required
in same SD/MMC card.
To disable the mmc dynamical detection, set the "mmcautodetect" to "no",
then "mmcroot" and "mmcdev" will not be overwritten.
When booting from other devices which needs to load kernel, dtb and
rootfs from SD/MMC card, their "mmcdev" reset vaule is
CONFIG_SYS_MMC_ENV_DEV and "mmcroot" reset value is CONFIG_MMCROOT.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 7feb8533f52677f641e3ff88a996cd3f1f722708)
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Since the iMX6SL does not have PCIE module, should not define the
function "imx_set_pcie_phy_power_down" for it. Otherwise, get the
build warning below:
arch/arm/cpu/armv7/mx6/soc.c:446:13: warning: 'imx_set_pcie_phy_power_down'
defined but not used [-Wunused-function]
static void imx_set_pcie_phy_power_down(void)
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 987c48c07c9ef62fa3fe55faa6f7369b30637127)
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Update latest DDR3 scirpts for imx6sx SabreSD and 19x19 DDR3 ARM2 board
as provided by board team.
(http://sw-git.freescale.net/cgi-bin/gitweb.cgi?p=ddr-scripts-rel.git)
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit bb533f0ce2e00e683a44ac9027cdba3eb12e9b45)
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The NOR flash PC28F00AG18 has 512 of 256KB erase blocks which are
locked after power on reset. Change the 17x17 ARM2 configurations
to match the flash parameters, and enable the CONFIG_SYS_FLASH_PROTECTION
to allow write to the flash.
The EIM-NOR on 17x17 ARM2 board uses MUXed mode. This has less
effort on board rework.
When boot from EIM-NOR, set SW8, SW7, SW5 to all off.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit da0e5e9e12c79a250002c1b442e25f93603f9695)
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imx6sl doesn't have the pcie module, mask the pcie
related codes from imx6sl.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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There are about 0.02% percentage on some imx6q/dl/solo
hw boards, random pcie link down when warm-reset is used.
Make sure to clear the ref_ssp_en bit16 of gpr1 before
warm-rst, and set ref_ssp_en after the pcie clks are
stable to workaround it.
rootcause:
* gpr regisers wouldn't be reset by warm-rst, while the
ref_ssp_en is required to be reset by pcie.
(work-around in u-boot)
* ref_ssp_en should be set after pcie clks are stable.
(work-around in kernel)
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Currently, kernel common regulator framework can't support setting pmic mode
by common DTS, so move the related code to u-boot firstly.
Signed-off-by: Robin Gong <b38343@freescale.com>
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Since the zImage is used at default, add the HAB image authentication
support in bootz to authenticate zImage.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Modified the default boot commands of all iMX6SX boards to use
bootz and zImage.
Signed-off-by: Ye.Li <B37916@freescale.com>
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When enabling "CONFIG_SECURE_BOOT", the build broken on iMX6SX platform
due to two problems.
1. The imximage tool in v2014 changes the command name of "SECURE_BOOT"
to "CSF". Must update it in imximage.cfg scripts.
2. The iMX6SX uses "CONFIG_ROM_UNIFIED_SECTIONS", but some HAB API
definitions are not defined and cause compile errors.
(HAB_RVT_REPORT_EVENT_NEW, HAB_RVT_REPORT_STATUS_NEW,
HAB_RVT_AUTHENTICATE_IMAGE_NEW, HAB_RVT_ENTRY_NEW, HAB_RVT_EXIT_NEW)
Signed-off-by: Ye.Li <B37916@freescale.com>
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Enable gis function for mx6sx 19x19 arm2 board
Expand malloc buf pool to 16M.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add gis module, current gis is support vadc input.
Add power down function to lcdif driver.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add pxp module.
Support csc between YUV444 and RGB888 and scaling.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add csi module.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add vadc module.
Both PAL and NTSC mode can work.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add vadc power up/down function.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add vadc clock enable function.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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The eMMC chip on iMX6SX SABRESD board is DNP at default. HW rework is
needed to weld it on the eMMC socket and disconnect SD card slot.
The pins IOMUX of eMMC are different with SD card slot:
1. The eMMC uses 8 data pins, while SD card slot only uses 4 bits.
2. The CD pin used by SD card slot works as a data pin for eMMC.
So adding a new u-boot target "mx6sxsabresd_emmc" for the eMMC support,
rather than using the SD boot configuration.
Signed-off-by: Ye.Li <B37916@freescale.com>
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add clear print log to show pfuze200 or pfuze100 found on mx6qsabresd/
mx6slevk/mx6sx_19x19_arm2 boards.
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Enable the "CONFIG_CMD_BMODE" and add BSP support.
"bmode" supports to reboot:
SD4, QSPI2 (SABRESD)
SD2, SD3, eMMC, QSPI2, NAND, SPINOR (17x17 ARM2)
SD1, QSPI2, SPINOR, EIMNOR (19x19 ARM2)
BTW: Board rework is needed on ARM2 for NAND, SPINOR or EIMNOR boot.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Enable the video drivers and MXS LCDIF driver to support the
splash screen on MX6SX SDB and 19x19 ARM2. Add BSP codes for video
parameters and LCDIF/LVDS initialization.
"panel" env is used for selecting the display panel.
Set "panel" env to "Hannstar-XGA" for LVDS display.
Set "panel" env to "MCIMX28LCD" for parallel LCD display.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add registers and clock functions to enable/set LCDIF clock and LVDS.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add a new interface "mxs_lcd_panel_setup" to setup fb parameters and
specifies the LCDIF controller for multiple controllers of iMX6SX.
Pass fb parameters via "videomode" env remains work if the new interface
is not called before video initialization.
Modify LCDIF clock interface "mxs_set_lcdclk" to support multiple
LCDIF controllers on iMX6SX.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Update NAND memory layout for match with new mfg tool.
Signed-off-by: Ke Qinghua <qinghua.ke@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add BSP codes to mx6sxsabresd to support android uboot features:
fastboot, booti and recovery
Signed-off-by: Ye.Li <B37916@freescale.com>
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Disable RDC in u-boot till kernel implements it. Otherwise, crash
may happen in kernel.
Signed-off-by: Ye.Li <B37916@freescale.com>
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T support M4 boot in 50 ms, kick start M4 at "board_early_init_f"
stage where u-boot passes ARM and architecture initialization.
Add a configuration "CONFIG_SYS_AUXCORE_FASTUP" for this feature
enablement. And a build config "mx6sxsabresd_m4fastup".
Adjust the default M4 image address to 0x78000000 represented by
"CONFIG_SYS_AUXCORE_BOOTDATA".
When M4 fast boot is enabled, RDC should be enabled together and
the QSPI driver must turn off, because M4 is running on QSPI flash
in XIP. Setup this relationship by configurations.
Signed-off-by: Ye.Li <B37916@freescale.com>
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According to the SRS, in the M4 CAN demo, the GPIO group1 will be
shared between A9 and M4. At A9 side, the pins 0, 1, 2, 3 are used.
M4 also uses one pin in its application.
To synchronize the registers setttings of GPIO1, must enable RDC
and RDC semaphore on the GPIO1.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add BSP codes for iMX6SX SABRE SD board to support SD/MMC,
USB, QSPI2 NOR Flash, Ethernet, I2C, PMIC and
M4 command boot(bootaux).
Add board build targets of SABER SD for boot device:
mx6sxsabresd --- SD/MMC
mx6sxsabresd_qspi2 --- QuadSPI2 NOR flash
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add script "imximage_lpddr2.cfg" for DDR controller settings of LPDDR2.
Modify "plugin.S" for LPDDR2.
Add build target for 19x19 LPDDR2 ARM2 board.
Signed-off-by: Ye.Li <B37916@freescale.com>
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