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* Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2014-01-13-2/+2
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| * video: ipu reg: Correct reserved array size in struct ipu_idmacLiu Ying2014-01-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The array reserved as a placeholder in the structure ipu_idmac should contain 44 32bit unsigned integer entries instead of 45 ones, because the placeholder is located bewteen the register IDMAC_SC_CORD1 and the register IDMAC_CH_BUSY_1 with the address offsets of 0x804c and 0x8100 respectively. Reported-by: Robin Gong <b38343@freescale.com> Acked-by: Robin Gong <b38343@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
| * video: ipu reg: Correct reserved1 array size in struct ipu_cmLiu Ying2014-01-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The array reserved1 as a placeholder in the structure ipu_cm should contain 4 32bit unsigned integer entries instead of 16 ones, because the placeholder is located bewteen the register IPU_CH_DB_MODE_SEL_1 and the register IPU_ALT_CH_DB_MODE_SEL_0 with the address offsets of 0x154 and 0x168 respectively. Reported-by: Robin Gong <b38343@freescale.com> Acked-by: Robin Gong <b38343@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* | usb: ums: wait for usb cable connection before enter ums modePrzemyslaw Marczak2014-01-13-0/+27
| | | | | | | | | | | | | | | | Before this change ums mode can not be entered when device was using the same usb port for usb/uart communication. Switching USB cable from UART to USB always causes ums exit. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
* | usb: exynos5: arndale: Add network supportInderpal Singh2014-01-13-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub. This patch uses board specific board_usb_init function to perform reset sequence for USB3503 hub and enables the relevant config options for network to work. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
* | usb: ehci: exynos: set/reset hsic physInderpal Singh2014-01-13-0/+53
| | | | | | | | | | | | | | | | The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 are for HSIC phys. The usb 2.0 phy is already being setup. This patch sets up the hsic phys. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
* | usb: gadget: fotg210: EP0 fifo empty indication is non-reliableKuo-Jung Su2014-01-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fifo size of ep0 is 64 bytes, and if the packet size grater than 64 bytes, the driver would have to fill up the fifo multiple times, and before filling up the fifo, the driver should make sure the fifo is empty by checking fifo empty indication. However there is a hardware bug that the fifo empty indication is somehow a bit earlier than fifo reset. So if I don't add an extra delay here, the data might be corrupted. (i.e., 1 byte missing) After a couple of tests, it truns out that 1 usec is good enough. This workaround should be applied to all hardware revisions. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* | usb: gadget: fotg210: add w1c interrupt status supportKuo-Jung Su2014-01-13-0/+14
|/ | | | | | | | | | | | | | Since hardware revision 1.11.0, the following interrupt status registers are now W1C (i.e., write 1 clear): 1. Interrupt Source Group 0 Register (0x144) (EP0 Abort: BIT5) 2. Interrupt Source Group 2 Register (0x14C) (All bits) And before revision 1.11.0, these registers are all R/W. Which means software must write a 0 to clear the status. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-01-10-6629/+14927
|\ | | | | | | | | | | | | | | | | | | Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be added to include/configs/exynos5-dt.h now. Conflicts: include/configs/exynos5250-dt.h Signed-off-by: Tom Rini <trini@ti.com>
| * doc: Update the zynq u-boot statusJagannadha Sutradharudu Teki2014-01-10-8/+21
| | | | | | | | | | | | Updated doc/README.zynq to current status Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Enable CONFIG_DEFAULT_DEVICE_TREEJagannadha Sutradharudu Teki2014-01-10-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Enabled default dts files on respective pre-board config files this is way MAKEALL will works. and it's upto user to build specific dts by specifying at build time. $ make zynq_zc70x_config $ make --> with default dts zynq-zc702.dts or $ make DEVICE_TREE=zynq-zc702 --> Same configuration with zynq-zc706.dts Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * dts: zynq: Add more zynq dts filesJagannadha Sutradharudu Teki2014-01-10-0/+84
| | | | | | | | | | | | | | This patch adds initial dts support for supported zynq boards. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Enable verified boot(RSA)Jagannadha Sutradharudu Teki2014-01-10-0/+4
| | | | | | | | | | | | | | CONFIG_FIT_SIGNATURE - signature node support in FIT image CONFIG_RSA - RSA lib support Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * gpio: zynq: Add dummy gpio routinesJagannadha Sutradharudu Teki2014-01-10-0/+25
| | | | | | | | | | | | | | GPIO dummy routines are required for fdt build, may be removed these dependencies once the u-boot fdt is fully optimized. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * dts: zynq: Add basic fdt supportJagannadha Sutradharudu Teki2014-01-10-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides a basic fdt support for zynq u-boot. zynq-7000.dtsi-> initial arch dts file zynq-zed.dts -> initial zed board dts file more devices should be added in subsequent patches. u-boot build: once configuring of a board done for building dtb with zynq-zed.dts as an input zynq-uboot> make DEVICE_TREE=zynq-zed Enabled CONFIG_OF_SEPARATE for building dtb separately. There is a new binary called u-boot-dtb.bin which is a u-boot with devicetree supported. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Define CONFIG_ENV_OVERWRITEJagannadha Sutradharudu Teki2014-01-10-0/+3
| | | | | | | | | | | | | | Defined CONFIG_ENV_OVERWRITE, which allow to overwrite serial baudrate and ethaddr. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Define flash env. partitionJagannadha Sutradharudu Teki2014-01-10-1/+11
| | | | | | | | | | | | | | Last 128Kb sector of 1Mb flash is defined as u-boot environment partition. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Change Env. Sector size to 128KbJagannadha Sutradharudu Teki2014-01-10-1/+3
| | | | | | | | | | | | Changed Env. Sector size from 0x10000 to 128Kb Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Define default environmentJagannadha Sutradharudu Teki2014-01-10-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Defined default env. for autoboot FIT image from respective boot devices. Default settings: fit_image=fit.itb load_addr=0x2000000 fit_size=0x800000 flash_off=0x100000 nor_flash_off=0xE2100000 Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add support to find bootmodeJagannadha Sutradharudu Teki2014-01-10-2/+56
| | | | | | | | | | | | | | | | | | | | | | Added support to find the bootmodes by reading slcr bootmode register. this can be helpful to autoboot the configurations w.r.t a specified bootmode. Added this functionality on board_late_init as it's not needed for normal initializtion part. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add zynq_zc770 xm012 board supportJagannadha Sutradharudu Teki2014-01-10-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM012: - 1GB DDR3 - 64MiB Numonyx NOR flash - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Stefan Roese <sr@denx.de>
| * zynq: Add zynq_zc770 xm013 board supportJagannadha Sutradharudu Teki2014-01-10-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM013: - 1GB DDR3 - 128 Mb Quad-SPI Flash(dual parallel) - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add zynq_zc770 xm010 board supportJagannadha Sutradharudu Teki2014-01-10-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM010: - 1Gb DDR3 - 1Mb SST SPI flash - 128 Mb Quad-SPI Flash - 8 Mb SST SI flash - Full size SD/MMC card cage - 10/100/1000 Ethernet - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add zynq microzed board supportJagannadha Sutradharudu Teki2014-01-10-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MicroZed is a low-cost development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z010-1CLG400C Memory: - 1 GB of DDR3 SDRAM - 128Mb of QSPI flash(S25FL128SAGBHI200) - Micro SD card interface Communication: - 10/100/1000 Ethernet - USB 2.0 - USB-UART User I/O: - 100 User I/O (50 per connector) - Configurable as up to 48 LVDS pairs or 100 single-ended I/O Misc: - Xilinx PC4 JTAG configuration port - PS JTAG pins accessible via Pmod - 33.33 MHz oscillator - User LED and push switch For more info - http://zedboard.org/product/microzed Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: zc70x: Add Catalyst 24WC08 EEPROM config supportJagannadha Sutradharudu Teki2014-01-10-0/+11
| | | | | | | | | | | | | | | | | | Adds configurations for Catalyst 24WC08 EEPROM, which is present on the zynq boards. Enable EEPROM support for zc70x boards. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Define exact TEXT_BASEJagannadha Sutradharudu Teki2014-01-10-1/+1
| | | | | | | | | | | | | | Defined TEXT_BASE for u-boot starts from 0x4000000 w.r.t zynq memory-map. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Move CONFIG_SYS_SDRAM_SIZE to pre-board configsJagannadha Sutradharudu Teki2014-01-10-1/+4
| | | | | | | | | | | | | | CONFIG_SYS_SDRAM_SIZE is specific to a board hence moved to specific pre-config board files. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add zynq zed board supportJagannadha Sutradharudu Teki2014-01-10-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zed is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z020-CLG484-1 Memory: - 512 MB DDR3 - 256 Mb Quad-SPI Flash( - Full size SD/MMC card cage Connectivity: - 10/100/1000 Ethernet - USB OTG (Device/Host/OTG) - USB-UART Expansion: - FMC (Low Pin Count) - Pmod. headers (2x6) Video/Display: - HDMI output (1080p60 + audio) - VGA connector - 128 x 32 OLED - User LEDs (9) User inputs: - Slide switches (8) - Push button switches (7) Audio: - 24-bit stereo audio CODEC - Stereo line in/out - Headphone - Microphone input Analog: - Xilinx XADC header - Supports 4 analog inputs - 2 Differential / 4 Single-ended Debug: - On-board USB JTAG programming port - ARM Debug Access Port (DAP) For more info - http://zedboard.org/product/zedboard Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add zynq zc70x board supportJagannadha Sutradharudu Teki2014-01-10-9/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded processing includes ASIC and FPGA design. ZC702-: APSOC: - XC7Z020-CLG484-1 Memory: - DDR3 Component Memory 1GB - 16MB Quad SPI Flash - IIC - 1 KB EEPROM Connectivity: - Gigabit Ethernet GMII, RGMII and SGMII. - USB OTG - Host USB - IIC Bus Headers/HUB - 1 CAN with Wake on CAN - USB-UART Video/Display: - HDMI Video OUT - 8X LEDs Control & I/O: - 3 User Push Buttons - 2 User Switches - 8 User LEDs For more info on zc702 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm ZC706-: APSOC: - XC7Z045 FFG900 -2 AP SoC Memory: - DDR3 Component Memory 1GB (PS) - DDR3 SODIM Memory 1GB (PL) - 2X16MB Quad SPI Flash (dual parallel) - IIC - 1 KB EEPROM Connectivity: - PCIe Gen2x4 - SFP+ and SMA Pairs - GigE RGMII Ethernet (PS) - USB OTG 1 (PS) - Host USB - IIC Bus Headers/HUB (PS) - 1 CAN with Wake on CAN (PS) - USB-UART Video/Display: - HDMI 8 color RGB 4.4.4 1080P-60 OUT - HDMI IN 8 color RGB 4.4.4 Control & I/O: - 2 User Push Buttons/Dip Switch, 2 User LEDs - IIC access to GPIO - SDIO (SD Card slot) - 3 User Push Buttons, 2 User Switches, 8 User LEDs For more info on zc706 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * doc: zynq: Add information on zynq u-bootJagannadha Sutradharudu Teki2014-01-10-0/+60
| | | | | | | | | | | | | | | | | | Information on zynq u-boot about - zynq boards - mainline status - TODO Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Rename zynq with zynq-commonJagannadha Sutradharudu Teki2014-01-10-5/+6
| | | | | | | | | | | | | | | | | | zynq.h -> zynq-common.h, zynq-common is Common configuration options for all Zynq boards. zynq.h is no longer exists hense removed from boards.cfg Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add GEM0, GEM1 configs supportJagannadha Sutradharudu Teki2014-01-10-8/+8
| | | | | | | | | | | | | | | | | | Zynq ethernet controller support two GEM's like CONFIG_ZYNQ_GEM0 and CONFIG_ZYNQ_GEM1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add UART0, UART1 configs supportJagannadha Sutradharudu Teki2014-01-10-4/+16
| | | | | | | | | | | | | | | | | | Zynq uart controller support two serial ports like CONFIG_ZYNQ_SERIAL_UART0 and CONFIG_ZYNQ_SERIAL_UART1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Enable cache optionsJagannadha Sutradharudu Teki2014-01-10-0/+10
| | | | | | | | | | | | | | | | - Enable cache command - Turn-off L2 cache - Turn-on D-cache Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Minor config cleanupJagannadha Sutradharudu Teki2014-01-10-37/+39
| | | | | | | | | | | | | | | | | | Cleanups mostly on: - Add comments - Re-order configs - Remove #define CONFIG_ZYNQ_SDHCI Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Cleanup on memory configsJagannadha Sutradharudu Teki2014-01-10-13/+14
| | | | | | | | | | | | | | | | Cleanup on memory configuration options: - Add comment - Re-order configs Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Cleanup on miscellaneous configsJagannadha Sutradharudu Teki2014-01-10-9/+10
| | | | | | | | | | | | | | | | | | Cleanup on miscellaneous configurable options: - Rename SYS_PROMPT as "zynq-uboot" - Add comment - Re-order configs Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Enable Boot FreeBSD/vxWorksJagannadha Sutradharudu Teki2014-01-10-0/+7
| | | | | | | | | | | | This enabled Boot FreeBSD/vxWorks from an ELF image support Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Enable CONFIG_FIT_VERBOSEJagannadha Sutradharudu Teki2014-01-10-0/+1
| | | | | | | | | | | | Enabled fit_format_{error,warning}() Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * arm: make 'MAKEALL -a' distinguish between arm and aarch64Albert ARIBAUD2014-01-10-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | The vexpress_aemv8a is the first aarch64 board in U-Boot. As it was introduced, it gets built when "MAKEALL -a arm" is invoked, and fails as this command is run with a 32-bit, not 64-bit, toolchain as the cross-compiler. Introduce 'aarch64' as a valid 'MAKEALL -a' argument, treated as 'arm' for all other intents, and change the architecture of the vexpress_aemv8a entry in boards.cfg from 'arm' to 'aarch64'.
| * armv8: Use __aarch64__ rather than CONFIG_ARM64 in some casesTom Rini2014-01-10-18/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The toolchain sets __aarch64__ for both LE and BE. In the case of posix_types.h we cannot reliably use config.h as that will lead to problems. In the case of byteorder.h it's clearer to check the EB flag being set in either case instead. Cc: David Feng <fenghua@phytium.com.cn> Signed-off-by: Tom Rini <trini@ti.com> Amended by Albert ARIBAUD <albert.u.boot@aribaud.net> to actually remove the config.h include from the posix_types.h files, with permission from Tom Rini.
| * arm64: MAKEALL, filter armv8 boards from LIST_armDavid Feng2014-01-09-1/+11
| | | | | | | | Signed-off-by: David Feng <fenghua@phytium.com.cn>
| * arm64: board support of vexpress_aemv8aDavid Feng2014-01-09-0/+254
| | | | | | | | | | Signed-off-by: David Feng <fenghua@phytium.com.cn> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
| * arm64: generic board supportDavid Feng2014-01-09-7/+13
| | | | | | | | Signed-off-by: David Feng <fenghua@phytium.com.cn>
| * arm64: core supportDavid Feng2014-01-09-21/+1882
| | | | | | | | | | | | | | Relocation code based on a patch by Scott Wood, which is: Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Feng <fenghua@phytium.com.cn>
| * arm64: Make checkarmreloc accept arm64 relocationsScott Wood2014-01-09-5/+9
| | | | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Feng <fenghua@phytium.com.cn>
| * arm64: Turn u-boot.bin back into an ELF file after relocate-relaScott Wood2014-01-09-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | While performing relocations on u-boot.bin should be good enough for booting on real hardware, some simulators insist on booting an ELF file (and yet don't perform ELF relocations), so convert the relocated binary back into an ELF file. This can go away in the future if we change relocate-rela to operate directly on the ELF file, or if and when we stop caring about a simulator with this restriction. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Feng <fenghua@phytium.com.cn>
| * arm64: Add tool to statically apply RELA relocationsScott Wood2014-01-09-0/+207
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM64 uses the newer RELA-style relocations rather than the older REL. RELA relocations have an addend in the relocation struct, rather than expecting the loader to read a value from the location to be updated. While this is beneficial for ordinary program loading, it's problematic for U-Boot because the location to be updated starts out with zero, rather than a pre-relocation value. Since we need to be able to run C code before relocation, we need a tool to apply the relocations at build time. In theory this tool is applicable to other newer architectures (mainly 64-bit), but currently the only relocations it supports are for arm64, and it assumes a 64-bit little-endian target. If the latter limitation is ever to be changed, we'll need a way to tell the tool what format the image is in. Eventually this may be replaced by a tool that uses libelf or similar and operates directly on the ELF file. I've written some code for such an approach but libelf does not make it easy to poke addresses by memory address (rather than by section), and I was hesitant to write code to manually parse the program headers and do the update outside of libelf (or to iterate over sections) -- especially since it wouldn't get test coverage on things like binaries with multiple PT_LOAD segments. This should be good enough for now to let the manual relocation stuff be removed from the arm64 patches. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Feng <fenghua@phytium.com.cn>
| * add weak entry definitionDavid Feng2014-01-09-0/+4
| | | | | | | | Signed-off-by: David Feng <fenghua@phytium.com.cn>
| * cmd_pxe: remove compiling warningsDavid Feng2014-01-09-2/+2
| | | | | | | | Signed-off-by: David Feng <fenghua@phytium.com.cn>
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