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* lzma: fix buffer bound check errorAntonios Vamporakis2014-01-14-1/+4
| | | | | | | | | | | | | Variable uncompressedSize references the space available, while outSizeFull is the actual expected uncompressed size. Using the wrong value causes LzmaDecode to return SZ_ERROR_INPUT_EOF. Problem was introduced in commit afca294. While at it add additional debug message. Signed-off-by: Antonios Vamporakis <ant@area128.com> CC: Kees Cook <keescook@chromium.org> CC: Simon Glass <sjg@chromium.org> CC: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> CC: Luka Perkov <luka@openwrt.org>
* Prepare v2014.01-rc3Tom Rini2014-01-13-1/+1
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-01-13-1/+15
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| * ARM: pxa: Fix OneNAND window access on VPAC270Marek Vasut2014-01-13-1/+1
| | | | | | | | | | | | | | | | | | | | Access the OneNAND 1KiB window on the VPAC270 as an SRAM instead of accessing it as a burst-RAM. This fixes a problem where the board failed to reboot sometimes as the CPU couldn't start executing from the OneNAND 1KiB window. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com>
| * ARM: pxa: Fix OneNAND SPL buildsMarek Vasut2014-01-13-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OneNAND SPL used on PXA is slightly obscure. Due to the OneNAND limitation, where we have only the first 1KiB of the OneNAND available upon power-up as a memory-mapped area, from which the CPU starts executing, we place only the most essential code into this first 1KiB . This code copies the rest of the SPL into SRAM and jumps to it. This code is stored in section .text.0 . The rest of the SPL is stored in section .text.1 . When running the OBJCOPY on the SPL, it will preserve only .text section, but the .text.0 and .text.1 are stripped away from the result, thus making the SPL binary empty. The patch adds additional -j parameters to the OBJCOPY for PXA during the SPL build, which will preserve the .text.0 and .text.1 sections. Moreover, this patch also adds missing functions into the .text.0 section, since otherwise the PXA270 with 1KiB-window OneNAND won't be able to boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2014-01-13-198/+1171
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| * | sf: params: Removed flag SECT_4K for Micron N25Q128Siva Durga Prasad Paladugu2014-01-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the flag SECT_4K for device N25Q128 as the 4K-byte sub sector erase granularity is available only for top/bottom 8 sectors in some of the N25Q128 chips. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | doc: SPI: Update status.txtJagannadha Sutradharudu Teki2014-01-12-5/+6
| | | | | | | | | | | | | | | | | | Updated current SPI subsyetem status. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Add CONFIG_SF_DUAL_FLASHJagannadha Sutradharudu Teki2014-01-12-5/+20
| | | | | | | | | | | | | | | | | | | | | This config will use for defining greater than single flash support. currently - DUAL_STACKED and DUAL_PARALLEL. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Add dual memories support - DUAL_PARALLELJagannadha Sutradharudu Teki2014-01-12-9/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch added support for accessing dual memories in parallel connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Add dual memories support - DUAL_STACKEDJagannadha Sutradharudu Teki2014-01-12-11/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch added support for accessing dual memories in stacked connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: ops: Unify read_ops bank configurationJagannadha Sutradharudu Teki2014-01-12-8/+5
| | | | | | | | | | | | | | | | | | Unified the bar code from read_ops into a spi_flash_bar() Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Code cleanupsJagannadha Sutradharudu Teki2014-01-12-14/+12
| | | | | | | | | | | | | | | | | | | | | - comment typo's - func args have a proper names Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Divide flash register ops from QEB codeJagannadha Sutradharudu Teki2014-01-11-53/+77
| | | | | | | | | | | | | | | | | | | | | QEB code comprises of couple of flash register read/write operations, this patch moved flash register operations on to sf_op Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: probe: Enable macronix quad read/write cmds supportJagannadha Sutradharudu Teki2014-01-11-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Added macronix flash quad read/write commands support and it's up to the respective controller driver usecase to configure the respective commands by defining SPI RX/TX operation modes from include/spi.h on the driver. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Add macronix set QEB supportJagannadha Sutradharudu Teki2014-01-11-0/+35
| | | | | | | | | | | | | | | | | | | | | This patch adds set QEB support for macronix flash devices which are trying to program/read quad operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Discover read dummy_byteJagannadha Sutradharudu Teki2014-01-11-7/+32
| | | | | | | | | | | | | | | | | | | | | Discovered the read dummy_byte based on the configured read command. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Add QUAD_IO_FAST read supportJagannadha Sutradharudu Teki2014-01-11-2/+8
| | | | | | | | | | | | | | | | | | This patch adds support QUAD_IO_FAST read command. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Separate the flash params tableJagannadha Sutradharudu Teki2014-01-11-145/+158
| | | | | | | | | | | | | | | | | | | | | | | | Moved the flash params table from sf_probe.c and placed on to sf_params.c, hence flash params file will alter based on new addons. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: probe: Enable RD_FULL and WR_QPPJagannadha Sutradharudu Teki2014-01-11-30/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enabled RD_FULL and WR_QPP for supported flashes in micron, winbond and spansion. Remaining parts will be add in future patches. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Set quad enable bit supportJagannadha Sutradharudu Teki2014-01-11-2/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides support to set the quad enable bit on flash. quad enable bit needs to set before performing any quad IO operations on respective SPI flashes. Currently added set quad enable bit for winbond and spansion flash devices. stmicro flash doesn't require to set as qeb is volatile. remaining flash devices support will add in future patches. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: ops: Add configuration register writing supportJagannadha Sutradharudu Teki2014-01-11-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides support to program a flash config register. Configuration register contains the control bits used to configure the different configurations and security features of a device. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Add quad read/write commands supportJagannadha Sutradharudu Teki2014-01-11-89/+113
| | | | | | | | | | | | | | | | | | | | | | | | This patch add quad commands support like - QUAD_PAGE_PROGRAM => for write program - QUAD_OUTPUT_FAST ->> for read program Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sf: Add extended read commands supportJagannadha Sutradharudu Teki2014-01-11-86/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current sf uses FAST_READ command, this patch adds support to use the different/extended read command. This implementation will determine the fastest command by taking the supported commands from the flash and the controller, controller is always been a priority. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | spi: sh_spi: Use sh_spi_clear_bit() instead of open-codedAxel Lin2014-01-11-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | We have a sh_spi_clear_bit() function, there's no reason not to use it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | sandbox: spi: Adjust 'sf test' to work on sandboxSimon Glass2014-01-11-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add map_sysmem() calls so that this test works correctly on sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Hung-ying Tyan <tyanh@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | spi: Add Faraday SPI controller supportKuo-Jung Su2014-01-11-0/+550
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Faraday FTSSP010 is a multi-function controller which supports I2S/SPI/SSP/AC97/SPDIF. However This patch implements only the SPI mode. NOTE: The DMA and CS/Clock control logic has been altered since hardware revision 1.19.0. So this patch would first detects the revision id of the underlying chip, and then switch to the corresponding software control routines. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> CC: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2014-01-13-2/+2
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| * | video: ipu reg: Correct reserved array size in struct ipu_idmacLiu Ying2014-01-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The array reserved as a placeholder in the structure ipu_idmac should contain 44 32bit unsigned integer entries instead of 45 ones, because the placeholder is located bewteen the register IDMAC_SC_CORD1 and the register IDMAC_CH_BUSY_1 with the address offsets of 0x804c and 0x8100 respectively. Reported-by: Robin Gong <b38343@freescale.com> Acked-by: Robin Gong <b38343@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
| * | video: ipu reg: Correct reserved1 array size in struct ipu_cmLiu Ying2014-01-12-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The array reserved1 as a placeholder in the structure ipu_cm should contain 4 32bit unsigned integer entries instead of 16 ones, because the placeholder is located bewteen the register IPU_CH_DB_MODE_SEL_1 and the register IPU_ALT_CH_DB_MODE_SEL_0 with the address offsets of 0x154 and 0x168 respectively. Reported-by: Robin Gong <b38343@freescale.com> Acked-by: Robin Gong <b38343@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* | usb: ums: wait for usb cable connection before enter ums modePrzemyslaw Marczak2014-01-13-0/+27
| | | | | | | | | | | | | | | | Before this change ums mode can not be entered when device was using the same usb port for usb/uart communication. Switching USB cable from UART to USB always causes ums exit. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
* | usb: exynos5: arndale: Add network supportInderpal Singh2014-01-13-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo controller, connected to HSIC Phy of USB host controller via USB3503 hub. This patch uses board specific board_usb_init function to perform reset sequence for USB3503 hub and enables the relevant config options for network to work. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
* | usb: ehci: exynos: set/reset hsic physInderpal Singh2014-01-13-0/+53
| | | | | | | | | | | | | | | | The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2 are for HSIC phys. The usb 2.0 phy is already being setup. This patch sets up the hsic phys. Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
* | usb: gadget: fotg210: EP0 fifo empty indication is non-reliableKuo-Jung Su2014-01-13-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fifo size of ep0 is 64 bytes, and if the packet size grater than 64 bytes, the driver would have to fill up the fifo multiple times, and before filling up the fifo, the driver should make sure the fifo is empty by checking fifo empty indication. However there is a hardware bug that the fifo empty indication is somehow a bit earlier than fifo reset. So if I don't add an extra delay here, the data might be corrupted. (i.e., 1 byte missing) After a couple of tests, it truns out that 1 usec is good enough. This workaround should be applied to all hardware revisions. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* | usb: gadget: fotg210: add w1c interrupt status supportKuo-Jung Su2014-01-13-0/+14
|/ | | | | | | | | | | | | | Since hardware revision 1.11.0, the following interrupt status registers are now W1C (i.e., write 1 clear): 1. Interrupt Source Group 0 Register (0x144) (EP0 Abort: BIT5) 2. Interrupt Source Group 2 Register (0x14C) (All bits) And before revision 1.11.0, these registers are all R/W. Which means software must write a 0 to clear the status. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Marek Vasut <marex@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-01-10-6629/+14927
|\ | | | | | | | | | | | | | | | | | | Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be added to include/configs/exynos5-dt.h now. Conflicts: include/configs/exynos5250-dt.h Signed-off-by: Tom Rini <trini@ti.com>
| * doc: Update the zynq u-boot statusJagannadha Sutradharudu Teki2014-01-10-8/+21
| | | | | | | | | | | | Updated doc/README.zynq to current status Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Enable CONFIG_DEFAULT_DEVICE_TREEJagannadha Sutradharudu Teki2014-01-10-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Enabled default dts files on respective pre-board config files this is way MAKEALL will works. and it's upto user to build specific dts by specifying at build time. $ make zynq_zc70x_config $ make --> with default dts zynq-zc702.dts or $ make DEVICE_TREE=zynq-zc702 --> Same configuration with zynq-zc706.dts Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * dts: zynq: Add more zynq dts filesJagannadha Sutradharudu Teki2014-01-10-0/+84
| | | | | | | | | | | | | | This patch adds initial dts support for supported zynq boards. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Enable verified boot(RSA)Jagannadha Sutradharudu Teki2014-01-10-0/+4
| | | | | | | | | | | | | | CONFIG_FIT_SIGNATURE - signature node support in FIT image CONFIG_RSA - RSA lib support Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * gpio: zynq: Add dummy gpio routinesJagannadha Sutradharudu Teki2014-01-10-0/+25
| | | | | | | | | | | | | | GPIO dummy routines are required for fdt build, may be removed these dependencies once the u-boot fdt is fully optimized. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * dts: zynq: Add basic fdt supportJagannadha Sutradharudu Teki2014-01-10-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides a basic fdt support for zynq u-boot. zynq-7000.dtsi-> initial arch dts file zynq-zed.dts -> initial zed board dts file more devices should be added in subsequent patches. u-boot build: once configuring of a board done for building dtb with zynq-zed.dts as an input zynq-uboot> make DEVICE_TREE=zynq-zed Enabled CONFIG_OF_SEPARATE for building dtb separately. There is a new binary called u-boot-dtb.bin which is a u-boot with devicetree supported. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Define CONFIG_ENV_OVERWRITEJagannadha Sutradharudu Teki2014-01-10-0/+3
| | | | | | | | | | | | | | Defined CONFIG_ENV_OVERWRITE, which allow to overwrite serial baudrate and ethaddr. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Define flash env. partitionJagannadha Sutradharudu Teki2014-01-10-1/+11
| | | | | | | | | | | | | | Last 128Kb sector of 1Mb flash is defined as u-boot environment partition. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Change Env. Sector size to 128KbJagannadha Sutradharudu Teki2014-01-10-1/+3
| | | | | | | | | | | | Changed Env. Sector size from 0x10000 to 128Kb Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Define default environmentJagannadha Sutradharudu Teki2014-01-10-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Defined default env. for autoboot FIT image from respective boot devices. Default settings: fit_image=fit.itb load_addr=0x2000000 fit_size=0x800000 flash_off=0x100000 nor_flash_off=0xE2100000 Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add support to find bootmodeJagannadha Sutradharudu Teki2014-01-10-2/+56
| | | | | | | | | | | | | | | | | | | | | | Added support to find the bootmodes by reading slcr bootmode register. this can be helpful to autoboot the configurations w.r.t a specified bootmode. Added this functionality on board_late_init as it's not needed for normal initializtion part. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add zynq_zc770 xm012 board supportJagannadha Sutradharudu Teki2014-01-10-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM012: - 1GB DDR3 - 64MiB Numonyx NOR flash - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Stefan Roese <sr@denx.de>
| * zynq: Add zynq_zc770 xm013 board supportJagannadha Sutradharudu Teki2014-01-10-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM013: - 1GB DDR3 - 128 Mb Quad-SPI Flash(dual parallel) - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add zynq_zc770 xm010 board supportJagannadha Sutradharudu Teki2014-01-10-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM010: - 1Gb DDR3 - 1Mb SST SPI flash - 128 Mb Quad-SPI Flash - 8 Mb SST SI flash - Full size SD/MMC card cage - 10/100/1000 Ethernet - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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