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* mxc nand: Fix warning on !MXC_NFC_V2_1Tom Rini2012-09-18-0/+2
| | | | | | | In board_nand_init() we only need the 'tmp' variable if MXC_NFC_V2_1 is defined. Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2012-09-18-391/+251
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| * mxc nand: Homogenize IP revisions with LinuxBenoît Thébaudeau2012-09-17-17/+19
| | | | | | | | | | | | | | | | | | | | Use the same IP revisions as in Linux in order to make the comparison more clear. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mxc nand: Let driver detect IP revisionBenoît Thébaudeau2012-09-17-8/+3
| | | | | | | | | | | | | | | | | | | | | | There is no reason to have board configs to select the NFC IP revision. Just let the driver detect it. BTW, remove broken NFC IP revision configs from board config files. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mtd mxc nand: Merge init functionsBenoît Thébaudeau2012-09-17-30/+23
| | | | | | | | | | | | | | | | | | | | Merge mxc_setup_config1() into board_nand_init() in order to ease the addition of i.MX5 support in the following patches. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mtd mxc nand: Fix ECC state after read_page_raw_syndrome()Benoît Thébaudeau2012-09-17-1/+1
| | | | | | | | | | | | | | | | | | | | mxc_nand_read_page_raw_syndrome() should reenable ECC upon exit. This fixes ECC errors left uncorrected after a call to this function. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mtd mxc nand: Use _mxc_nand_enable_hwecc()Benoît Thébaudeau2012-09-17-16/+12
| | | | | | | | | | | | | | | | | | Use _mxc_nand_enable_hwecc() instead of duplicating its code. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * spl mxc nand: Fix broken boot for correctable ECC errorsBenoît Thébaudeau2012-09-17-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | Do not stop boot as soon as an ECC error is detected. Only stop boot for uncorrectable ECC errors. This fixes boards no longer booting after some time because a NAND Flash bit has flipped. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mxc nand: Access all ecc_status_result fieldsBenoît Thébaudeau2012-09-17-3/+6
| | | | | | | | | | | | | | | | | | | | | | On the NFC IP 1.1, the 32-bit ecc_status_result value comes from 2 consecutive 16-bit registers. This patch reads all the fields of this value, which makes a difference for 4-kiB NF pages. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * spl mxc nand: Set symmetric modeBenoît Thébaudeau2012-09-17-1/+2
| | | | | | | | | | | | | | | | | | | | | | Set the spl mxc nand driver for IP 1.1 in symmetric mode, like the mtd driver. In this way, for both drivers, one input clock period of the NFC IP will produce one R/W cycle. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * spl mxc nand: Remove duplicated codeBenoît Thébaudeau2012-09-17-8/+2
| | | | | | | | | | | | | | | | | | | | The ECC_EN and INT_MSK bits of CONFIG1 are not volatile, so it is sufficient to set them once in nfc_nand_init(). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * spl mxc nand: Merge duplicated codeBenoît Thébaudeau2012-09-17-27/+23
| | | | | | | | | | | | | | | | | | Merge duplicated code into functions, which is better for SPL size too. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mxc nand: cosmectic: Light cleanupBenoît Thébaudeau2012-09-17-13/+11
| | | | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mxc nand: Merge mtd and spl register definitionsBenoît Thébaudeau2012-09-17-274/+128
| | | | | | | | | | | | | | | | | | | | This patches fixes the TODO to use same register definitions in mtd mxc_nand and nand_spl fsl nfc drivers. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driverMarek Vasut2012-09-17-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is based on Linux kernel -next: commit 14f44abf1dafc20ba42ce8616a8fc8fbd1b3712b Author: Brian Norris <computersforpeace@gmail.com> Date: Fri Jul 13 09:28:24 2012 -0700 mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver The NAND_CHIPOPTIONS_MSK has limited utility and is causing real bugs. It silently masks off at least one flag that might be set by the driver (NAND_NO_SUBPAGE_WRITE). This breaks the GPMI NAND driver and possibly others. Really, as long as driver writers exercise a small amount of care with NAND_* options, this mask is not necessary at all; it was only here to prevent certain options from accidentally being set by the driver. But the original thought turns out to be a bad idea occasionally. Thus, kill it. Note, this patch fixes some major gpmi-nand breakage. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * nand: Make NAND lock status compatible with MicronJoe Hershberger2012-09-17-4/+7
| | | | | | | | | | | | | | | | | | | | Micron NAND flash (e.g. MT29F4G08ABADAH4) BLOCK LOCK READ STATUS is not the same as others. Instead of bit 1 being lock, it is #lock_tight. To make the driver support either format, ignore bit 1 and use only bit 0 and bit 2. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * nand: consolidate duplicated constantsJoe Hershberger2012-09-17-6/+2
| | | | | | | | | | | | | | NAND_CMD_ constants for lock/unlock should be in the header Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * nand: Change ulong to loff_t and size_tJoe Hershberger2012-09-17-3/+5
| | | | | | | | | | | | | | Missed in previous cleanup. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * nand: Add support for unlock.invertJoe Hershberger2012-09-17-8/+28
| | | | | | | | | | | | | | | | | | NAND unlock command allows an invert bit to be set to unlock all but the selected page range. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [scottwood@freescale.com: updated docs and added comment about invert bit] Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mtd: support ONFI multi lun NANDMatthieu CASTET2012-09-17-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With onfi a flash is organized into one or more logical units (LUNs). A logical unit (LUN) is the minimum unit that can independently execute commands and report status. Mtd does not exploit LUN, so make it see a big single flash where size is lun_size * number_of_lun. Without this patch MT29F8G08ADBDAH4 size is 512MiB instead of 1GiB. Artem: split long line on 2 shorter ones. This is commit 637957551c0ac80de8dfc7650d320c5a98c2c0c0 from Linux Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> [scottwood@freescale.com: picked from Linux into U-Boot] Reported-by: Rafael Beims <rafael.beims@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2012-09-17-8/+162
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| * | i2c:soft:multi: Enable soft I2C multibus at Trats development boardŁukasz Majewski2012-09-17-7/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | This commit enables multibus handling at Samsung's Trats development board. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Heiko Schocher <hs@denx.de>
| * | i2c:soft:multi: Support for multiple soft I2C buses at Samsung boardsŁukasz Majewski2012-09-17-0/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for multiple soft I2C buses. Multibus I2C support is achieved by defining get_multi_{sda|scl}_pin functions to switch between multiple "soft" I2C buses. Common definition of I2C_X I2C buses is provided at <i2c.h>. TEST HW: Samsung's Exynos4210 evt.0.1 - Trats development board Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Heiko Schocher <hs@denx.de> Cc: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Heiko Schocher <hs@denx.de>
| * | omap4 i2c: add support for i2c bus 4Koen Kooi2012-09-06-1/+10
| |/ | | | | | | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
* | Merge branch 'master' of git://git.denx.de/u-boot-fdtTom Rini2012-09-17-1/+12
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| * | fdt: Check if the FDT address is configuredMarek Vasut2012-09-15-1/+12
| |/ | | | | | | | | | | | | | | | | | | | | | | | | In case the "fdt addr" command wasn't ran yet and any other "fdt" subcommand was issued, the system crashed due to NULL pointer being used. This is caused by "fdt addr" command setting up a pointer to the FDT memory location. Prior issuing "fdt addr", the pointer is NULL so calling any other subcommands crashed the u-boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2012-09-14-33/+162
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| * | MIPS: add support for qemu for little endian MIPS32 CPUsDaniel Schwierzeck2012-08-24-2/+8
| | | | | | | | | | | | | | | | | | Tested with 'qemu-system-mipsel -machine mips -bios u-boot.bin -nographic' Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: move CONFIG_STANDALONE_LOAD_ADDR to CPU config makefilesDaniel Schwierzeck2012-08-24-2/+4
| | | | | | | | | | | | | | | | | | Prepare for upcoming MIPS64 CPU support. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: factor out endianess flag handling to arch config.mkDaniel Schwierzeck2012-08-24-22/+21
| | | | | | | | | | | | | | | | | | This is CPU independent and should be configured architecture-wide. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | dm: mips: Import libgcc components from LinuxMarek Vasut2012-08-17-0/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import ashldr3, ashrdi3 and lshrdi3 to squash possible libgcc fp mismatch, resulting in the following warning: mips-linux-gnu-ld: Warning: /usr/lib/gcc/mips-linux-gnu/4.7/libgcc.a(_lshrdi3.o) uses hard float, u-boot uses soft float mips-linux-gnu-ld: Warning: /usr/lib/gcc/mips-linux-gnu/4.7/libgcc.a(_ashldi3.o) uses hard float, u-boot uses soft float Imported from Linux (linux-next 20120723) as of commit: commit 72fbfb260197a52c2bc2583f3e8f15d261d0f924 Author: Ralf Baechle <ralf@linux-mips.org> Date: Wed Jun 7 13:25:37 2006 +0100 [MIPS] Fix optimization for size build. It took a while longer than on other architectures but gcc has finally started to strike us as well ... This also fixes the damage by 6edfba1b33c701108717f4e036320fc39abe1912. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> [<daniel.schwierzeck@gmail.com>: removed USE_PRIVATE_LIBGCC = yes] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | dm: mips: Fix warnings in lb60 boardMarek Vasut2012-08-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lb60 board accesses the clkgr register, which is 32bit via 16bit IO ops. This causes malfunction. Fix this. qi_lb60.c: In function ‘cpm_init’: qi_lb60.c:72:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] qi_lb60.c:84:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel <zpxu@ingenic.cn> Cc: Shinya Kuribayashi <skuribay@pobox.com> Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
| * | dm: mips: Fix lb60 timer codeMarek Vasut2012-08-17-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The timer code contains more halfword writes which trigger gcc errors. The registers are again 32bit, yet written by 16bit writes, fix this: timer.c: In function ‘reset_timer_masked’: timer.c:37:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c: In function ‘get_timer_masked’: timer.c:43:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c: In function ‘timer_init’: timer.c:86:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c:88:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c:89:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c:90:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel <zpxu@ingenic.cn> Cc: Shinya Kuribayashi <skuribay@pobox.com> Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
| * | dm: mips: Fix lb60 WDT controlMarek Vasut2012-08-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Write the TSCR register via 32bit write instead of 16bit one. The register is 32bit wide and bit 16 is being set, triggering gcc overflow error and making the code broken. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel <zpxu@ingenic.cn> Cc: Shinya Kuribayashi <skuribay@pobox.com> Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
* | | Merge branch 'master' of git://git.denx.de/u-boot-avr32Tom Rini2012-09-13-5/+412
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| * | | avr32: add atngw100mkii boardAndreas Bießmann2012-09-13-0/+407
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is derived from an older patch provided by atmel in its buildroot-avr32-v3.0.0.tar.bz2 Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
| * | | Fix strict-aliasing warning in dlmallocSimon Glass2012-09-13-5/+5
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the following warnings in dlmalloc seen with my gcc 4.6. dlmalloc.c: In function 'malloc_bin_reloc': dlmalloc.c:1493: warning: dereferencing pointer 'p' does break strict-aliasing rules dlmalloc.c:1493: warning: dereferencing pointer 'p' does break strict-aliasing rules dlmalloc.c:1490: note: initialized from here dlmalloc.c:1493: note: initialized from here This version is tested on avr32 arch boards. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-ubiTom Rini2012-09-12-2/+2
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| * | | ubifs: Fix ubifsload when using ZLIBVeli-Pekka Peltola2012-09-10-2/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using ZLIB compression with UBIFS fails if last data node is not a size of UBIFS_BLOCK_SIZE (4096 bytes). Easiest way to test this is trying to read a file smaller than 4k: => ubifsload 41000000 /etc/fstab Loading file '/etc/fstab' to addr 0x41000000 with size 704 (0x000002c0)... UBIFS error (pid 0): read_block: bad data node (block 0, inode 2506) UBIFS error (pid 0): do_readpage: cannot read page 0 of inode 2506, error -22 Error reading file '/etc/fstab' /etc/fstab not found! exit not allowed from main input shell. => With this patch: => ubifsload 41000000 /etc/fstab Loading file '/etc/fstab' to addr 0x41000000 with size 704 (0x000002c0)... Done => Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com> Cc: kmpark@infradead.org Tested-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-mmcTom Rini2012-09-12-49/+129
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| * | | mmc: Remove incorrect cmd->flags usageAndy Fleming2012-09-06-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There were a couple of drivers that were actually using the flags field of the cmd structure, despite the fact that no one ever *set* that field. When we removed the field, those drivers failed to compile. Replaced the references with the correct usage of resp_type. Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | mmc: s5p_sdhci: add the set_mmc_clk for cmu controlJaehoon Chung2012-09-05-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Samsung SoC use the cmu control to set clock. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | mmc: s5p_sdhci: fixed wrong function argumentJaehoon Chung2012-09-05-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Useless code is removed, and get buswidth value. buswidth value will be used to choice the 4bit or 8bit. (Now used 4bit mode in sdhci.c by default) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | mmc: s5p_sdhci: set the SDHCI_QUIRK_BROKEN_R1BJaehoon Chung2012-09-05-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Samsung SoC is broken busy waiting for R1b type. And clk delay control value is modified the previosuly value. (that value used at the s5p_mmc.c) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | mmc: Add a SDHCI quirk for boards that have no CDJoe Hershberger2012-09-05-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards have no Card Detect wired. In that case, set the CD test bits in the standard interface. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | mmc: Fix version check for clock API in sdhci driverJoe Hershberger2012-09-05-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When setting up the clocks in the sdhci driver, the "spec version" must be masked off. Otherwise any time the vendor version is not 0, the check will allways assume the interface is version 3. This breaks when the interface is actually version 1 or 2. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | mmcinfo: Fix help messageBenoît Thébaudeau2012-09-05-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | mmc_get_dev: Return error if mmc_init failsBenoît Thébaudeau2012-09-05-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | tegra: put eMMC environment into the boot sectorsStephen Warren2012-09-05-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When I set up Tegra's config files to put the environment into eMMC, I assumed that CONFIG_ENV_OFFSET was a linearized address relative to the start of the eMMC device, and spanning HW partitions boot0, boot1, general* and the user area in order. However, it turns out that the offset is actually relative to the beginning of the user area. Hence, the environment block ended up in a different location to expected and documented. Set CONFIG_SYS_MMC_ENV_PART=2 (boot1) to solve this, and adjust CONFIG_ENV_OFFSET to be relative to the start of boot1, not the entire eMMC. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | env_mmc: allow environment to be in an eMMC partitionStephen Warren2012-09-05-8/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eMMC devices may have hardware-level partitions: 2 boot partitions, up to 4 general partitions, plus the user area. This change introduces optional config variable CONFIG_SYS_MMC_ENV_PART to indicate which partition the environment should be stored in: 0=user, 1=boot0, 2=boot1, 4..7=general0..3. This allows the environment to be kept out of the user area, which simplifies the management of OS-/user-level (MBR/GPT) partitions within the user area. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.1 at 2024-12-18 13:04:39 +0000