| Commit message (Collapse) | Author | Age | Lines |
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This patch adds CONFIG_SPLASH_SCREEN definition to board
config file to enable splashimage by default.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch adds CONFIG_SPLASH_SCREEN definition to board
config file to enable splashimage by default.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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This patch configures iomux gpr3 register to enable LVDS1
via IPU1 DI1 if user chooses to use it.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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The silicon revision is not printed correctly, on ARM2
and sabrelite board, the log is just as the following:
CPU: Freescale i.MX6 family TO0.0 at 792 MHz
We need print the silicon revision correctly as:
CPU: Freescale i.MX6 family TO1.2 at 792 MHz
with i.mx6q TO1.2 chip
Signed-off-by: Jason Liu <r64343@freescale.com>
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Fix fastboot crash issue on fastmx6sl-arm2 board.
Enlarge fastboot buffer size to 320MB for mx6 arm2 board, mx6 sabresd
board, thus fastboot could flash system.img up to 320MB
Signed-off-by: LiGang <b41990@freescale.com>
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Fix the build warning in uboot build.
Fix bug of incorrect dereference to periph2 clock pre divider.
Fix incorrect type of maxpackage size assign, even it's
not used at all in fastboot.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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This commit fix the linker error when enable more function(like CONFIG_NAND,
CONFIG_SPASHSCREEN,etc) in uboot ARM2 board, and a possable linker error for
other MX6 boards:
/home/lambert/share/SATA2/R13.3/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/
bin/arm-eabi-ld: section .bss [27831000 -> 278666e7] overlaps section
.rodata [2782387c -> 278609eb]
/home/lambert/share/SATA2/R13.3/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/
bin/arm-eabi-ld: section .rodata.str1.1 [278609ec -> 27867803] overlaps
section .bss [27831000 -> 278666e7]
One issue here is:
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script. Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.
Another issue is:
The secure boot feature require __hab_data section in uboot linker script,
but it's have a hard coding magic number, but if we enable more code, cause
.text section bigger, it will cross the line, so it report the
first linker error.
This commit disable SECURE_BOOT feature by default for android,
and comments if user want to use this feature, it needs change the
.lds by there configure.
Also, enlarge the magic number that this feature needs to cover
if more code is build in.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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To validate LDO bypass function fully, enable CONFIG_MX6_INTER_LDO_BYPASS
on u-boot and kernel, only for mx6sl.
Signed-off-by: Robin Gong <B38343@freescale.com>
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With the secure boot patch. MX6 NAND Boot is not functional. The root
cause is that, the original secure boot patch fills "0xFF' to spacing
regions, due to a issue in ROM code, read pages of all "0xff" will be
treated as a critical error. Thus prevent the U-Boot from booting
normally.
The fix adjust image copy size in IVT so that when secure boot is not
enabled, no unuseful data is copied by ROM code. Also the secure boot
option is default disabled. The end user won't enable it unless they
know what they are doing.
These prevent the ROM code from copied pages of "0xff" data, and fix the
issue.
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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It prints sd clk freq for cmd of mmcinfo, then it is much
easier to tell which mode sd/mmc card is running at.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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enable SD3.0 support on SD1 and SD2 on mx6sl arm2 cpu board.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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Move the uImage authentication to an earlier phase, in this way prevent
DDR content changed by OS load code, causing authentication failure.
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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Move the secure boot related implementation code from mx6q_arm2.c to
mx6/generic.c. In this way the HAB feature can be shared by all MX6
platforms
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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IC Validation team release new LPDDR2 script V0.93 in the following link,
"http://compass.freescale.net/livelink/livelink?func=ll&objId=226733834/"
Make changes to align to it
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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1.enable I2C and I2C bus recovery support on mx6sl_arm2
2.enable LDO bypass on u-boot, by configuring 'CONFIG_MX6_INTER_LDO_BYPASS'
Signed-off-by: Robin Gong <B38343@freescale.com>
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nosmp is added in the bootargs originally because of issues in kernel
smp implementation. Now these issues are fixed and we can safely remove
them
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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For MX6DL LPDDR2 board, in order to use both the 2 channels of the memory, the
"PL301_FAST2" must be set to 0x1. However this bit is not accessible using
DCD. Plugin mode must be utilized for this purpose.
The patch can be verified this way:
Enter U-boot console
> mw.l 0x80000000 0xC0 10
> mw.l 0x10000000 0xC1 10
> md.l 0x10000000 10
> md.l 0x80000000 10
Before the patch, 0x10000000 and 0x80000000 in fact point to the
same memory location. So the last 2 dump will show memory content of
both 0x000000C1
After the patch, 0x80000000 ponit to channel 0, 0x10000000 point to
channel 1. the last 2 dump will show memory content of 0x000000C0
and 0x000000C1 respectively
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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Move IPU QoS and VDOA/IPU/VPU AXI Cache config
to linux kernel in order to reduce code duplicate
Signed-off-by: Wayne Zou <b36644@freescale.com>
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For historical reasons U-Boot set "enable_wait_mode=off" in default
U-Boot parameter. Now wait mode is OK for these platforms so we
remove these settings.
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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Validation team released lateset LPDDR2 script V0.91, See
"http://compass.freescale.net/livelink/livelin
k?func=ll&objId=226435628&objAction=browse&viewType=1"
This change is necessary for bus freq scaling
Apply it for both DCD mode and plugin mode.
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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Fix a hang and a garbage update to the E Ink panel with the following
changes for both MX 6DL/S SabreSD and MX 6DL/S ARM2:
- Update the address for the EPDC waveform file to 6MB offset
in SD card.
- Update the waveform file size to cover the default
Pearl panel waveform file.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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issue:
SD1 connector on ARM2 is an MS-SD combo one which can not make
good contact with DAT4~DAT7 of 8bit mmc cards. It is an hw limitation
which will cause boot failure from 8bit mmc.
solution:
disable SD1 8bit mode on MX6SL arm2 board.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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We can use weak ODT setting, it will save about 50% DDR
power in runtime. Now we use 0x00007
MMDC0_MPODTCTRL MMDC1_MPODTCTRL, (Ohm)
Setting DDR_ODT imx_ODT Max_overclocking
0x22227 120 060 615MHz
0x11117 120 120 604MHz
0x00007 120 000 576MHz
0x00000 000 000 556MHz
Signed-off-by: Anson Huang <b20788@freescale.com>
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- EPDC splash screen changed to be disabled by default in the config
file for MX6DL_SABRESD and MX6DL_ARM2. If left enabled, the U-Boot image
will not boot correctly (hang), since some additional content on the boot device
(waveform file) is required for EPDC splash to work correctly.
- Fixes U-Boot break introduced with commit for ENGR00212287
Signed-off-by: Danny Nold <dannynold@freescale.com>
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- EPDC Splash support for MX6DL/S Sabre SD
- EPDC Splash support for MX6DL/S ARM2
- Currently, splash screen consists of a simple black border
around a white screen. Done this way to save in memory footprint.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Fix the PAD_LVE implementation used on MX6SL.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@freescale.com>
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- move recovery.h to common inlcude place.
- move supported_reco_envs to soc related, not board related,
- user can change this via configure header,
don't needs this in every board file.
- pass build for all mx5/mx6 android configs.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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- add android build config for mx6sl_arm2 board.
- add gpio support for mx6sl
- add boot image support
- add android recovery support
- add fastboot support, but fastboot cannot transfer file.
Signed-off-by Zhang Jiejing <jiejing.zhang@freescale.com>
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Add support for MX6SL mfgtools firmware support
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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cleanup android fastboot and udc build warnnings.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Add generic gpio interface in uboot.
Seems more and more gpio operation invoke in uboot,
without RAW register operation, we should
use generic gpio interface.
you should define the CONFIG_MXC_GPIO
use generic gpio interface:
gpio_request,
gpio_direction_output,
gpio_direction_input,
gpio_set_value,
gpio_get_value, etc.
Test on MX6Q, MX6DL.
Other MX6X should also define this config.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Original pad configuration don't provide enough bitfield width to hold
all necessary information. For MX6Sololite, a "PAD_CTL_LVE" is needed
to be configed for many pins.
iomux_v3_cfg_t is re-orgnized to address this issue. PAD_CTRL is
extended by 1 bit to hold the "PAD_CTL_LVE". Which is mapped to proper
bit location when configure the PAD config register.
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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set IPU AXI-id0 Qos=0xf(bypass) and AXI-id1 Qos=0x7,
mx6q use AXI-id0 for IPU display channel, it should has
highest priority(bypass), and AXI-id1 for other IPU channel,
it has high priority.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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In order to support one uImage for the i.mx6 soc family, the bootloader
must need fix up the load/entry address by adding the offset 0x70000000
for MX6SL parts due to the ddr physical address start from 0x80000000 on
MX6SL,but 0x10000000 for the soc other than i.mx6sl
Signed-off-by: Jason Liu <r64343@freescale.com>
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1. add check asrc register to enter recovery mode,
rather then check the file.
2. fix the boot.img can not fastboot flash function.
3. consolidate and cleanup fastboot code.
4. clean up many build warnning message.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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align vid, pid to let windows fastboot driver can be install.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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This issue have been found in mx53_smd(ENGR00163704), and found in sabresd
if accessing pfuze while system reboot or reset, I2C bus will be blocked
even if reboot,then pfuze will be failed to be probed, all device driver
which use pfuze regulator will be impacted. In u-boot, we can check the
SDA line low or high, if low, generate SCL and STOP signal to tell I2C
device release I2C bus. Please check ENGR00163704
Signed-off-by: Robin Gong <B38343@freescale.com>
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fix mx6dl usb init issue, due to leak of reset phy,
it was only called on MX6Q.
Signed-off-by: Shi Make <make.shi@freescale.com>
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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1.fix build error :
mx6q_sabresd.c: In function 'setup_i2c':
mx6q_sabresd.c:382: error: expected ')' before ';' token
mx6q_sabresd.c:393: error: expected ';' before '}' token
mx6q_sabresd.c: In function 'setup_pmic_voltages':
mx6q_sabresd.c:399: warning: unused variable 'val'
make[1]: *** [mx6q_sabresd.o] Error 1
2.modify mx6dl_sabresd_config to support pfuze on mx6dl sabresd board
Signed-off-by: Robin Gong <B38343@freescale.com>
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add pfuze and I2C support, support cpu internal LDO bypass which can be
enabled by CONFIG_MX6_INTER_LDO_BYPASS
Signed-off-by: Robin Gong <B38343@freescale.com>
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Set default boot to SD Card
Signed-off-by: Prabhu Sundararaj <b36876@freescale.com>
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Since FEC_RX_ER is not connected with PHY(LAN8720A), we need
either configure FEC_RX_ER PAD to other mode than FEC_RX_ER,
or configure FEC_RX_ER PAD to FEC_RX_ER but need pull it down,
otherwise, FEC MAC will report CRC error always. We configure
FEC_RX_ER PAD to GPIO mode here and remove the SW hack which
ignore the CRC error in fec driver
Signed-off-by: Jason Liu <r64343@freescale.com>
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This patch is to add the initial support for i.mx6sl ARM2 board, the patch does:
- implemention of LPDDR2 init script
- Plug-in/DCD mode support to do DDR initialization
- Debug UART(UART1) support
- SPI-NOR(M25P32, 4MB) flash support
- FEC support, PHY(LAN8720A, RMII mode)
- SD/MMC card support, SD1/SD2/SD3
Signed-off-by: Danny Nold <dannynold@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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Add EPDC splash screen support for U-Boot
Signed-off-by: Danny Nold <dannynold@freescale.com>
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This patch is to add the initial support for Freescale i.mx6sl chip.
i.mx6sl is the SoloLite verison of Freescale i.mx6 family.
The patch does:
- memory layout support,
- iomux support,
- clock support,
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Need set Power Supply Glitch to 0x41736166 and clear Power Supply Glitch
Detect bit when POR or reboot or power on, otherwise system could not be
power off anymore, it will power up auto agian. These steps may be move to
ROM code or fix by soc team in the future(PDM ticket number:TKT104835),
anyway,u-boot fix the issue firsly.
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Robin Gong <B38343@freescale.com>
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add fastboot function back in MX6Q_SABERSD board.
the MX6DL_SABERSD have usb init related issue which will
keep RESET, but left as later developement.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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The MC13892 is a Power Controller used with processors
of the family MX.51. The file adds definitions to be used to setup
the internal registers via SPI.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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IMX processors has a slightly different interface
to access GPIOs and do not make use of the provided GPIO
framework. The patch substitutes mxc_ specific
functions and make use of the API in asm/gpio.h
Signed-off-by: Stefano Babic <sbabic@denx.de>
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Since we want want to have a standard GPIO interface, this adds a definition
for this into include/asm-generic/gpio.h.
Signed-off-by: Simon Glass <sjg@chromium.org>
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