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* ENGR00170299-1 Android: add support fastboot functionZhang Jiejing2011-12-15-4/+651
| | | | | | add support for otg in MX6Q uboot to enable fastboot function. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00169919 MX6Q ARM2 U-Boot : Support Pop CPU BoardEric Sun2011-12-13-3/+539
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for MX6Q ARM2 LPDDR2 POP CPU Board. Change thing include - TEXT_BASE - RAM address and size - Initialization DCD - MMU related code Use mx6q_arm2_lpddr2pop_config as the build config. After u-boot.bin is generated, set the board to serial download mode, use sb loader to run the bootloader. There is one line in the original DDR initialization script setmem /32 0x00B00000 = 0x1 however this address can not be accessed by DCD. A try to add it later in "dram_init" block the boot up. Waiting for IC team to give an explanation on it. Hold temperorily The MMU Change can be concluded as the following - Cacheable and Uncacheable SDRAM allocation changes to Phys Virtual Size Property ---------- ---------- -------- ---------- 0x10000000 0x10000000 256M cacheable 0x80000000 0x20000000 16M uncacheable 0x81000000 0x21000000 240M cacheable - TEXT_BASE change to 0x10800000, which reserves 8MB of memory at the start of SDRAM. This address makes sure that the text section of U-boot have the same Physical and Virtural address, thus the PC don't need to change when MMU is enabled. Also the text section is all allocated in cacheable memory, which may increase excecution performance. - Since this SDRAM allocation avoid overlap in physical memory between cacheable and uncacheable memory, the implementation of __ioremap can be ignored Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00169741 UBOOT : DDR3 initialization based on the MX6Q ARDPrabhu Sundararaj2011-12-12-386/+84
| | | | | | | Fix for DDR3 initialization based on the MX6Q ARD. This will reflect 2GB of RAM onboard. Signed-off-by: Prabhu Sundararaj <prabhu.sundararaj@freescale.com>
* ENGR00169655 pcba : merge i2c recovery patch to pcbaRobin Gong2011-12-09-0/+274
| | | | | | add i2c recovery function in board_lateinit,merge the patch of ENGR00163704 Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00169654 mx53_pcba: enable DDR auto-calibrationRobin Gong2011-12-07-178/+620
| | | | | | | Enabled the functioon of DDR auto-calibration in flash_header.S of HW PCBA. Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00169500 mc34708 mx53_loco: 4s power off in QS boardRobin Gong2011-12-06-0/+1
| | | | | | Implement the power off function when push the PWR key for 4s Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00163704: MX5X: add i2c recovery function in board_lateinit.Zhang Jiejing2011-12-05-0/+530
| | | | | | | | | | | | | | | | | | This patch add a i2c bus recovery function, the i2c bus busy because some device pull down the I2C SDA line. This happens when Host is reading some byte from slave, and then host is reset/reboot. Since in this case, device is controlling i2c SDA line, the only thing host can do this give the clock on SCL and sending NAK, and STOP to finish this transaction. To fix this issue: when we found SDA is low, we generate 8 clock to let device send data, then send a NAK, and STOP to finish this I2C transaction , after this the clock will be clean. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00163513 MX6Q-UBOOT : Add download_mode cmdEric Sun2011-11-30-0/+59
| | | | | | | | | | | | | Add "download_mode" command to U-Boot. It will force a system reset and let boot running in "boot from serial rom" mode, which can be used by manufacturing tool. The command will triggle a write to SRC_GPR9 and SRC_GPR10, then triggle a watchdog reset. GPR9 and GPR10 can maintain their value during the reset, the value in it make ROM to start in "boot from serial rom" mode. After that GPR9 and GPR10 are written by their original value for normal boot. Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00163370 Android: uboot: mx53_smd fix warnning messageZhang Jiejing2011-11-29-2/+2
| | | | | | Fix minor error when adding recovery related code. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00163239-2 mc34708: enable extra charging circuitRobby Cai2011-11-28-0/+11
| | | | | | | | | current schema is to enable this extra charging circuit, and then enable or disable it by checking VBatt is less or more than 3.4v. If VBatt is less than 3.4v, enable it; otherwise disable it. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00163239-1 mc34708: fix not charging issue in ubootRobby Cai2011-11-28-3/+13
| | | | | | there's some incorrect setting in spi mode, fixed in this patch. Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00163040 - FEC : Fix ethernet cannot work after system sleep.Fugang Duan2011-11-25-6/+26
| | | | | | | | | | | | - Descript: Ethernet can't work in uboot and kernel DHCP throught press 'reset' key when send sleep command 'echo mem > /sys/power/state' - Cause: FEC driver will power down phy when system sleep. If just reset the board, FEC driver cannot run resume function. So, need power on phy in uboot and linux driver. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00162717 mx53_smd/mx53_loco DA9053: reset da9053 i2c and add dummy writeWayne Zou2011-11-25-66/+164
| | | | | | | | mx53_smd, mx53_loco DA9053: reset da9053 i2c by sending 9 dummy clock and start/stop when bootup and add dummy write when accessing da9053 registers. Signed-off-by: Wayne Zou <b36644@freescale.com>
* ENGR00162937 - FEC: Fix FEC cannot load kernel accroding tftp.Fugang Duan2011-11-24-0/+3
| | | | | | | | | | | - Issue description: Fec can not get ip address to download kernel if insert the cable after powering up the board more than 20 seconds. - Patch: Restart init FEC interface when net cannot get packets. The cause maybe cabel are unplugin or FEC are not ready. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00162938 MX5: Add download_mode command in uboot to enter MFG download mode.Zhang Jiejing2011-11-23-0/+49
| | | | | | | | | | | | Add download_mode command in uboot to enter MFG dowload mode , you can try download mode command in uboot and enter download mode. it first set srtc register, then before enter linux, it will clear these register to prevent the up comming watchdog reset will enter mfgtool mode. only add mx53 now. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00162874: Add enet clk change support for mx6Terry Lv2011-11-23-7/+75
| | | | | | Add enet clk change support for mx6. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00162709 Add Support for MX6Q Sabre AutoEric Sun2011-11-21-1/+2182
| | | | | | | 1. Change RAM size from 2GB to 1GB 2. Default boot from MMC Dev 2 Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00162491 Android: MX53_SMD: enter recovery mode by key.Zhang Jiejing2011-11-18-1/+16
| | | | | | | | | | | Implement a key press check on recovery mode check. User can press Vol- key to enter recovery mode when boot. Idealy, should be a combo key press together, but on SMD it only can Vol+ or Vol- but it can't press together. More usuful for user and less bug. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00162570: MX6-Increase VDDSOC_CAP voltage to 1.2VRanjani Vaidyanathan2011-11-17-0/+7
| | | | | | | | Set the VDDSOC LDO to increase the VDDSOC cap to 1.2V. This is required for correct functioning of GPU and when the ARM LDO is set to 1.225V (when ARM core is at 1GHz). Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
* ENGR00162437 uboot mc34708 pcba : add spi support on mc34708Robin Gong2011-11-17-8/+173
| | | | | | | | Rev C of pcba will connect mc34708 by spi default, so uboot should support it: 1. add spi support in mx53_pcba 2. move pmic voltage config from board_init to board_late_init 3. support both I2C and SPI on mc34708 in one image Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00155891 : Fix reboot stress test failed issueRobin Gong2011-11-16-258/+371
| | | | | | | | | | | | | | If we replace DCD mode with plug-in mode in u-boot , we found DDR not stable. We should enable "Force Measurement" after the delay line parameters is configured in the plug-in code, for example: 0x63fd9088 = 0x34333936 0x63fd9090 = 0x49434942 0x63fd90F8 = 0x00000800 "Force Measurement" update all of mx53 DDR script, include mx53_smd,mx53_loco,mx53_evk,mx53_ard, mx53_pcba, at the same time, mx53_pcba will change from DCD mode to plug-in mode in flash_header.S Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00161852: remove u-boot build warnings for mx6qTerry Lv2011-11-10-5/+12
| | | | | | Remove u-boot build warnings for mx6q. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00161860 Fix build issue when enable NAND in UbootAllen Xu2011-11-10-0/+1
| | | | | | Add the MACRO define CONFIG_APBH_DMA which missed in last commit Signed-off-by: Allen Xu <allen.xu@freescale.com>
* ENGR00161846 uboot mx6q_arm2: adjust IPU axi-id0/1 Qos valueJason Chen2011-11-10-6/+6
| | | | | | | | | set IPU AXI-id0 Qos=0xf(bypass) and AXI-id1 Qos=0x7, mx6q use AXI-id0 for IPU display channel, it should has highest priority(bypass), and AXI-id1 for other IPU channel, it has high priority. Signed-off-by: Jason Chen <b02280@freescale.com>
* ENGR00161691 Manufacturing update for Sabre-liteMahesh Mahadevan2011-11-08-1/+266
| | | | | | Add support for the manufacturing tool on MX6 Sabre-lite Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00161354 MX6Q ARM2 U_BOOT: "mmc dev 0" or "mmc dev 1" cmds will hangAnish Trivedi2011-11-04-6/+10
| | | | | | | | Ungate the clocks to SD1 and SD2 ports (on baseboard of ARM2 system) so that the above cmds do not hang waiting for cmd to complete or timeout. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00161415: mc34708: set 1p5Robby Cai2011-11-04-2/+2
| | | | | | set charging current limit to 1p5 Signed-off-by: Robby Cai <R63905@freescale.com>
* ENGR00157106 uboot mx6q: adjust IPU axi-id0/1 Qos valueJason Chen2011-11-04-3/+3
| | | | | | | | | set IPU AXI-id0 Qos=0xf(bypass) and AXI-id1 Qos=0x7, mx6q use AXI-id0 for IPU display channel, it should has highest priority(bypass), and AXI-id1 for other IPU channel, it has high priority. Signed-off-by: Jason Chen <b02280@freescale.com>
* ENGR00161317 - MX6Q: Integrate plugin and dcd DRAM init script in uboot.Fugang Duan2011-11-04-0/+300
| | | | | | | | | - Add plugin DRAM init script in flash_header.S file. - Define CONFIG_FLASH_PLUG_IN in mx6q_sabreauto.h to switch plugin mode. - DDR support 528MHz and 480MHz in plugin mode. Switch DDR clock to 480M according to define CONFIG_IPG_40M_FR_PLL3. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00161373 Move the MAC address read from fuse code to MX6 SoC fileMahesh Mahadevan2011-11-03-59/+21
| | | | | | | Move the code to read the mac address from the fuse to SoC file and out of the board file Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00161296 Update the MX6 Sabre-lite environment option in the config fileMahesh Mahadevan2011-11-03-7/+20
| | | | | | | | Allow boot to either SD card through 6q_bootscript. Define clearenv command to restore factory defaults Add upgradeu command to upgrade u-boot if required Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00161254 MX6Q: Add NAND support in UbootAllen Xu2011-11-03-1/+91
| | | | | | | | Add iomux and clock setting in Uboot code to support NAND, due to the conflict between NAND and SD, NAND function is not enabled in default configuration. Signed-off-by: Allen Xu <allen.xu@freescale.com>
* ENGR00161294 Update MX6 code to read MAC address from fusesMahesh Mahadevan2011-11-02-9/+20
| | | | | | Fix the code to read the MAC address correctly from the fuses Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00161277 Add fuse access capability for MX6 Sabre-liteMahesh Mahadevan2011-11-02-4/+15
| | | | | | Add support to read and program fuses in the MX6 Sabre-lite Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00139215 iMX61 Uboot support blow fuseRyan QIAN2011-11-02-0/+846
| | | | | | | | 1. add force option to blow operation 2. add blown value check 3. add simple validation for zeros returned by 'simple_strtoul' call Signed-off-by: Ryan QIAN <b32804@freescale.com>
* ENGR00161126 Enable Hush parser in MX6Q Sabrelite configMahesh Mahadevan2011-11-01-0/+4
| | | | | | | Enable the Hush parser in the Sabrelite config to parse boot scripts. Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00161133: Add spi-nor support for mx6qTerry Lv2011-11-01-2/+83
| | | | | | Add spi-nor support for mx6q. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00161125 Update MX6Q Sabrelite config to boot from MMC by defaultMahesh Mahadevan2011-10-31-2/+2
| | | | | | Boot from MMC by default and disable DHCP by default on MX6Q Sabrelite Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00161004 MX6Q Uboot Rename sabreauto to arm2 boardAnish Trivedi2011-10-28-32/+48
| | | | | | | | | Sabreauto is an inaccurate name for the Armadillo2 board that this code is actually meant for. So, replaced "sabreauto" in folder names, file names, configs, and code with "arm2". Created a new machine id for ARM2 board. Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00139221 USDHC Add SDXC UHS-I supportAnish Trivedi2011-10-27-26/+344
| | | | | | | Modified MMC library for UHS-I command sequence Added support to USDHC driver for UHS-I Signed-off-by: Anish Trivedi <anish@freescale.com>
* ENGR00160514: clean up compiler warning for mx6qTerry Lv2011-10-26-2/+3
| | | | | | Clean up compiler warning. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00160399 Added support for the MX6Q Sabre-lite boardMahesh Mahadevan2011-10-25-82/+1480
| | | | | | Includes support for uSDHC read, write, FEC, SPI-NOR etc. Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00160725 fastboot: fix the serial number display errorXinyu Chen2011-10-25-1/+1
| | | | | | Incorrect usb string package size assign. Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
* ENGR00160507 Update the IOMUX implementation for MX6Mahesh Mahadevan2011-10-20-6/+5
| | | | | | | The MX6 code incorrectly uses the Hysteresis bit to decide NO_PAD_CTRL operation Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
* ENGR00156934: Update mx35 AIPS max dbg m3if esdctl settingsTerry Lv2011-10-18-18/+32
| | | | | | | This patch is to fix mx35 TVIN flicker issue. It will change AIPS, M3IF, MAX, DBG and esdctl settings. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00156930: Update MX35 DDR2 scriptsTerry Lv2011-10-18-81/+451
| | | | | | | | | | Update MX35 DDR2 scripts for that when enabling 256MB, the CSD1 is not stable. 1. Add CSD1 configs to support 256M RAM. 2. Add mx35 TO2 256M RAM configs. 3. Update DDR init code in lowlevel_init.S for external boot. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00139279-3 MX6Q: invalidate the D-CACHEHuang Shijie2011-10-14-0/+37
| | | | | | | | | | | The USB boot mode does not invalidate the D-CACHE, so the uboot will DEAD when it tries to invalidate the random data in the cache line. The MMC boot will do the MMU init which will do the D-CACHE invalidation. So the MMC boot will ok in the boot procedure. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00139279-2 MX6Q: add mfgtool supportHuang Shijie2011-10-14-0/+269
| | | | | | add the MFGTOOL support for mx6q. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00139279-1 MX6Q: add env_embedded module for CONFIG_ENV_IS_NOWHEREHuang Shijie2011-10-14-0/+1
| | | | | | | The env_embedded module is a built-in module. So add the module when the CONFIG_ENV_IS_NOWHERE is enabled. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00159845 [MX6]lpddr2 board, put MMDC into power saving modeAnson Huang2011-10-13-2/+10
| | | | | | | | For lpddr2 board. 1. Put mmdc into power saving mode; 2. Do the necessary setting for AXI cache and IPU Qos. Signed-off-by: Anson Huang <b20788@freescale.com>
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