| Commit message (Collapse) | Author | Age | Lines |
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Add download_mode command in uboot to enter MFG dowload mode ,
you can try download mode command in uboot and enter download mode.
it first set srtc register, then before enter linux,
it will clear these register to prevent the up comming watchdog
reset will enter mfgtool mode.
only add mx53 now.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Add enet clk change support for mx6.
Signed-off-by: Terry Lv <r65388@freescale.com>
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1. Change RAM size from 2GB to 1GB
2. Default boot from MMC Dev 2
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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Implement a key press check on recovery mode check.
User can press Vol- key to enter recovery mode when boot.
Idealy, should be a combo key press together, but on SMD
it only can Vol+ or Vol- but it can't press together.
More usuful for user and less bug.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Set the VDDSOC LDO to increase the VDDSOC cap to 1.2V.
This is required for correct functioning of GPU and when the
ARM LDO is set to 1.225V (when ARM core is at 1GHz).
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Rev C of pcba will connect mc34708 by spi default, so uboot should support it:
1. add spi support in mx53_pcba
2. move pmic voltage config from board_init to board_late_init
3. support both I2C and SPI on mc34708 in one image
Signed-off-by: Robin Gong <B38343@freescale.com>
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If we replace DCD mode with plug-in mode in u-boot , we found DDR not stable.
We should enable "Force Measurement" after the delay line
parameters is configured in the plug-in code, for example:
0x63fd9088 = 0x34333936
0x63fd9090 = 0x49434942
0x63fd90F8 = 0x00000800 "Force Measurement"
update all of mx53 DDR script, include mx53_smd,mx53_loco,mx53_evk,mx53_ard,
mx53_pcba, at the same time, mx53_pcba will change from DCD mode to plug-in
mode in flash_header.S
Signed-off-by: Robin Gong <B38343@freescale.com>
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Remove u-boot build warnings for mx6q.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Add the MACRO define CONFIG_APBH_DMA which missed in last commit
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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set IPU AXI-id0 Qos=0xf(bypass) and AXI-id1 Qos=0x7,
mx6q use AXI-id0 for IPU display channel, it should has
highest priority(bypass), and AXI-id1 for other IPU channel,
it has high priority.
Signed-off-by: Jason Chen <b02280@freescale.com>
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Add support for the manufacturing tool on MX6 Sabre-lite
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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Ungate the clocks to SD1 and SD2 ports (on baseboard of ARM2 system)
so that the above cmds do not hang waiting for cmd to complete or
timeout.
Signed-off-by: Anish Trivedi <anish@freescale.com>
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set charging current limit to 1p5
Signed-off-by: Robby Cai <R63905@freescale.com>
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set IPU AXI-id0 Qos=0xf(bypass) and AXI-id1 Qos=0x7,
mx6q use AXI-id0 for IPU display channel, it should has
highest priority(bypass), and AXI-id1 for other IPU channel,
it has high priority.
Signed-off-by: Jason Chen <b02280@freescale.com>
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- Add plugin DRAM init script in flash_header.S file.
- Define CONFIG_FLASH_PLUG_IN in mx6q_sabreauto.h to switch plugin mode.
- DDR support 528MHz and 480MHz in plugin mode.
Switch DDR clock to 480M according to define CONFIG_IPG_40M_FR_PLL3.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Move the code to read the mac address from the fuse to SoC file
and out of the board file
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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Allow boot to either SD card through 6q_bootscript.
Define clearenv command to restore factory defaults
Add upgradeu command to upgrade u-boot if required
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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Add iomux and clock setting in Uboot code to support NAND, due to
the conflict between NAND and SD, NAND function is not enabled in
default configuration.
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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Fix the code to read the MAC address correctly from the fuses
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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Add support to read and program fuses in the MX6 Sabre-lite
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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1. add force option to blow operation
2. add blown value check
3. add simple validation for zeros returned by 'simple_strtoul' call
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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Enable the Hush parser in the Sabrelite config to parse boot
scripts.
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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Add spi-nor support for mx6q.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Boot from MMC by default and disable DHCP by default on MX6Q Sabrelite
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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Sabreauto is an inaccurate name for the Armadillo2 board that
this code is actually meant for. So, replaced "sabreauto" in folder names,
file names, configs, and code with "arm2". Created a new machine id for
ARM2 board.
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Modified MMC library for UHS-I command sequence
Added support to USDHC driver for UHS-I
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Clean up compiler warning.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Includes support for uSDHC read, write, FEC, SPI-NOR etc.
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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Incorrect usb string package size assign.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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The MX6 code incorrectly uses the Hysteresis bit to decide NO_PAD_CTRL
operation
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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This patch is to fix mx35 TVIN flicker issue.
It will change AIPS, M3IF, MAX, DBG and esdctl settings.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Update MX35 DDR2 scripts for that when enabling 256MB, the CSD1 is not
stable.
1. Add CSD1 configs to support 256M RAM.
2. Add mx35 TO2 256M RAM configs.
3. Update DDR init code in lowlevel_init.S for external boot.
Signed-off-by: Terry Lv <r65388@freescale.com>
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The USB boot mode does not invalidate the D-CACHE,
so the uboot will DEAD when it tries to invalidate the random data in
the cache line.
The MMC boot will do the MMU init which will do the D-CACHE invalidation.
So the MMC boot will ok in the boot procedure.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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add the MFGTOOL support for mx6q.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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The env_embedded module is a built-in module.
So add the module when the CONFIG_ENV_IS_NOWHERE is enabled.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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For lpddr2 board.
1. Put mmdc into power saving mode;
2. Do the necessary setting for AXI cache and IPU Qos.
Signed-off-by: Anson Huang <b20788@freescale.com>
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enlarge max image size to 148MB from 128MB. since android become bigger.
so 128M not enough.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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And new config to enable lpddr2 board with
H9TKNNN4KDMPQR-NDM chip.
Signed-off-by: Anson Huang <b20788@freescale.com>
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mx53 smd: use highest value for unknown board revision value
Signed-off-by: Wayne Zou <b36644@freescale.com>
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According to the datasheet, VDIG_PLL needs to be increased
to 1.3v for TO2.0. This operation has been done in the
low_level_init.S. Remove the duplicated code here.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Some semicolons are missed after "mmc dev 0".
They need to be added to make default environment work.
Signed-off-by: Terry Lv <r65388@freescale.com>
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Default environment in mx6q uses mmc device 0.
We should use mmc device 3.
Signed-off-by: Terry Lv <r65388@freescale.com>
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reduce the time of global reset to 4s in the boards of loco and pcba
Signed-off-by: Robin Gong <B38343@freescale.com>
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Need to send RCA when sending CMD13.
Cannot use print_size function when displaying card capacity
because it expects a 32 bit integer as input, while mmc->capacity
is a 64 bit integer. There is loss of information leading to incorrect
capacities being displayed for "mmcinfo" cmd. Changed it to simply
print the entire 64 bit integer, which is the number of bytes.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Removed delay of 10 ms before each command. There should not be
a need to have this delay after the ENGR00156405 patch that polls
until card is not busy anymore before proceeding to next cmd.
Added poll on reset bits of controller after the bits are set to
wait until they clear before proceeding further.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
Signed-off-by: Anish Trivedi <anish@freescale.com>
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The errata, not applicable to USDHC, causes ESDHC to shut off clock to
the card when auto-clock gating is enabled for commands with busy
signalling and no data phase. The card might require the clock to exit
the busy state, so the workaround is to disable the auto-clock gate
bits in SYSCTL register for such commands. The workaround also entails
polling on DAT0 bit in the PRSSTAT register to learn when busy state is
complete. Auto-clock gating is re-enabled at the end of busy state.
Signed-off-by: Anish Trivedi <anish@freescale.com>
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In addition to ensuring that PERCLK remains at least 2.5 times slower
than the AHB clock, certain steps need to be followed to ensure robust
operation of PERCLK when reconfiguring the PERCLK clock source.
To properly configure the PERCLK clock source, the following steps are
required:
1.In the CCGR registers, gate the clocks to all PERCLK-dependent
modules.
2.Select the desired input clock for the PERCLK root clock (to be either
source from the peripherals main source clock or the
lp_apm clock source). Refer to the CMCBR register,
perclk_lp_apm_sel bit.
3.Configure the perclk_pred1, perclk_pred2, and perclk_podf dividers
to the desired setting. Refer to the CBCDR register for details.
4.In the CCGR registers, enable the desired clocks for the
PERCLK-dependent module clocks.
Certain steps are required to reconfigure perclk_root.
If don't follow these steps, GPT timer may stop and the kernel stops
at " "Calibrating delay loop".
Signed-off-by: Terry Lv <r65388@freescale.com>
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After enabling boot partition on an eMMC using "mmc bootpart" command, the
partition configuration variable that is supposed to track this value on the
eMMC is not updated. This leads to stale and possibly inaccurate boot partition
number being printed when "mmcinfo" command is used, thereby confusing the user.
The fix is to update the part_config variable of mmc struct with the new value
that was just written to the eMMC.
Also removed condition that restricted boot_bus_width programming (for fastboot)
to eMMC with DDR support only. Now, even non-DDR capable eMMCs can be programmed
for fastboot (in SDR mode).
Signed-off-by: Anish Trivedi <anish@freescale.com>
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For DA9053 I2C SDA stuck low issue: the I2C block in DA9053 may not correctly
receive a Power On Reset and device is in unknown state during start-up.
The only way to get the chip into known state before any communication
with the Chip via I2C is to dummy clock the I2C and bring it in a state
where I2C can communicate. Dialog suggested to provide 9 clock on SCL.
Dialog don't know the exact reason for the fault and assume it is because
some random noise or spurious behaviour.
This has to been done in host platform specific I2C driver during
start-up when the I2C is being configured at platform level to supply with
dummy 9 clock on SCL. Dialog I2C driver has no control to provide dummy 9
clock on SCL.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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Fix mx53 evk build error.
Signed-off-by: Terry Lv <r65388@freescale.com>
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