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* gpio: Add DW APB GPIO driverMarek Vasut2015-08-23-0/+175
| | | | | | | | Add driver for the DesignWare APB GPIO IP block. This driver is DM capable and probes from DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
* arm: socfpga: Make the pinmux table const u8Marek Vasut2015-08-23-8/+6
| | | | | | | | | | | Now that we're actually converting the QTS-generated header files, we can even adjust their data types. A good candidate for this is the pinmux table, where each entry can have value in the range of 0..3, but each element is declared as unsigned long. By changing the type to u8, we can save over 600 Bytes from the SPL, so do it. This patch also constifies the array. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Switch to filtered QTS filesMarek Vasut2015-08-23-2982/+2546
| | | | Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Add qts-filter.sh scriptMarek Vasut2015-08-23-0/+205
| | | | | | | | | Add script which loads the QTS-generated sources and headers and converts them into sensible format which can be used with much more easy in mainline U-Boot. The script also filters out macros which makes no sense anymore, so they don't pollute namespace and waste space. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Remove AV-specific parts from CV-SoCDKMarek Vasut2015-08-23-1153/+0
| | | | | | | Just remove the ArriaV specific parts from the CycloneV SoCDK board and they are no longer needed now. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Remove CV-specific parts from AV-SoCDKMarek Vasut2015-08-23-1117/+0
| | | | | | | Just remove the CycloneV specific parts from the ArriaV SoCDK board and they are no longer needed now. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Split Altera socfpga into AV and CV SoCDKMarek Vasut2015-08-23-2/+2773
| | | | | | | | | | | | | | | | | | The board/altera/socfpga directory is not a generic SoCFPGA machine anymore, but instead it represents the Altera SoCDK board. To make matters more complicated, it represents both CycloneV and ArriaV variant. On the other hand, nowadays, the content of this board directory is mostly comprised of QTS-generated header files, while all the generic code is in arch/arm/mach-socfpga already. Thus, this patch splits the board/altera/socfpga into a separate board directory for ArriaV SoCDK and CycloneV SoCDK, so that each can be populated with the correct QTS-generated header files for that particular board. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Unbind CPU type from board typeMarek Vasut2015-08-23-8/+21
| | | | | | | | | | | | | | | | | | | The CONFIG_TARGET_SOCFPGA_CYCLONE5 and CONFIG_TARGET_SOCFPGA_ARRIA5 selected both a board and a CPU. This is not correct as these macros are supposed to select only board. All would be good, if QTS-generated header files didn't check for these macros exactly to determine if the platform is Cyclone V or Arria V. Thus, for the sake of compatibility with not well fleshed out header file generator, this patch makes these two macros into a stub config option and introduces new CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK and CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK targets, which select the previous stub config option. The result is that compatibility with QTS is preserved and the new CONFIG_TARGET_* select actual target boards. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Move wrappers into platform directoryMarek Vasut2015-08-23-11/+18
| | | | | | | | | Move the wrappers for QTS-generated files into platform directory out of the board directory. The trick here is to add -I to CFLAGS such that it points to the board directory in source tree and thus the qts/ directory there is still reachable. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Do not enable gmac1 in Cyclone V dtsiMarek Vasut2015-08-23-6/+1
| | | | | | | | | | | The GMAC which is enabled is purely board property, so do not enable arbitrary GMAC in DT include files. Same goes for PHY mode, which is again a board property. The CycloneV SoCDK does this correctly, but SoCrates doesn't. This bug never manifested itself though, since all the boards ever used the GMAC1 . This bug manifests itself only on boards that utilise GMAC0. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Make the DT mmc node consistentMarek Vasut2015-08-23-3/+2
| | | | | | | | The socfpga_cyclone5.dtsi has an mmc0 node, socrates has mmc node. This makes aliases not very usable, so make everything into mmc0. Moreover, zap the useless mmc alias while at this. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Fix delay in clock managerMarek Vasut2015-08-23-7/+5
| | | | | | | | This code claims it needs to wait 7us, yet it uses get_timer() function which operates with millisecond granularity. Use timer_get_us() instead, which operates with microsecond granularity. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Fix delay in freeze controllerMarek Vasut2015-08-23-7/+5
| | | | | | | | | | | | Based on observation, this udelay(20) was apparently too high and caused subsequent failure to calibrate DDR when U-Boot was compiled with certain toolchains. Lowering this delay fixed the problem. Instead of permanently lowering the delay, calculate the correct delay based on the original comment, that is, obtain EOSC1 frequency and use it to calculate the precise delay. Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: Repair uninited variableMarek Vasut2015-08-23-1/+1
| | | | | | | | | | | | | Fix the following problem: drivers/ddr/altera/sequencer.c: In function 'sdram_calibration_full': drivers/ddr/altera/sequencer.c:1943:25: warning: 'found_failing_read' may be used uninitialized in this function [-Wmaybe-uninitialized] if (found_passing_read && found_failing_read) ^ drivers/ddr/altera/sequencer.c:1803:26: note: 'found_failing_read' was declared here u32 found_passing_read, found_failing_read, initial_failing_dtap; ^ Signed-off-by: Marek Vasut <marex@denx.de>
* ddr: altera: Replace float multiplication with integer oneMarek Vasut2015-08-23-1/+1
| | | | | | | | | | | | | | | | This gem is really really rare, there was an actual float used in the Altera DDR init code, which pulled in floating point ops from the libgcc, just wow. Since we don't support floating point operations the same way Linux does not support them, replace this with an integer multiplication and division combo. This removes some 2kiB of size from the SPL as the floating point ops are no longer pulled in from libgcc. This was detected by enabling CONFIG_USE_PRIVATE_LIBGCC=y , which does not contain the floating point bits. Signed-off-by: Marek Vasut <marex@denx.de>
* ARM: davinci: remove support for cam_enc_4xxMasahiro Yamada2015-08-20-1761/+1
| | | | | | | | | This has not been converted to Generic Board, so should be removed. (See doc/README.generic-board for details.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* Merge git://git.denx.de/u-boot-usbTom Rini2015-08-19-61/+223
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| * usb: dwc2: Rename to dwc2_usbMarek Vasut2015-08-19-1/+1
| | | | | | | | | | | | | | This driver is not used only on exynos, but also on Altera SoCFPGA, HiSilicon SoCs, RPi etc, so rename it accordingly to prevent confusion. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: dwc2: Add original Synopsys compat stringMarek Vasut2015-08-19-0/+1
| | | | | | | | | | | | Add the Synopsys compatible string. This is used in SoCFPGA DT files. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: gadget: ether: populate _reset_ callbackKishon Vijay Abraham I2015-08-19-0/+1
| | | | | | | | | | | | | | | | | | | | | | populate _reset_ callback to the USB ethernet gadget since UDC core expects every gadget driver to have the reset callback. This shouldn't be needed once the ethernet gadget driver is adapted to use the composite driver. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
| * usb: host: xhci-omap: invoke board_usb_cleanup in xhci_hcd_stopKishon Vijay Abraham I2015-08-19-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | xhci omap driver has board_usb_init in xhci_hcd_init but doesn't have the corresponding cleanup function in xhci_hcd_stop. Fix it here by invoking board_usb_cleanup() in xhci_hcd_stop(). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
| * usb: gadget: ether: Perform board initialization from ethernet gadget driverKishon Vijay Abraham I2015-08-19-0/+4
| | | | | | | | | | | | | | | | | | | | | | Ethernet gadget driver can be used both by both SPL and u-boot. Since usb_eth_init() is the entry point for ethernet gadget driver, perform board initialization there. Also perform the cleanup in usb_eth_halt. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
| * usb: xhci: Fix a potential NULL pointer dereferenceSergey Temerkhanov2015-08-19-5/+14
| | | | | | | | | | | | | | | | | | This patch fixes a potential NULL pointer dereference arising on non-present/non-initialized xHCI controllers and adds some error handling to xHCI code Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
| * usb: spear: Add support for both SPEAr600 EHCI controllersStefan Roese2015-08-19-3/+41
| | | | | | | | | | | | | | | | | | | | | | USB EHCI on SPEAr600 has not been tested for a while. The base controller addresses are missing. This patch adds the defines to the header. And adds the missing code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Vipin Kumar <vk.vipin@gmail.com> Cc: Marek Vasut <marex@denx.de>
| * imx: usb: ehci-mx6: wait_for_bit to check reg statusAdrian Alonso2015-08-19-4/+33
| | | | | | | | | | | | | | Add wait_for_bit to check reg bit status and replace unbounded loops to check usb command status Signed-off-by: Adrian Alonso <aalonso@freescale.com>
| * imx: usb: ehci-mx6: add usb support for imx7d socAdrian Alonso2015-08-19-19/+82
| | | | | | | | | | | | Extend ehci-mx6 usb driver to support imx7d usb Signed-off-by: Adrian Alonso <aalonso@freescale.com>
| * imx: usb: ehci-mx6: document board specific functionsAdrian Alonso2015-08-19-0/+31
| | | | | | | | | | | | | | | | | | | | Document target board specific functions board_ehci_hcd_init - override usb phy mode board_ehci_hcd_init - set usb vbus voltage board_ehci_power - enables/disables usb vbus voltage Signed-off-by: Adrian Alonso <aalonso@freescale.com>
| * imx: usb: ehci-mx6: reg accessor cleanupsAdrian Alonso2015-08-19-33/+18
| | | | | | | | | | | | Cleanup read/write register access, use clr/set bits_le32 Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* | zynqmp: enable CONFIG_NET_RANDOM_ETHADDRMichal Simek2015-08-19-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have to set a MAC address to use network. Otherwise, the tftpboot command fails with the following message: Gem.e000b000 Waiting for PHY auto negotiation to complete........ done *** ERROR: `ethaddr' not set Since commit 92ac52082140 ("net: Remove all references to CONFIG_ETHADDR and friends"), we can not use CONFIG_ETHADDR. The easiest way to set a MAC address is to enable CONFIG_NET_RANDOM_ETHADDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM: dts: Rename memory@0 to memoryMichal Simek2015-08-19-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | zynq-7000.dtsi include skeleton.dtsi which contains memory node with base address and size zero. If you add memory@0 node to the platform DTS in final DTB there are two memory nodes and U-Boot works with the first one (with zeros) which end up in failing in dram_init because size is zero. Platform memory node should rewrite default memory node setup from skeleton.dtsi that's why platfroms needs to also use memory as node name instead of memory@0. Reported-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | zynq: enable CONFIG_NET_RANDOM_ETHADDRMasahiro Yamada2015-08-19-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have to set a MAC address to use network. Otherwise, the tftpboot command fails with the following message: Gem.e000b000 Waiting for PHY auto negotiation to complete........ done *** ERROR: `ethaddr' not set Since commit 92ac52082140 ("net: Remove all references to CONFIG_ETHADDR and friends"), we can not use CONFIG_ETHADDR. The easiest way to set a MAC address is to enable CONFIG_NET_RANDOM_ETHADDR. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | zynq: Make CONFIG_OF_EMBED default caseMichal Simek2015-08-19-1/+12
| | | | | | | | | | | | | | Use embedded DTB to let users use u-boot instead of u-boot-dtb.bin. And fix SPL to use this target. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | zynqmp: usb: Add usb dwc3 driver support for zynqmpSiva Durga Prasad Paladugu2015-08-19-2/+75
| | | | | | | | | | | | | | | | | | | | Added usb dwc3 driver support for zynqmp this also supports the DFU and LTHOR to download the linux images on to RAM and cen be booted from those linux images. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM: zynq: drop "optional" from board select in favor of ZC702Masahiro Yamada2015-08-19-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | One disadvantage of commit a26cd04920dc (arch: Make board selection choices optional) is that Kconfig could create such an insane .config file that no board is selected. Rip off the "optional" again in favor of ZC702 as the default target. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | board: Xilinx: zynqmp: Define checkboard() functionSiva Durga Prasad Paladugu2015-08-19-0/+6
| | | | | | | | | | | | | | Define checkboard() function for zynqMP Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | configs: zynqmp: Enable networking by default for EP108Michal Simek2015-08-19-4/+6
| | | | | | | | | | | | Enable networking for EP108 by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM: zynqmp_ep: Enable ethernet for EPMichal Simek2015-08-19-0/+3
| | | | | | | | | | | | Enable gem0 and setup phy addr for EP. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM: zynqmp: Add platform specific arch_get_page_tableMichal Simek2015-08-19-0/+5
| | | | | | | | | | | | | | | | | | Based on the patch: "armv8: caches: Added routine to set non cacheable region" (sha1: dad17fd51027ad02ac8f02deed186d08109d61fd) it is necessary to add platform specific hook. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | zynqmp: Enable U-Boot run in EL3Michal Simek2015-08-19-0/+8
|/ | | | | | | Enable Secure IOU setup to enable U-Boot to run in EL3 without setting from ATF. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* of: clean up OF_CONTROL ifdef conditionalsMasahiro Yamada2015-08-18-99/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROLMasahiro Yamada2015-08-18-32/+17
| | | | | | | | | | | | | | | | | | | As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* fdtdec: fix OF_CONTROL switchMasahiro Yamada2015-08-18-1/+1
| | | | | | | | There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: drop CONFIG_DM_DEVICE_REMOVE from uncmd listMasahiro Yamada2015-08-18-16/+13
| | | | | | | | | | | | | | | We do not want to compile the DM remove code for SPL. Currently, we undef it in include/config_uncmd_spl.h (for C files) and in scripts/Makefile.uncmd_spl (for Makefiles). This is really ugly. This commit demonstrates how we can deprecate those two files. Use $(SPL_) for the entry in the Makfile and CONFIG_IS_ENABLED() in C files. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* led: unify obj-$(CONFIG_LED) and obj-$(CONFIG_SPL_LED) entriesMasahiro Yamada2015-08-18-2/+1
| | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* led: rename CONFIG_SPL_LED_SUPPORT to CONFIG_SPL_LEDMasahiro Yamada2015-08-18-2/+2
| | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ram: unify obj-$(CONFIG_RAM) and obj-$(CONFIG_SPL_RAM) entriesMasahiro Yamada2015-08-18-2/+1
| | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ram: rename CONFIG_SPL_RAM_SUPPORT to CONFIG_SPL_RAMMasahiro Yamada2015-08-18-2/+2
| | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* clk: unify obj-$(CONFIG_CLK) and obj-$(CONFIG_SPL_CLK) entriesMasahiro Yamada2015-08-18-2/+1
| | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* clk: rename CONFIG_SPL_CLK_SUPPORT to CONFIG_SPL_CLKMasahiro Yamada2015-08-18-2/+2
| | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: unify obj-$(CONFIG_DM) and obj-$(CONFIG_SPL_DM) entriesMasahiro Yamada2015-08-18-2/+2
| | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-08-24 02:08:56 +0000