summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* defconfig: am43xx_hs_evm: enable i2c driver modelMugunthan V N2016-07-26-0/+1
| | | | | | | | Enable i2c driver model for am43xx_hs_evm as omap i2c supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* defconfig: am43xx_evm: enable i2c driver modelMugunthan V N2016-07-26-0/+1
| | | | | | | | Enable i2c driver model for am43xx_evm as omap i2c supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* defconfig: am335x_evm: enable i2c driver modelMugunthan V N2016-07-26-0/+1
| | | | | | | | Enable i2c driver model for am335x_evm as omap i2c supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* defconfig: am335x_boneblack_vboot: enable i2c driver modelMugunthan V N2016-07-26-0/+9
| | | | | | | | | Enable i2c driver model for am335x_boneblack_vboot as omap i2c supports driver model. Also enable CONFIG_DM_I2C_COMPAT for legacy drivers of i2c devices. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* drivers: i2c: omap24xx_i2c: adopt omap_i2c driver to driver modelMugunthan V N2016-07-26-0/+99
| | | | | | | Convert omap i2c driver to adopt i2c driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* drivers: i2c: omap24xx_i2c: prepare driver for DM conversionMugunthan V N2016-07-26-133/+175
| | | | | | | Prepare the driver for DM conversion. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ti_armv7_common: i2c: do not define DM_I2C for splMugunthan V N2016-07-26-0/+8
| | | | | | | | Since omap's spl doesn't support DM currently, do not define DM_I2C for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* drivers: i2c: uclass: parse dt parameters only when CONFIG_OF_CONTROL is enableMugunthan V N2016-07-26-0/+14
| | | | | | | | parse dt parameter of i2c devices only when CONFIG_OF_CONTROL is enabled. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* omap5/dra7: i2c: correct register offset for sync registerMugunthan V N2016-07-26-3/+3
| | | | | | | | | | | | The register offset of i2c_sysc offset is not correct as per omap5[1]/dra7[2] TRM, correct the offsets as per the documentation. [1] - http://www.ti.com/lit/pdf/swpu249 [2] - http://www.ti.com/lit/pdf/spruhz6 Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap4: i2c: correct register offset for sync registerMugunthan V N2016-07-26-3/+3
| | | | | | | | | | The register offset of i2c_sysc offset is not correct as per omap4 TRM [1], correct the offsets as per the documentation. [1] - http://www.ti.com/lit/ug/swpu235ab/swpu235ab.pdf Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* tools: env: Fix format warnings in debugMarcin Niestroj2016-07-26-7/+10
| | | | | | | | | | Format warnings (-Wformat) were shown in printf() calls after defining DEBUG macro. Update format string and explicitly cast variables to suppress all warnings. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
* Prepare v2016.09-rc1Tom Rini2016-07-25-2/+2
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* sandbox: Migrate CONFIG_I2C_EEPROMTom Rini2016-07-25-1/+1
| | | | | | | | | Most users of CONFIG_I2C_EEPROM were migrated to defconfig a while ago, but sandbox was skipped. Leave it off for sandbox_spl where it does not build, but does not need to be either. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-nand-flashTom Rini2016-07-25-13/+2057
|\
| * mtd: fix compiler warningsSteve Rae2016-07-24-2/+7
| | | | | | | | | | | | | | - add missing declaration - update debug output format specifiers Signed-off-by: Steve Rae <steve.rae@raedomain.com>
| * mtd: nand: fix bug writing 1 byte less than page sizeHector Palacios2016-07-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_do_write_ops() determines if it is writing a partial page with the formula: part_pagewr = (column || writelen < (mtd->writesize - 1)) When 'writelen' is exactly 1 byte less than the NAND page size the formula equates to zero, so the code doesn't process it as a partial write, although it should. As a consequence the function remains in the while(1) loop with 'writelen' becoming 0xffffffff and iterating until the watchdog timeout triggers. To reproduce the issue on a NAND with 2K page (0x800): => nand erase.part <partition> => nand write $loadaddr <partition> 7ff Signed-off-by: Hector Palacios <hector.palacios@digi.com>
| * sunxi: Enable NAND controller on the CHIPBoris Brezillon2016-07-24-0/+44
| | | | | | | | | | | | | | Enable the NAND controller in the sun5i-r8-chip.dts. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: nand: Increase CONFIG_SYS_NAND_MAX_ECCPOS valueBoris Brezillon2016-07-24-0/+1
| | | | | | | | | | | | | | On some sunxi boards we have NANDs exposing 1664 OOB bytes per page. Define the CONFIG_SYS_NAND_MAX_ECCPOS value accordingly. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: Increase the max OOB sizeBoris Brezillon2016-07-24-1/+1
| | | | | | | | | | | | | | Some NANDs are now exposing 1664 OOB bytes per page. Adjust the NAND_MAX_OOBSIZE value accordingly. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: Add a full-id entry for the H27QCG8T2E5R‐BCF NANDBoris Brezillon2016-07-24-0/+4
| | | | | | | | | | | | | | Add a full-id entry for the H27QCG8T2E5R‐BCF NAND. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * sun5i: Add NAND controller to the sun5i DTSIMaxime Ripard2016-07-24-0/+49
| | | | | | | | | | | | | | Add the NAND controller definition to sun5i.dtsi. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: Add the sunxi NAND controller driverBoris Brezillon2016-07-24-4/+1862
| | | | | | | | | | | | | | | | | | | | | | We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * mtd: nand: add common DT init codeBrian Norris2016-07-24-0/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are already-documented common bindings for NAND chips. Let's handle them in nand_base. If NAND controller drivers need to act on this data before bringing up the NAND chip (e.g., fill out ECC callback functions, change HW modes, etc.), then they can do so between calling nand_scan_ident() and nand_scan_tail(). The original commit has been slightly reworked to use the fdtdec_xxx() helpers (instead of the of_xxxx() ones). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Add missing macros to configure the NAND controller clkBoris Brezillon2016-07-24-0/+5
| | | | | | | | | | | | | | We need some macros to manipulate the NAND controller clock. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * cmd, nand: add an option to disable the verification when writing in raw modeBoris Brezillon2016-07-24-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modern NANDs do not guarantee that data written in raw mode will not contain bitflips just after writing them. This is fine since the number of bitflips should be rather low and thus fixable by the ECC engine, but since we are reading data in raw mode to verify if they match the input data we cannot prevent failures if some bits are flipped. The option of using standard mode to verify the data is not acceptable either, since one of the usage of raw mode is to allow flashing images that do not respect the standard NAND page layout or the default ECC config (this is the case on Allwinner platforms, where the ROM code tests several hardcoded configs, which are not necessarily matching the NAND characteristics). Add an extension to the nand write.raw command allowing one to disable the verification step. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | arm64: thunderx_88xx_defconfig: remove unneeded CONFIG_SYS_EXTRA_OPTIONSMasahiro Yamada2016-07-25-1/+0
| | | | | | | | | | | | | | | | ARM64 is correctly select'ed in arch/arm/Kconfig, so this line in the defconfig is unneeded. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | dtoc: Correct the type widening code in fdt_fallbackSimon Glass2016-07-25-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | This code does not match the fdt version in fdt.py. When dtoc is unable to use the Python libfdt library, it uses the fallback version, which does not widen arrays correctly. Fix this to avoid a warning 'excess elements in array initialize' in dt-platdata.c which happens on some platforms. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Rini <trini@konsulko.com>
* | hashtable: Fix compiler warning on 32-bit sandboxSimon Glass2016-07-25-5/+5
| | | | | | | | | | | | | | This fixes a mismatch between the %zu format and the type used on sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | part_efi: Fix compiler warning on 32-bit sandboxSimon Glass2016-07-25-5/+5
| | | | | | | | | | | | | | This fixes a mismatch between the %zu format and the type used on sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | lzmadec: Use the same type as the lzma callSimon Glass2016-07-25-2/+3
| | | | | | | | | | | | | | | | With sandbox on 32-bit the size_t type can be a little inconsistent. Use the same type as the caller expects to avoid a compiler warning. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | sandbox: Add instructions about building on 32-bit machinesSimon Glass2016-07-25-1/+7
| | | | | | | | | | | | | | | | Sandbox is built with 64-bit ints by default. This doesn't work properly on 32-bit machines. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | tools, rsa: Further minor cleanups on top of c236ebd and 2b9ec7mario.six@gdsys.cc2016-07-25-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [NOTE: I took v1 of these patches in, and then v2 came out, this commit is squashing the minor deltas from v1 -> v2 of updates to c236ebd and 2b9ec76 into this commit - trini] - Added an additional NULL check, as suggested by Simon Glass to fit_image_process_sig - Re-formatted the comment blocks Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> [For merging the chnages from v2 back onto v1] Signed-off-by: Tom Rini <trini@konsulko.com>
* | ARM: am33xx: Always inhibit init/refresh during DDR phy initRuss Dill2016-07-25-12/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A couple of commits have modified the am33xx/am437x ddr2/ddr3 initialization path to fix certain issues, but have had the side effect of causing L3 noc errors during initialization. The two commits are: 69b918 "am33xx,ddr3: fix ddr3 sdram configuration" fc46ba "arm: am437x: Enable hardware leveling for EMIF" The EMIF_REG_INITREF_DIS_MASK bit still needs to be set for all platforms. This delays initialization and refresh until a later stage. The 500us timer can be programmed for platforms that require it and for platforms that don't require it. It is currently hardcoded for 400MHz systems. For systems with a higher memory frequency this needs to be a larger value, and for systems with a lower memory frequency this can be a lower value. This can be considered a separate issue and corrected in a later commit. Signed-off-by: Russ Dill <Russ.Dill@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: am33xx: Fix DDR init delay placementRuss Dill2016-07-25-1/+4
| | | | | | | | | | | | | | | | | | The delay needs to be before the write to ref_ctrl register which initiates refreshes. An improper initialization sequence generates an L3 noc error. Signed-off-by: Russ Dill <Russ.Dill@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | efi_loader: Make exposed image loader path absoluteAlexander Graf2016-07-25-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | When loading an efi image, we pass it the location it was loaded from. On file system backends, there are no relative paths, so we should always pass in absolute ones. For network paths, we may be relative. This fixes distro booting with grub2 for me when it fetches the grub2 config file from the loader partition. Reported-by: york sun <york.sun@nxp.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* | common: fit: Allow U-Boot images to be bootedmario.six@gdsys.cc2016-07-25-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In certain circumstances it comes in handy to be able to boot into a second U-Boot. But as of now it is not possible to boot a U-Boot binary that is inside a FIT image, which is problematic for projects that e.g. need to guarantee a unbroken chain of trust from SOC all the way into the OS, since the FIT signing mechanism cannot be used. This patch adds the capability to load such FIT images. An example .its snippet (utilizing signature verification) might look like the following: images { firmware@1 { description = "2nd stage U-Boot image"; data = /incbin/("u-boot-dtb.img.gz"); type = "firmware"; arch = "arm"; os = "u-boot"; compression = "gzip"; load = <0x8FFFC0>; entry = <0x900000>; signature@1 { algo = "sha256,rsa4096"; key-name-hint = "key"; }; }; }; Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Tom Rini <trini@konsulko.com>
* | keystone: k2h/e/l: Fix DMA coherency for QM PDSPKaricheri, Muralidharan2016-07-25-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid left under a macro KS2_MSMC_SEGMENT_QM_PDSP which is no longer valid. This, in effect disabled DMA coherency for QM PDSP. Given that msmc_k2hkle_common_setup is valid for all K2H/K/L/E SoCs, the #ifdef should been removed in the first place. Do the same. Fixes: 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid #ifdeffery") Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | cmd: misc: Add support for fractions in sleepmario.six@gdsys.cc2016-07-25-1/+20
|/ | | | | | | | | | | | | | | | | | | | | A feasible way to communicate certain errors for devices that have no other way of signalling besides LEDs is to flash these LEDs. For errors in U-Boot, a script that utilizes the led and sleep commands would be a practicable way, but currently the sleep command can only delay for an integral amount of seconds, which is too slow to create an easily noticeable pattern for flashing LEDs. Therefore, this patch adds support for fractions (down to .001 seconds) to the sleep command. The parsing is kept minimal, simplistic and as robust as possible: After converting the passed string using simple_strtoul and multiplying it with 1000, we search for the first dot, convert the three characters after that into a number (if they are not numbers, we ignore the fractional part and just use the delay we got from simple_strtoul), and add this number to the delay. Signed-off-by: Mario Six <mario.six@gdsys.cc>
* ARM: uniphier: add clock/reset settings for xHCI of ProXstream2Masahiro Yamada2016-07-24-2/+13
| | | | | | | Deassert resets and enable clock signals of xHCI blocks if the corresponding CONFIG is enabled. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add PH1-LD21 board dataMasahiro Yamada2016-07-24-0/+19
| | | | | | | This has the same silicon die as PH1-LD20, but includes DRAM chips in its package. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: introduce flags to uniphier_board_data structureMasahiro Yamada2016-07-24-11/+20
| | | | | | | I need to add more board attributes, so the "flags" member will be handier than separate boolean ones. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: rename outer-cache register macrosMasahiro Yamada2016-07-24-216/+230
| | | | | | | Sync register macros with Linux code. This will be helpful to develop the counterpart of Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: clear notification flag before L2 operationMasahiro Yamada2016-07-24-6/+6
| | | | | | | Clear the flag immediately before cache operation to not depend on the previous state. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: use (devm_)ioremap() instead of map_sysmem()Masahiro Yamada2016-07-24-121/+61
| | | | | | | | This does not have much impact on behavior, but makes code look more more like Linux. The use of devm_ioremap() often helps to delete .remove callbacks entirely. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: fix doubled tftpboot commandsMasahiro Yamada2016-07-23-1/+0
| | | | | | This downloads the same file twice for nothing. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: select CONFIG_ARMV8_SPIN_TABLEMasahiro Yamada2016-07-23-0/+1
| | | | | | This is needed when booting Linux without ARM Trusted Firmware. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: renumber serial aliases for Gentil/Vodka boardsMasahiro Yamada2016-07-23-8/+8
| | | | | | | | | | | | On these two boards, the serial0 is used for inter-chip connection, so cannot be used for login console. The serial2 is used instead for them, but it is tedious to use because upper level deployment projects must switch login console per board. [ Linux commit: 2a4a2aadbaad9dffdb564a2895348f3d8e825416 ] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* test/py: vboot can be run only at SandboxMichal Simek2016-07-22-0/+1
| | | | | | | | | | | | | | | Getting this error: Zynq> sb load hostfs - 100 /home/monstr/data/disk/u-boot/build-zynq_zc706/test.fit Unknown command 'sb' - try 'help' because sb command is present only for Sandbox obj-$(CONFIG_SANDBOX) += host.o that's why mark this test to be run only at Sandbox Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Simon Glass <sjg@chromium.org>
* arm: omap5: fix build dependency for secure devicesAndreas Dannenberg2016-07-22-1/+1
| | | | | | | | | | | Commit 17c2987 introduces an undesired dependency on CONFIG_SPL_LOAD_FIT when building U-Boot for AM57xx and DRA7xx high-security (HS) devices that causes the build to break when that option is not active. Fix this issue by only building the u-boot_HS.img target when building U-Boot into an actual FIT image. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: am4x: fix build dependency for secure devicesAndreas Dannenberg2016-07-22-1/+1
| | | | | | | | | | | Commit e29878f introduces an undesired dependency on CONFIG_SPL_LOAD_FIT when building U-Boot for AM43xx high-security (HS) devices that causes the build to break when that option is not active. Fix this issue by only building the u-boot_HS.img target when building U-Boot into an actual FIT image. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.1 at 2024-09-18 20:19:06 +0000