summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* imx: mx6sxsabreauto: Add support for mx6sx SABREAUTO boardYe Li2016-02-02-0/+897
| | | | | | | Initial version for mx6sx SABREAUTO board support with features: PMIC, QSPI, NAND flash, SD/MMC, USB, Ethernet, I2C, IO Expander. Signed-off-by: Ye Li <ye.li@nxp.com>
* mx6: soc: Add ENET2 mac address supportYe Li2016-02-02-30/+30
| | | | | | | The i.MX6SX and i.MX6UL has two ENET controllers, add support for reading MAC address from fuse for ENET2. Signed-off-by: Ye Li <ye.li@nxp.com>
* tools: mxsboot: Use more portable cpu_to_le32()Bin Meng2016-02-02-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently when building mxsboot on certain machines it reports: HOSTCC tools/mxsboot tools/mxsboot.c: In function 'mx28_create_sd_image': tools/mxsboot.c:560: warning: implicit declaration of function 'htole32' /tmp/cchLIV6q.o: In function 'main': mxsboot.c:(.text+0x6d8): undefined reference to 'htole32' mxsboot.c:(.text+0x6e7): undefined reference to 'htole32' mxsboot.c:(.text+0x6f6): undefined reference to 'htole32' mxsboot.c:(.text+0x705): undefined reference to 'htole32' mxsboot.c:(.text+0x711): undefined reference to 'htole32' /tmp/cchLIV6q.o:mxsboot.c:(.text+0x71d): more undefined references to 'htole32' follow collect2: ld returned 1 exit status make[1]: *** [tools/mxsboot] Error 1 make: *** [tools] Error 2 The solution is to use cpu_to_le32() instead which is more portable, just like other U-Boot tools [1] do. [1] http://lists.denx.de/pipermail/u-boot/2014-October/192919.html Suggested-by: Marek Vasut <marex@denx.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
* wandboard: fix variable name so PXE boot worksPeter Robinson2016-02-02-1/+1
| | | | | | | | | All boards that support PXE booting use the pxefile_addr_r variable. Standardise wandboard with this variable as pxe_addr_r isn't used anywhere else so it's a typo. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
* arm: imx6: Enable DDR calibration on NovenaMarek Vasut2016-02-02-9/+14
| | | | | | | | Enable the DDR calibration functionality on Novena to deal with the memory SoDIMM on this board. Moreover, tweak the initial DDR DRAM parameters so the calibration works properly. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: imx6: Add DDR3 calibration code for MX6 Q/D/DLMarek Vasut2016-02-02-0/+564
| | | | | | | | | Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code fine-tunes the behavior of the MMDC controller in order to improve the signal integrity and memory stability. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* Prepare v2016.03-rc1Tom Rini2016-02-02-2/+2
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-02-02-82/+465
|\
| * board: atmel: sama5d2_xplained: add SPL supportWenyou Yang2016-02-02-0/+178
| | | | | | | | | | | | | | | | The sama5d2 Xplained SPL supports the boot medias: spi flash and SD Card. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: at91/spl: mpddrc: use IP version to check configurationWenyou Yang2016-02-02-7/+11
| | | | | | | | | | | | | | | | To remove the unnecessary #ifdef-endif, use the mpddrc IP version to check whether or not the interleaved decoding type is supported. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: at91/spl: mpddrc: add mpddrc DDR3-SDRAM initializationWenyou Yang2016-02-02-8/+167
| | | | | | | | | | | | | | | | | | | | | | | | The DDR3-SDRAM initialization sequence is implemented in accordance with the DDR3-SRAM/DDR3L-SDRAM initialization section described in the SAMA5D2 datasheet. Add registers and definitions of mpddrc controller, which is used to support DDR3 devices. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: at91/spl: mpddrc: add struct atmel_mpddrc_configWenyou Yang2016-02-02-20/+30
| | | | | | | | | | | | | | | | | | | | Add struct atmel_mpddrc_config to accommodate the mpddrc register configurations, not using the mpddrc register map structure, struct atmel_mpddrc, in order to increase readability and reduce run-time memory use. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * atmel_nand: Add 32 bit ecc support for sama5d2 chipJosh Wu2016-02-02-1/+9
| | | | | | | | | | | | | | | | | | | | Also if minimum ecc requirment is bigger then what we support, then just use our maxium pmecc support. But it is not safe, so we'll output a warning about this. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * atmel_nand_ecc: update pmecc registers according to sama5d2 chipJosh Wu2016-02-02-4/+32
| | | | | | | | | | | | | | | | | | | | 1. add the pmecc register mapping for sama5d2. 2. add the pmecc error location register mapping for sama5d2. 3. add some new field that is different from old ip. 4. add sama5d2 pmecc ip version number. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * atmel_nand: use the definition: PMECC_OOB_RESERVED_BYTES instead magic numberJosh Wu2016-01-27-1/+1
| | | | | | | | | | | | | | | | | | As atmel_nand_ecc.h is sync with v4.1 kernel, which adds the PMECC_OOB_RESERVED_BYTES. So use it in the driver. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
| * atmel_nand: add '\n' in the end of error message for better displayJosh Wu2016-01-27-2/+2
| | | | | | | | | | | | | | | | Also align the open parenthesis. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * atmel_nand: use nand ecc_{strength, step}_ds instead of our own functionJosh Wu2016-01-27-37/+7
| | | | | | | | | | | | | | | | | | | | Since ecc_{strength,step}_ds is introduced in nand_chip structure for minimum ecc requirements. So we can use them directly and remove our own get_onfi_ecc_param function. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
| * net: macb: Not all the GEM are gigabit capableGregory CLEMENT2016-01-27-2/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During the initialization of PHY the gigabit bit capable is set if the controller is a GEM. However, for sama5d2 and sama5d4, the GEM is configured to support only 10/100. Improperly setting the GBE capability leads to an unresponsive MAC controller. This patch fixes this behavior allowing using the gmac with these SoCs. Suggested-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> [fixed minor checkpatch warning] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * mmc: atmel: Properly fix clock configurationGregory CLEMENT2016-01-27-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Timing issue occurs on eMMC not only when modifying the frequency but also for all the switch command(CMD6). According to the MMC spec waiting 8 clocks after a switch command would be the thing to do. This patch allows fixing CPU hang observed when trying to changing the bus width on a eMMC on SAMA5D4. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Marek Vasut <marex@denx.de> # on DENX MA5D4EV Acked-by: Marek Vasut <marex@denx.de> Tested-by: Andreas Bießmann <andreas.devel@googlemail.com> # on atngw100 Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> [fixed minor checkpatch warning] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-02-02-5/+76
|\ \
| * | arm8: ls2080: Move the core errata defines out of board specific fileAshish kumar2016-02-01-3/+2
| | | | | | | | | | | | | | | | | | | | | Valid for core A57 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls2080a: Implement workaround for core errata 829520, 833471Ashish kumar2016-02-01-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 829520: Code bounded by indirect conditional branch might corrupt instruction stream. Workaround: Set CPUACTLR_EL1[4] = 1'b1 to disable the Indirect Predictor. 833471: VMSR FPSCR functional failure or deadlock. Workaround: Set CPUACTLR[38] to 1, which forces FPSCR write flush. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8/ls1043aqds: fix DSPI/QSPI node in dts fileQianyu Gong2016-02-01-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the lost dts info when merging patches. Fix DSPI node for 'commit e0579a5852b3 ("armv8/ls1043aqds: add DSPI support")' and QSPI node for 'commit 166ef1e90ce4 ("armv8/ls1043aqds: add QSPI support in SD boot")'. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: net: fsl-mc: Update print to reflect correct stringPrabhakar Kushwaha2016-02-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Update printf with dpbp_exit to match with previous function call. Signed-off-by: Itai Katz <itai.katz@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: net: fsl-mc: Memset dprc_cfg before configuringPrabhakar Kushwaha2016-02-01-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All fields of struct dprc_cfg are not being configured while creating child container. "Not" configured fields are assumed to be 0. So memset dprc_cfg before configuring the fields. Signed-off-by: Itai Katz <itai.katz@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv7: ls102xa: Increase the supported kernel sizeAlison Wang2016-02-01-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Increase the kernel size supported for LS1021A platform. Define CONFIG_SYS_BOOTM_LEN to 64M. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | board: ls2085aqds: Update kernel_size env variablePrabhakar Kushwaha2016-02-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | kernel_size env variable is defined as 0x28000000, it is beyond NOR flash range. Update kernel_size with 40MB kernel size. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | Makefile: Drop unnecessary -dtb suffixesSimon Glass2016-02-01-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | When OF_CONTROL is enabled, u-boot-dtb.* files are the same as u-boot.* files. So we can use the latter for simplicity. Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Makefile: Make u-boot.img the same as u-boot-dtb.imgSimon Glass2016-02-01-10/+3
| | | | | | | | | | | | | | | | | | | | | | | | Create u-boot.img even when OF_CONTROL is enabled, so that this file can be used in both cases. Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | socfpga: Simplify Makefile filenamesSimon Glass2016-02-01-9/+9
| | | | | | | | | | | | | | | | | | | | | We don't need the -dtb suffix anymore, so drop it. Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | tegra: Always build a boot image with the same filenameSimon Glass2016-02-01-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust the Makefile to build u-boot-tegra.bin which contains a device tree if OF_SEPARATE is enabled, and does not if not. This mirrors U-Boot's new approach of using u-boot.bin to handle both cases. Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | fdt: Build an SPL binary without device treeSimon Glass2016-02-01-9/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present u-boot-spl.bin holds the plain SPL binary without the device tree. This is somewhat annoying since you need either u-boot-spl.bin or u-boot-spl-dtb.bin depending on whether device tree is used. Adjust the build such that u-boot-spl.bin includes a device tree (if enabled), and the plain binary is in u-boot-spl-nodtb.bin. For now u-boot-spl-dtb.bin remains the same. Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | fdt: Build a U-Boot binary without device treeSimon Glass2016-02-01-12/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present u-boot.bin holds the plain U-Boot binary without the device tree. This is somewhat annoying since you need either u-boot.bin or u-boot-dtb.bin depending on whether device tree is used. Adjust the build such that u-boot.bin includes a device tree (if enabled), and the plain binary is in u-boot-nodtb.bin. For now u-boot-dtb.bin remains the same. This should be acceptable since: - without OF_CONTROL, u-boot.bin still does not include a device tree - with OF_CONTROL, u-boot-dtb.bin does not change The main impact is build systems which are set up to use u-boot.bin as the output file and then add a device tree. These will have to change to use u-boot-nodtb.bin instead. Adjust tegra rules so it continues to produce the correct files. Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | tegra: Clarify generation of -nodtb file with OF_CONTROLSimon Glass2016-02-01-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the ALL-y logic in the Makefile so that is clear that we always want the -nodtb file. Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | | mailmap: fix Ricardo's entryMasahiro Yamada2016-02-01-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit df48b23428e9 (".mailmap: Add all the mail alias for Ricardo Ribalda") assigned two different proper names for the email address "ricardo.ribalda@uam.es". This is a completely wrong usage as the mailmap feature exists for coalescing together commits by the same person whose name is sometimes spelled differently. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | mmc: add missing prototype for mmc_get_env_devClemens Gruber2016-02-01-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a follow-up patch to e92029c0f4 and adds a prototype for the weak mmc_get_env_dev function. Cc: Tom Rini <trini@konsulko.com> Cc: Stephen Warren <swarren@nvidia.com> Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* | | malloc: work around some memalign fragmentation issuesStephen Warren2016-02-01-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use of memalign can trigger fragmentation issues such as: // Internally, this needs to find a free block quite bit larger than s. // Once the free region is found, any unaligned "padding" immediately // before and after the block is marked free, so that the allocation // takes only s bytes (plus malloc header overhead). p = memalign(a, s); // If there's little fragmentation so far, this allocation is likely // located immediately after p. p2 = malloc(x); free(p); // In theory, this should return the same value for p. However, the hole // left by the free() call is only s in size (plus malloc header overhead) // whereas memalign searches for a larger block in order to guarantee it // can adjust the returned pointer to the alignment requirements. Hence, // the pointer returned, if any, won't be p. If there's little or no space // left after p2, this allocation will fail. p = memalign(a, s); In practice, this issue occurs when running the "dfu" command repeatedly on NVIDIA Tegra boards, since DFU allocates a large 32M data buffer, and then initializes the USB controller. If this is the first time USB has been used in the U-Boot session, this causes a probe of the USB driver, which causes various allocations, including a strdup() of a GPIO name when requesting the VBUS GPIO. When DFU is torn down, the USB driver is left probed, and hence its memory is left allocated. If "dfu" is executed again, allocation of the 32M data buffer fails as described above. In practice, there is a memory hole exactly large enough to hold the 32M data buffer than DFU needs. However, memalign() can't know that in a general way. Given that, it's particularly annoying that the allocation fails! The issue is that memalign() tries to allocate something larger to guarantee the ability to align the returned pointer. This patch modifies memalign() so that if the "general case" over-sized allocation fails, another allocation is attempted, of the exact size the user desired. If that allocation just happens to be aligned in the way the user wants, (and in the case described above, it will be, since the free memory region is located where a previous identical allocation was located), the pointer can be returned. This patch is somewhat related to 806bd245b1ab "dfu: don't keep freeing/reallocating". That patch worked around the issue by removing repeated free/memalign within a single execution of "dfu". However, the same technique can't be applied across multiple invocations, since there's no reason to keep the DFU buffer allocated while DFU isn't running. This patch addresses the root-cause a bit more directly. This problem highlights some of the disadvantages of dynamic allocation and deferred probing of devices. This patch isn't checkpatch-clean, since it conforms to the existing coding style in dlmalloc.c, which is different to the rest of U-Boot. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
* | | .travis.yml: rework according to new travis-ci infraRoger Meier2016-02-01-129/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - install using addons.apt - remove MAKEALL - split mpc85xx boards - remove TEST_CONFIG_CMD, just info - fetch mips toolchain via buildman - remove --list-error-boards param - conditional script - use TOOLCHAIN instead of INSTALL_TOOLCHAIN - add aarch64 - enable notifications via email Signed-off-by: Roger Meier <r.meier@siemens.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Andreas Färber <afaerber@suse.de> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Heiko Schocher <hs@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-02-01-96/+3705
|\ \ \
| * | | board: Enable ethernet, tftpboot support to pic32mzdask board.Purna Chandra Mandal2016-02-01-4/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds ethernet, TFTP support for PIC32MZ[DA] Starter Kit. Also custom environment variables/scripts are added to help boot from network. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
| * | | drivers: net: Add ethernet driver for Microchip PIC32.Purna Chandra Mandal2016-02-01-0/+899
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver implements MAC and MII layer of the ethernet controller. Network data transfer is handled by controller internal DMA engine. Ethernet controller is configurable through device-tree file. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
| * | | drivers: net: phy: add SMSC LAN8740 Phy support.Purna Chandra Mandal2016-02-01-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SMSC LAN8740 Phy support required for PIC32MZDA devices. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | board: add SDHCI support for PIC32MZDASK board.Purna Chandra Mandal2016-02-01-3/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable MMC, SDHCI, FAT_FS support for PIC32MZ[DA] StarterKit. Also add custom scripts, rules to boot Linux from microSD card. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
| * | | drivers: mmc: add driver for Microchip PIC32 SDHCI controller.Andrei Pistirica2016-02-01-1/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver implements platform specific glue and fixups for PIC32 internal SDHCI controller. Signed-off-by: Andrei Pistirica <andrei.pistirica@microchip.com> Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | board: Add Microchip PIC32MZ[DA]-Starter-Kit board.Purna Chandra Mandal2016-02-01-1/+254
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for Microchip PIC32MZ[DA] StarterKit board based on a PIC32MZ[DA] family of microcontroller. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | MIPS: Add support for Microchip PIC32MZ[DA] SoC family.Purna Chandra Mandal2016-02-01-2/+379
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Microchip PIC32MZ[DA] SoC family support. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.Purna Chandra Mandal2016-02-01-0/+530
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy module. DDR2 controller operates in half-rate mode (upto 533MHZ frequency). Signed-off-by: Paul Thacker <paul.thacker@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | drivers: serial: add driver for Microchip PIC32 UART controller.Paul Thacker2016-02-01-0/+219
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds PIC32 UART controller support based on driver model. Signed-off-by: Paul Thacker <paul.thacker@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | drivers: gpio: add driver for Microchip PIC32 GPIO controller.Purna Chandra Mandal2016-02-01-1/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In PIC32 GPIO controller is part of PIC32 pin controller. PIC32 has ten independently programmable ports and each with multiple pins. Each of these pins can be configured and used as GPIO, provided they are not in use for other peripherals. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | drivers: pinctrl: Add pinctrl driver for Microchip PIC32.Purna Chandra Mandal2016-02-01-0/+374
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In PIC32 pin-controller is a combined gpio-controller, pin-mux and pin-config module. Remappable peripherals are assigned pins through per-pin based muxing logic. And pin configuration are performed on specific port registers which are shared along with gpio controller. Note, non-remappable peripherals have default pins assigned thus require no muxing. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-07-15 16:09:48 +0000