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* drivers: net: cpsw: Add reading of DT phy-handle nodeDan Murphy2016-05-24-2/+22
| | | | | | | | | | | | | Add the ability to read the phy-handle node of the cpsw slave. Upon reading this handle the phy-id can be stored based on the reg node in the DT. The phy-handle also needs to be stored and passed to the phy to access any phy data that is available. Signed-off-by: Dan Murphy <dmurphy@ti.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* defconfig: dra74_evm: enable eth driver modelMugunthan V N2016-05-24-0/+1
| | | | | | | | | Enable eth driver model for dra74_evm as cpsw supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* defconfig: am437x_sk_evm: enable eth driver modelMugunthan V N2016-05-24-0/+1
| | | | | | | | | Enable eth driver model for am437x_sk_evm as cpsw supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* defconfig: am437x_gp_evm: enable eth driver modelMugunthan V N2016-05-24-0/+1
| | | | | | | | | Enable eth driver model for am437x_gp_evm as cpsw supports driver model. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* arm: dts: dra7: fix ethernet name with proper device addressMugunthan V N2016-05-24-1/+1
| | | | | | | | Fix typo error for cpsw device name with proper device address Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* arm: dts: dra7: add syscon node to cpsw to read mac addressMugunthan V N2016-05-24-0/+1
| | | | | | | | | Add syscon node to cpsw device node to read mac address from efuse. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* arm: dts: am4372: add syscon node to cpsw to read mac addressMugunthan V N2016-05-24-0/+1
| | | | | | | | | Add syscon node to cpsw device node to read mac address from efuse. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* drivers: net: cpsw: add support for reading mac address from efuseMugunthan V N2016-05-24-17/+131
| | | | | | | | | | | | | Different TI platforms has to read with different combination to get the mac address from efuse. So add support to read mac address based on machine/device compatibles. The code is taken from Linux drivers/net/ethernet/ti/cpsw-common.c done by Tony Lindgren. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* drivers: net: cpsw: fix get mdio base and gmii_sel reg from DTMugunthan V N2016-05-24-4/+20
| | | | | | | | | | | | Since dra7x platforms address bus is define as 64 bits to support LAPE, fdtdec_get_addr() returns a invalid address for mdio based and gmii_sel register address. Fixing this by using fdtdec_get_addr_size_auto_noparent() which will derive address cell and size cell from its parent. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* ARM: omap5: add platform specific ethernet phy modes configurationsMugunthan V N2016-05-24-0/+12
| | | | | | | | | Add platforms specific phy mode configuration bits to be used to configure phy mode in control module. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* drivers: net: cpsw: fix cpsw dp parse when num slaves as 1Mugunthan V N2016-05-24-4/+2
| | | | | | | | | | | On some boards number of slaves can be 1 when only one port ethernet is pinned out. So do not break when slave_index and num slaves check fails, instead continue to parse the next child. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* ti_omap5_common: eth: do not define DM_ETH for splMugunthan V N2016-05-24-0/+1
| | | | | | | | | | Since omap's spl doesn't support DM currently, do not define DM_ETH for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* drivers: core: device: add support to check dt compatible for a device/machineMugunthan V N2016-05-24-0/+37
| | | | | | | | | | | Provide an api to check whether the given device or machine is compatible with the given compat string which helps in making decisions in drivers based on device or machine compatible. Idea taken from Linux. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* net: phy: Add PHY driver for mv88e61xx switchesKevin Smith2016-05-24-0/+1021
| | | | | | | | | | | | | | | The previous mv88e61xx driver was a driver for configuring the switch, but did not integrate with the PHY/networking system, so it could not be used as a PHY by U-boot. This is a complete rework to support this device as a PHY. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: Remove unused mv88e61xx switch driverKevin Smith2016-05-24-656/+0
| | | | | | | | | | | | No boards are using this driver. Remove in preparation for a new driver with integrated PHY support. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-05-23-67/+6448
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| * malta: Support MIPS32r6 configurationsPaul Burton2016-05-21-0/+1
| | | | | | | | | | | | | | | | Both real Malta boards & QEMU's Malta emulation can feature MIPS32r6 CPUs. Allow building U-Boot for such systems by selecting CONFIG_SUPPORTS_CPU_MIPS32_R6 for Malta. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: Remove ".set mips32" directivePaul Burton2016-05-21-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | We always build for a mips32 or higher ISA, so this ".set mips32" directive is redundant. Once MIPSr6 support is added it will become harmful since some instruction encodings change & this directive will cause the older encodings to be incorrectly emitted instead of the appropriate ones for the build. In preparation for supporting MIPSr6, remove this redundant directive. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * MIPS: Support for targetting MIPSr6Paul Burton2016-05-21-6/+30
| | | | | | | | | | | | | | | | | | | | | | Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way that we currently select release 1 or release 2 targets. MIPSr6 is not entirely backwards compatible with earlier releases of the architecture. Some instructions are encoded differently, some are removed, some are reused, so it is not practical to run U-Boot built for earlier revisions on a MIPSr6 system. Update their Kconfig help text to reflect that. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * MIPS: Simplify CONFIG_SYS_CPU valuesPaul Burton2016-05-21-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Rather than having the values for CONFIG_SYS_CPU depend upon each architecture revision, have them depend upon the more general CONFIG_CPU_MIPS32 & CONFIG_CPU_MIPS64 which in turn depend upon the architecture revisions. This is done in preparation for adding MIPSr6 support, which would otherwise need to introduce new cases here. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * MIPS: Use unchecked immediate addition/subtractionPaul Burton2016-05-21-11/+13
| | | | | | | | | | | | | | | | | | | | | | | | In MIPS assembly there have historically been 2 variants of immediate addition - the standard "addi" which traps if an overflow occurs, and the unchecked "addiu" which does not trap on overflow. In release 6 of the MIPS architecture the trapping variants of immediate addition & subtraction have been removed. In preparation for supporting MIPSr6, stop using the trapping instructions from assembly & switch to their unchecked variants. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * mips: ath79: Add support for TPLink WDR4300Marek Vasut2016-05-21-0/+295
| | | | | | | | | | | | | | | | | | | | Add support for the TPLink WDR4300 router, which is based on the AR9344 MIPS 74Kc CPU and has 128 MiB of RAM. The USB is supported on this system as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| * mips: ath79: Add AR934x supportMarek Vasut2016-05-21-1/+683
| | | | | | | | | | | | | | | | | | | | Add support for the Atheros AR934x WiSoCs. This patchs adds complete system init, including PLL and DRAM init, both of which happen from full C environment, since the AR934x has proper SRAM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| * mips: ath79: Add support for ungating ethernet on ar933x and ar934xMarek Vasut2016-05-21-0/+80
| | | | | | | | | | | | | | | | Add code to ungate the ethernet controller on ar933x and ar934x . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| * mips: ath79: dts: Add ethernet MAC nodes for ar933xMarek Vasut2016-05-21-0/+26
| | | | | | | | | | | | | | | | | | Add node for both ethernet controllers in the ar933x. The PHY is attached only to the first ethernet controller. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| * mips: ath79: Add support for ungating USB on ar933x and ar934xMarek Vasut2016-05-21-0/+61
| | | | | | | | | | | | | | | | Add code to ungate the USB controller on ar933x and ar934x . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| * mips: ath79: dts: Add generic-ehci nodeMarek Vasut2016-05-21-0/+7
| | | | | | | | | | | | | | | | Add generic EHCI node for the ChipIdea EHCI controller in the ath79. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| * mips: ath79: Fix compiler warning on const assignmentMarek Vasut2016-05-21-1/+1
| | | | | | | | | | | | | | | | | | The assignment const T var; var = value; is illegal, since var is constant. Drop the const to fix the compiler warning. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| * mips: ath79: Fix ar71xx_regs.h indentMarek Vasut2016-05-21-1034/+1069
| | | | | | | | | | | | | | | | | | The indent in this file triggers my OCD, so fix it. Replace multiple spaces with tabs and align the values in one column. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| * mips: Add MIPS 74Kc tuneMarek Vasut2016-05-21-0/+4
| | | | | | | | | | | | | | | | | | | | Add MIPS 74Kc tune Kconfig option. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com> [added missing tune-y entry in arch/mips/Makefile] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * mips: Fix compiler warning in cpu.cMarek Vasut2016-05-21-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There really is zero reason for including netdev.h in generic mips CPU code. Removing the netdev.h from cpu.c also fixes the following compiler warning: In file included from arch/mips/cpu/cpu.c:10:0: include/netdev.h:204:41: warning: 'struct eth_device' declared inside parameter list [enabled by default] int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); ^ include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] Signed-off-by: Marek Vasut <marex@denx.de> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * ath79: add readonly attribute for ath79_soc_descWills Wang2016-05-21-4/+4
| | | | | | | | | | | | use 'const' keywork to qualify readonly attribute for lookup-table member Signed-off-by: Wills Wang <wills.wang@live.com>
| * ath79: ar933x: use BIT macro for bit shift operationWills Wang2016-05-21-7/+7
| | | | | | | | | | | | used a uniform BIT macro for register bit-field shift Signed-off-by: Wills Wang <wills.wang@live.com>
| * ar933x: serial: Remove the explicit pinctrl settingWills Wang2016-05-21-14/+2
| | | | | | | | | | | | | | The correct pinctrl is handled automatically so we don't need to do it in the driver. Signed-off-by: Wills Wang <wills.wang@live.com>
| * ath79: spi: Remove the explicit pinctrl settingWills Wang2016-05-21-12/+0
| | | | | | | | | | | | | | The correct pinctrl is handled automatically so we don't need to do it in the driver. Signed-off-by: Wills Wang <wills.wang@live.com>
| * mips: Report reloc information in bdinfoTim Chick2016-05-21-0/+2
| | | | | | | | Signed-off-by: Tim Chick <tim.chick@mediatek.com>
| * drivers: mtd: add Microchip PIC32 internal non-CFI flash driver.Purna Chandra Mandal2016-05-21-0/+452
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PIC32 internal flash devices are parallel NOR flash divided into number of banks to allow erase-programming in one while fetch and execution continues on other. As the flash banks are memory mapped stored code can be executed directly from flash (XIP), also there is additional hardware logic to prefetch and cache contents to improve execution performance. These flash can also be used to store user data (like environment). Flash erase and programming are handled by on-chip NVM controller. Driver implemented driver model but MTD is not really support. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * flash: add device ID for Microchip PIC32 internal flash.Purna Chandra Mandal2016-05-21-1/+4
| | | | | | | | | | | | | | | | | | Microchip PIC32 has internal parallel flash (non-CFI compliant). These flash devices do not support any identifier command so no standard IDs. Added unique IDs to seperate these flash devices from others supported by U-Boot. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
| * mips: ath79: add AP143 reference boardWills Wang2016-05-21-0/+359
| | | | | | | | | | | | | | | | This patch add board-level code and base DT for AP143. Signed-off-by: Wills Wang <wills.wang@live.com> [updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * mips: ath79: add AP121 reference boardWills Wang2016-05-21-0/+343
| | | | | | | | | | | | | | | | This patch add board-level code and base DT for AP121. Signed-off-by: Wills Wang <wills.wang@live.com> [updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * drivers: spi: add spi support for QCA/Atheros ath79 SOCsWills Wang2016-05-21-0/+269
| | | | | | | | | | | | | | | | This patch add a compatible spi driver for ath79 series SOC. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * drivers: serial: add serial driver for ar933x SOCWills Wang2016-05-21-0/+298
| | | | | | | | | | | | | | | | | | This patch add support for ar933x serial. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros qca953x.Wills Wang2016-05-21-0/+166
| | | | | | | | | | | | | | | | | | This is a simple pinctrl driver, it just support uart and spi pin-mux now. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Simon Glass <sjg@chromium.org> [fixed typo in commit subject line] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros ar933x.Wills Wang2016-05-21-0/+151
| | | | | | | | | | | | | | | | | | This is a simple pinctrl driver, it just support uart and spi pin-mux now. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Simon Glass <sjg@chromium.org> [fixed typo in commit subject line] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * mips: ath79: add support for QCA953x SOCsWills Wang2016-05-21-1/+787
| | | | | | | | | | | | This patch enable work for qca953x SOC. Signed-off-by: Wills Wang <wills.wang@live.com>
| * mips: ath79: add support for AR933x SOCsWills Wang2016-05-21-0/+720
| | | | | | | | | | | | This patch enable work for ar933x SOC. Signed-off-by: Wills Wang <wills.wang@live.com>
| * mips: add base support for QCA/Atheros ath79 SOCsWills Wang2016-05-21-0/+1610
| | | | | | | | | | | | | | This patch add some common code for QCA/Atheros ath79 SOCs such as DDR tuning, chip reset and CPU detection. Signed-off-by: Wills Wang <wills.wang@live.com>
| * Add support for 64-bit MIPS to examples/standaloneStanislav Galabov2016-05-21-0/+18
| | | | | | | | Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
| * Fix FreeBSD loader API so that it works on both 32-bit and 64-bit targets.Stanislav Galabov2016-05-21-44/+49
| | | | | | | | | | | | Specifically tested on MIPS under QEMU (works with all combination of bit-ness and endian-ness) Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
| * Use CONFIG_IDE_SWAP_IO when running on big-endian MIPS (32 or 64-bit) in ↵Stanislav Galabov2016-05-21-0/+8
| | | | | | | | | | | | QEMU so that IDE transfers work properly Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
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