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* OCOTP: Update OCOTP driver to support i.MX6SLLPeng Fan2016-12-16-8/+8
| | | | | | | | | | Add the i.MX6SLL support to OCOTP driver. The i.MX6SLL reuses the i.MX6ULL fuse, bank 7 and bank8 have 4 words each, and there is a hole between bank 5 and bank 6. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* mx6_common: correct loadaddr and text base for i.MX6SLLPeng Fan2016-12-16-1/+2
| | | | | | | Correct loadaddr and text base for i.MX6SLL Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6sll: add Kconfig entry for i.MX6SLLPeng Fan2016-12-16-0/+4
| | | | | | add Kconfig entry for i.MX6SLL Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx-common: cache: configure L2 Cache for i.MX6SLLPeng Fan2016-12-16-8/+9
| | | | | | | | If L2 cache configured as OCRAM, reset it. Switch to use runtime check. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6sll: add clock supportPeng Fan2016-12-16-7/+21
| | | | | | | Add clock support for i.MX6SLL. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: clock: gate clk before changing pix clk muxPeng Fan2016-12-16-23/+33
| | | | | | | | | | | The LCDIF Pixel clock mux is not glitchless, so need to gate before changing mux. Also change enable_lcdif_clock prototype with a new input parameter to indicate disable or enable. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6sl: add lcdif clock supportPeng Fan2016-12-16-19/+80
| | | | | | Add lcdif clock support for i.MX6SL. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* imx: mx6: lcdif: gate clock before changing muxPeng Fan2016-12-16-0/+10
| | | | | | | | The mux for the lcd clock is not glitchless, so need to first gate the clock before changing the mux. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6: fix mmdc ch0 clk for 6SLPeng Fan2016-12-16-0/+5
| | | | | | | | | | >From RM, per_periph2_clk_sel option3 is: "derive clock from 198MHz clock (divided 392MHz PLL2 PFD)." So fix it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6sll: add iomux settingsPeng Fan2016-12-16-5/+11
| | | | | | | | Add iomux settings for i.MX6 SLL Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye.Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx-common: timer: add i.MX6SLL supportPeng Fan2016-12-16-3/+7
| | | | | | | Add i.MX6 SLL GPT timer support. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6sll: update register addressPeng Fan2016-12-16-27/+50
| | | | | | | Update register address for i.MX6 SLL Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6sll: add pinmux header filesPeng Fan2016-12-16-0/+1021
| | | | | | | Add i.MX6SLL pinmux header files Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: add i.MX 6SLL CPU typePeng Fan2016-12-16-1/+5
| | | | | | | | Add i.MX6SLL cpu type. MXC_CPU_MX6D is not a real value in chip, so change it to 0x6A. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* configs: colibri_vf: Add fdt_fixup environment variableSanchayan Maity2016-12-16-3/+4
| | | | | | | | u-boot allows modifying a device tree after it is loaded into memory. Add fdt_fixup hook in u-boot environment which can facilitate such modifications. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
* board/liteboard: Add support for liteBoardMarcin Niestroj2016-12-16-0/+547
| | | | | | | | | | | | liteBoard is a development board which uses liteSOM as its base. Hardware specification: * liteSOM (i.MX6UL, DRAM, eMMC) * Ethernet PHY (id 0) * USB host (usb_otg1) * MicroSD slot (uSDHC1) Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
* ARM: imx6ul: Add support for liteSOMMarcin Niestroj2016-12-16-0/+231
| | | | | | | | | | | | | | | | liteSOM is a System On Module (http://grinn-global.com/litesom/). It can't exists on its own, but will be used as part of other boards. Hardware specification: * NXP i.MX6UL processor * 256M or 512M DDR3 memory * optional eMMC (uSDHC2) Here we treat SOM similar to SOC, so we place it inside arch/arm/mach-* directory and make it possible to reuse initialization code (i.e. DDR, eMMC init) for all boards that use it. Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
* udoo_neo: Add Ethernet supportBreno Lima2016-12-16-2/+112
| | | | | | | | UDOO Neo boards has one FEC port connected to KSZ8091, add support for it. Tested on a UDOO Neo Full with "dhcp zImage" command. Signed-off-by: Breno Lima <breno.lima@nxp.com>
* udoo_neo: Add PFUZE300 PMIC supportBreno Lima2016-12-16-0/+156
| | | | | | | | UDOO Neo boards has a PFUZE300 connected to I2C1 bus. Tested on a UDOO Neo Full with "pmic PFUZE3000 dump" command. Signed-off-by: Breno Lima <breno.lima@nxp.com>
* power: pmic: Add Voltage configuration macroBreno Lima2016-12-16-0/+5
| | | | | | | Add pfuze3000 voltage configuration macro for SW1AB, SW3 and VLDO1/2 according to tables 53, 57 and 62 on PF3000 datasheet. Signed-off-by: Breno Lima <breno.lima@nxp.com>
* udoo_neo: Add thermal supportBreno Lima2016-12-16-0/+4
| | | | | | | Add thermal support on the Kconfig file. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* udoo_neo: Remove console optionBreno Lima2016-12-16-1/+0
| | | | | | | It's not necessary to define the console option as we use the distro config. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* udoo_neo: Remove mmcautodetect optionBreno Lima2016-12-16-1/+0
| | | | | | | It's not necessary to define the mmcautodetect as it is not used anywhere. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* udoo_neo: Staticize board_string()Breno Lima2016-12-16-1/+1
| | | | | | | Change board_string() function to static because it's being used locally. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* udoo_neo: Move MX6SX configuration to KconfigBreno Lima2016-12-16-1/+2
| | | | | | | | | It's not necessary to define the processor in the defconfig file. The preferred method to select the SoC is via Kconfig file. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* udoo_neo: Remove USDHC3 supportBreno Lima2016-12-16-89/+6
| | | | | | | | It's not necessary to support USDHC3 in U-Boot as it's being used for the WLAN. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* arm: imx: initial support for colibri imx6Max Krummenacher2016-12-16-0/+2449
| | | | | | | | This adds board support for the Toradex module family Colibri iMX6. The familiy consists of a module with i.MX6 DualLite, i.MX6 Solo, both with a version for commercial and industrial temperature range. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
* arm: imx: initial support for apalis imx6Max Krummenacher2016-12-16-0/+2691
| | | | | | | | This adds board support for the Toradex module family Apalis iMX6. The familiy consists of a module with i.MX6 Dual, i.MX6 Quad with commercial and industrial temperature range. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
* ARM: dts: vf: Fix warning about missing reg propertyStefan Agner2016-12-16-0/+2
| | | | | | | | | Add proper reg values for the two AIPS bus nodes. This avoids this two warnings: Node /soc/aips-bus@40000000 has a unit name, but no reg property Node /soc/aips-bus@40080000 has a unit name, but no reg property Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
* colibri_vf: use same NAND clock as Linux usesStefan Agner2016-12-16-1/+1
| | | | | | | | | | | | | | | | Currently a divider of 6 has been used, leading to following NAND Flash Controller (NFC) clocks: VF61: 27.7 MHz (166.7MHz bus clock) VF50: 22 MHz (132MHz bus clock) The NAND Flash Memory used on VF50 allows to use clock speed of up to 33MHz, while the Flash Memory of VF61 allows 50MHz. We can use the same divider of 4 on both modules to configure the maximal possible clock speeds: VF61: 41.7 MHz VF50: 33 MHz Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
* colibri_vf: cleanup USB clock initializationStefan Agner2016-12-16-4/+10
| | | | | | | | | Use the same preprocessor define to enable clocks as we use to enable the driver. Make sure that the necessary PLL's are on (they get enabled by boot ROM by default, so this is more for completness). Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
* colibri_vf: use device-tree for MTD partitionsStefan Agner2016-12-16-0/+13
| | | | | | | | Use device-tree fixup to communicate the MTD partitions to the kernel. U-Boot's mtdparts environment variable will be used as partition source for the device-tree based partition table too. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
* toradex: allow custom fdt board setup in board fileStefan Agner2016-12-16-5/+53
| | | | | | | | | | The config block support currently uses the ft_board_setup function to patch the device tree with config block information. However, this does not allow to patch the device tree with board specific information. Rename the common setup function to ft_common_board_setup and use the call it from the board files directly. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
* toradex: fix USB Download gadget fixup callbackStefan Agner2016-12-16-2/+2
| | | | | | | Use the proper config option to guard the USB Download Function fixup callback. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
* Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2016-12-16-3765/+9059
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| * MAINTAINERS: DFU: Change e-mail address for DFU maintainerLukasz Majewski2016-12-12-1/+1
| | | | | | | | | | | | | | Despite I leave Samsung by the end of the year, I'm going to maintain DFU in u-boot. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
| * MAINTAINERS: ONENAND: MTD: Mark Samsung's OneNAND as orphanedLukasz Majewski2016-12-12-2/+2
| | | | | | | | | | | | | | | | | | Since I leave Samsung by the end of the year, I will not have access to OneNAND devices anymore. Hence the custodian position has been marked as "Orphaned". Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
| * Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-12-12-64/+1800
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| | * arm64: mvebu: Enable hush parser in A8K default configurationKonstantin Porotchkin2016-12-12-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable hush parser in Armada-7040 and Armada-8040 DB default configurations. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| | * arm64: mvebu: Enable PCIe support in Armada-7040 configurationKonstantin Porotchkin2016-12-12-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable PCIe bus support in Armada-7040 DB default configuration Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| | * arm64: mvebu: Add L3 cache flush functionality to A8K familyKonstantin Porotchkin2016-12-12-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing L3 cache flush functionality which absence prevents Linux kernel from normal boot in case the L3 cache is enabled by ATF. The L3 cache is named the "last level" cache in order to keep the terminology similar to the ATF code. This cache should not be disabled by u-boot since the Linux kernel cannot activate it, so it is activates at ATF stage. However the cache flush is required for preventing data corruption after disabling the MMU and the data cache before passing control to the loaded Linux image. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| | * arm64: mvebu: Enable pin control support in A8K default configKonstantin Porotchkin2016-12-12-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable mvebu pin control support in the default configuration files for Armada-7040 and Armada-8040 development boards Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| | * arm64: mvebu: Enable BUBT command support in A8K default configKonstantin Porotchkin2016-12-12-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable mvebu "bubt" command support in the default configuration file for Armada-7040 and Armada-8040 development boards Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| | * arm64: mvebu: Add pin control nodes to A8K family DTS filesKonstantin Porotchkin2016-12-12-22/+183
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pin control nodes to APN806, CP-master, CP-slave and Armada-7040 and Armada-8040 boards DTS files Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| | * arm64: mvebu: pinctrl: Add pin control driver for A8K familyKonstantin Porotchkin2016-12-12-0/+651
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a DM port of Marvell pin control driver. The A8K SoC family contains several silicone dies interconnected in a single package. Every die is normally equipped with its own pin controller unit. There are 2 pin controllers in A70x0 SoC and 3 in A80x0 SoC. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| | * arm64: mvebu: Add bubt command for flash image burnKonstantin Porotchkin2016-12-12-0/+896
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for mvebu bubt command for flash image load, check and burn on boot device. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| | * arm64: mvebu: Modify the A8K SPI and I2C config in DTSKonstantin Porotchkin2016-12-12-67/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Align the Armada-8040-db and Armada-7040-db SPI and I2C DTS settings with latest DB settings: - 8040-db: disable i2c0 and spi0 on AP (MPPs are reserved for SDIO) - 8040-db: disable cps_i2c0 on CP1 - 8040-db: enable spi1 on CP1 (the new location of the boot flash) The spi1 on CP1 is aliased as spi0 since this is the way the driver enumerates it. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-12-12-1857/+2697
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| | * | ARM: uniphier: remove BLK selectMasahiro Yamada2016-12-11-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a user configurable option, but "select BLK" forces users to enable it. Even with this commit, BLK is still enabled by "default y if DM_MMC" for UniPhier SoCs; the difference is users can disable it if they do not need it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| | * | ARM: dts: uniphier: sync Device Tree with LinuxMasahiro Yamada2016-12-11-1851/+2684
| | | | | | | | | | | | | | | | | | | | | | | | Sync with the latest kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
generated by cgit v1.1 at 2024-08-21 02:26:08 +0000