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* cmd: bootvx: Add asmlinkage to the VxWorks x86 entryBin Meng2015-10-21-0/+6
| | | | | | | | VxWorks on x86 uses stack to pass parameters. Reported-by: Jian Luo <jian.luo4@boschrexroth.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* cmd: bootvx: Pass E820 information to an x86 VxWorks kernelBin Meng2015-10-21-0/+59
| | | | | | | | | | E820 is critical to the kernel as it provides system memory map information. Pass it to an x86 VxWorks kernel. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Jian Luo <jian.luo4@boschrexroth.de>
* cmd: bootvx: Always get VxWorks bootline from envBin Meng2015-10-21-85/+68
| | | | | | | | | | | | | | | | | | | So far VxWorks bootline can be contructed from various environment variables, but when these variables do not exist we get these from corresponding config macros. This is not helpful as it requires rebuilding U-Boot, and to make sure these config macros take effect we should not have these environment variables. This is a little bit complex and confusing. Now we change the logic to always contruct the bootline from environments (the only single source), by adding two new variables "bootdev" and "othbootargs", and adding some comments about network related settings mentioning they are optional. The doc about the bootline handling is also updated. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
* cmd: bootvx: Pass netmask and gatewayip to VxWorks bootlineBin Meng2015-10-21-2/+15
| | | | | | | | | There are fields in VxWorks bootline for netmask and gatewayip. We can get these from U-Boot environment variables and pass them to VxWorks, just like ipaddr and serverip. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* cmd: bootvx: Avoid strlen() calls when constructing VxWorks bootlineBin Meng2015-10-21-10/+10
| | | | | | | | Remember the position in the VxWorks bootline buffer to avoid the call to strlen() each time. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* cmd: elf: Reorder load_elf_image_phdr() and load_elf_image_shdr()Bin Meng2015-10-21-82/+79
| | | | | | | | Move load_elf_image_phdr() and load_elf_image_shdr() to the beginning of the cmd_elf.c so that forward declaration is not needed. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* cmd: Clean up cmd_elf a little bitBin Meng2015-10-21-98/+73
| | | | | | | | | This commit cleans up cmd_elf.c per U-Boot coding convention, and removes the unnecessary DECLARE_GLOBAL_DATA_PTR and out-of-date powerpc comments (it actually supports not only powerpc targets). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* cmd: Convert CONFIG_CMD_ELF to KconfigBin Meng2015-10-21-118/+33
| | | | | | Convert CONFIG_CMD_ELF to Kconfig and tidy up affected boards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Remove quotation mark in CONFIG_HOSTNAMEBin Meng2015-10-21-1/+1
| | | | | | | | CONFIG_HOSTNAME is an environment varible, so that quotation mark is not needed. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Move install_e820_map() out of zimage.cBin Meng2015-10-21-29/+41
| | | | | | | | install_e820_map() has nothing to do with zimage related codes. Move it to a dedicated place. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Initialize GDT entry 1 to be the 32-bit CS as wellBin Meng2015-10-21-1/+6
| | | | | | | | Some OS (like VxWorks) requires GDT entry 1 to be the 32-bit CS. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Jian Luo <jian.luo4@boschrexroth.de>
* x86: Allow disabling IGD on Intel QueensbayBin Meng2015-10-21-0/+33
| | | | | | | | | | Add a Kconfig option to disable the Integrated Graphics Device (IGD) so that it does not show in the PCI configuration space as a VGA disaplay controller. This gives a chance for U-Boot to run PCI/PCIe based graphics card's VGA BIOS and use that for the graphics console. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: ivybridge: Remove the dead codes that programs pci bridgeBin Meng2015-10-21-32/+0
| | | | | | | Remove bd82x6x_pci_bus_enable_resources() that is not called anywhere. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: pci: Enable VGA address forwarding on bridgesBin Meng2015-10-21-0/+18
| | | | | | | | | To support graphics card behind a PCI bridge, the bridge control register (offset 0x3e) in the configuration space must turn on VGA address forwarding. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: pci: Fix pci_last_busno() to return the real last bus noBin Meng2015-10-21-24/+1
| | | | | | | | | Currently pci_last_busno() only checks the last bridge device under the first UCLASS_PCI device. This is not the case when there are multiple bridge devices. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* video: vesa_fb: Fix wrong return value check of pci_find_class()Bin Meng2015-10-21-1/+1
| | | | | | | | | When pci_find_class() fails to find a device, it returns -ENODEV. But now we check the return value against -1. Fix it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
* pci: Set PCI_COMMAND_IO bit for VGA deviceBin Meng2015-10-21-0/+6
| | | | | | | | PCI_COMMAND_IO bit must be set for VGA device as it needs to respond to legacy VGA IO address. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: pci: Adjust pci_find_and_bind_driver() to return -EPERMSimon Glass2015-10-21-12/+19
| | | | | | | | | | | | | | The current code returns 0 even if it failed to find or bind a driver. The caller then has to check the returned device to see if it is NULL. It is better to return an error code in this case so that it is clear what happened. Adjust the code to return -EPERM, indicating that the device was not bound because it is not needed for pre-relocation use. Add comments so that the return value is clear. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Correct a few debug() statementsSimon Glass2015-10-21-2/+2
| | | | | | | | One debug() statement is missing a newline. The other has a repeated word. Fix these. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Tidy up auto-config error handlingSimon Glass2015-10-21-3/+12
| | | | | | | | | | | When the auto-configuration process fails for a device (generally due to lack of memory) we should return the error correctly so that we don't continue to try memory allocations which will fail. Adjust the code to check for errors and abort if something goes wrong. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* malloc_simple: Add debug() informationSimon Glass2015-10-21-0/+4
| | | | | | | | | It's useful to get a a trace of memory allocations in early init. Add a debug() call to provide that. It can be enabled by adding '#define DEBUG' to the top of the file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Prepare v2015.10Tom Rini2015-10-19-1/+1
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* powerpc: Drop old non-generic-board codeSimon Glass2015-10-19-986/+0
| | | | | | This code is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* sbc8641d: enable and test CONFIG_SYS_GENERIC_BOARDPaul Gortmaker2015-10-19-0/+2
| | | | Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* sbc8641d: increase monitor size from 256k to 384kPaul Gortmaker2015-10-19-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Between v2015.07-rc1 and v2015.07-rc2 this board started silent boot failure. A bisect led to commit 6eed3786c68c8a49d ("net: Move the CMD_NET config to defconfigs"). This commit looks harmless in itself, but it did implicitly add a feature to the image which led to this: u-boot$git describe 6eed3786c68c8a49d v2015.07-rc1-412-g6eed3786c68c ^^^ u-boot$ls -l ../41*/u-boot.bin -rwxrwxr-x 1 paul paul 261476 Oct 16 16:47 ../411/u-boot.bin -rwxrwxr-x 1 paul paul 266392 Oct 16 16:43 ../412/u-boot.bin u-boot$bc bc 1.06.95 Copyright 1991-1994, 1997, 1998, 2000, 2004, 2006 Free Software Foundation, Inc. This is free software with ABSOLUTELY NO WARRANTY. For details type `warranty'. 256*1024 262144 i.e. we finally broke through the 256k monitor size. Jump it up to 384k and fix the hard coded value used in the env offset at the same time. We were probably flirting with the 256k size issue without knowing it when testing on different baselines in earlier commits, but since this is all board specific, a rebase or reorder to put this commit 1st is of little value. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* sbc8641d: add basic flash setup instructions to README filePaul Gortmaker2015-10-19-0/+21
| | | | | | | ...so that I don't have to go work them out from scratch again by peering at the manual. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* sbc8641d: set proper environment sector size.Paul Gortmaker2015-10-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | When debugging an env fail due to too small a malloc pool, it was noted that the env write was 256k. But the device sector size is 1/2 that, as can be seen from "fli" output: Bank # 1: CFI conformant flash (16 x 16) Size: 16 MB in 131 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x1888 Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 2 ms, buffer size: 64 bytes Sector Start Addresses: FF000000 E RO FF020000 E RO FF040000 E RO FF060000 E RO FF080000 E RO FF0A0000 E RO FF0C0000 E RO FF0E0000 E RO FF100000 E RO FF120000 E RO [...] FFF00000 RO FFF20000 RO FFF40000 RO FFF60000 RO FFF80000 RO FFFA0000 RO FFFC0000 RO FFFE0000 E RO FFFE8000 RO FFFF0000 E RO FFFF8000 RO => The desired env sector is FFF40000->FFF60000, or 0x20000 in length, just after the 256k u-boot image which starts @ FFF00000. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* sbc8641d: increase malloc pool size to a sane defaultPaul Gortmaker2015-10-19-1/+1
| | | | | | | | | | | | Currently the board fails to save its env, since the env size is much smaller than the sector size, and the malloc fails for the pad buffer, giving the user visible symptom of: Unable to save the rest of sector (253952) Allow for 1M malloc pool, the same as used on the sbc8548 board. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* sbc8641d: enable command line editingPaul Gortmaker2015-10-19-0/+1
| | | | | | It is just too painful to use interactively without it. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* image-fit: Fix signature checkingAndrej Rosano2015-10-19-1/+3
| | | | | | | On signature verification failures fit_image_verify() should exit with error. Signed-off-by: Andrej Rosano <andrej@inversepath.com>
* igep00x0: Use BCH8 ECCLadislav Michl2015-10-19-5/+13
| | | | | | | | Used NAND chips requires at least 4-bit error correction, so use BCH8 as it is what kernel uses. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Acked-by: Javier Martinez Canillas <javier@osg.samsung.com>
* vexpress64: Juno: Add initialisation code for Juno R1 PCIe host bridge.Liviu Dudau2015-10-19-1/+206
| | | | | | | | | | | | | Juno R1 has an XpressRICH3 PCIe host bridge that needs to be initialised in order for the Linux kernel to be able to enumerate the bus. Add support code here that enables the host bridge, trains the links and sets up the Address Translation Tables. Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> [trini: Always declare vexpress64_pcie_init and continue handling logic inside the function] Signed-off-by: Tom Rini <trini@konsulko.com>
* vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.Liviu Dudau2015-10-19-1/+11
| | | | | | | | | | Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel. Declare a secondary memory bank and set the sizes correctly. Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
* dfu: dfu_sf: Take the start address into accountFabio Estevam2015-10-19-2/+10
| | | | | | | | | | | | | | | | | | | | The dfu_alt_info_spl variable allows passing a starting point for the binary to be flashed in the SPI NOR. For example, if we have 'dfu_alt_info_spl=spl raw 0x400', this means that we want to flash the binary starting at address 0x400. In order to do so we need to erase the entire sector and write to the the subsequent SPI NOR sectors taking such start address into account for the address calculations. Tested by succesfully writing SPL binary into 0x400 offset and the u-boot.img at offset 64 kiB of a SPL NOR. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Use lldiv for the math] Signed-off-by: Tom Rini <trini@konsulko.com>
* dfu: dfu_sf: Use the erase sector size for erase operationsFabio Estevam2015-10-19-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI NOR flashes need to erase the entire sector size and we cannot pass any arbitrary length for the erase operation. To illustrate the problem: Copying data from PC to DFU device Download [=========================] 100% 478208 bytes Download done. state(7) = dfuMANIFEST, status(0) = No error condition is present state(10) = dfuERROR, status(14) = Something went wrong, but the device does not know what it was Done! In this case, the binary has 478208 bytes and the M25P32 SPI NOR has an erase sector of 64kB. 478208 = 7 entire sectors of 64kiB + 19456 bytes. Erasing the first seven 64 kB sectors works fine, but when trying to erase the remainding 19456 causes problem and the board hangs. Fix the issue by always erasing with the erase sector size. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
* doc/README.scrapyard: Add more entriesTom Rini2015-10-19-0/+71
| | | | | | | - Add deletions from August 30 2015. - A few from Sept 12, one from Oct 2nd. Signed-off-by: Tom Rini <trini@konsulko.com>
* Revert "arm: Remove inetspace_v2_cmc board"Tom Rini2015-10-19-0/+8
| | | | | | | | | Upon further review when populating README.scrapyard, inetspace_v2_cmc is a variant on netspace_v2 and not just an orphan config. This reverts commit 653600a715db49859c06ba5dfb858c15c4108d54. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2015-10-19-2/+8
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| * ARM: rpi: add another revision of Raspberry Pi A+Lubomir Rintel2015-10-19-0/+6
| | | | | | | | | | | | | | | | Seen this one in the wild. Is labelled "Raspberry Pi Model A+ V1.1, (C) Raspberry Pi 2014". A standard A+ board, much like the one with version 0x12, didn't notice any differencies. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
| * ARM: dockstar: move start of environment areaEric Cooper2015-10-19-2/+2
| | | | | | | | | | | | | | | | | | The default dockstar configuration for U-Boot currently causes it to overrun the environment area, so that a "saveenv" command bricks the device. This patch moves the environment to a higher address to avoid that. Signed-off-by: Eric Cooper <ecc@cmu.edu>
* | Revert "arm: Remove d2net_v2 defconfig file"Tom Rini2015-10-19-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Upon further review when populating README.scrapyard, d2net_v2 is a variant on net2big_v2 and not just an orphan config. To help in the future also add this to board/LaCie/net2big_v2/MAINTAINERS which needed a little consolidation anyhow. This reverts commit 1363740e7948a8e4bee8d5adcdf0f63f7782879d. Cc: Simon Guinot <simon.guinot@sequanux.org> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* | doc/README.scrapyard: Populate recent removalsTom Rini2015-10-19-9/+9
| | | | | | | | | | | | Add in the commit IDs / dates for boards removed on Sept 2nd. Signed-off-by: Tom Rini <trini@konsulko.com>
* | ARM: k2e/l: Apply WA for selecting PA clock sourceLokesh Vutla2015-10-17-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On keystone2 Lamarr and Edison platforms, the PA clocksource mux in PLL REG1, can be changed only after enabling its clock domain. So selecting the output of PASS PLL as input to PA only after enabling the clockdomain. This is as per the debug done by "Vitaly Andrianov <vitalya@ti.com>" and based on the previous work done by "Hao Zhang <hzhang@ti.com>" Fixes: d634a0775bcf ("ARM: keystone2: Cleanup PLL init code") Reported-by: Vitaly Andrianov <vitalya@ti.com> Tested-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | arch/powerpc/config.mk: Pass -fno-ira-hoist-pressure when possibleTom Rini2015-10-17-1/+2
|/ | | | | | | | | There are various toolchain issues that cause us to produce invalid binaries with certain gcc 4.8.x and 4.9.x versions when we don't pass this flag in. Tested-by: Joakim Tjernlund <joakim.tjernlund@transmode.se> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-10-16-0/+17
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| * arm: dts: socfpga: add "u-boot,dm-pre-reloc" to socfpga_cyclone5_socdk dtsDinh Nguyen2015-10-17-0/+3
| | | | | | | | | | | | | | We need "u-boot,dm-pre-reloc" in the socfpga_cyclone5_socdk.dts file in order for the SPL to use SD/MMC. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: enable data/inst prefetch and shared override in the L2Dinh Nguyen2015-10-17-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the L2 AUX CTRL settings for the SoCFPGA. Enabling D and I prefetch bits helps improve SDRAM performance on the platform. Also, we need to enable bit 22 of the L2. By not having bit 22 set in the PL310 Auxiliary Control register (shared attribute override enable) has the side effect of transforming Normal Shared Non-cacheable reads into Cacheable no-allocate reads. Coherent DMA buffers in Linux always have a Cacheable alias via the kernel linear mapping and the processor can speculatively load cache lines into the PL310 controller. With bit 22 cleared, Non-cacheable reads would unexpectedly hit such cache lines leading to buffer corruption. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* | vf610twr: Fix typo in DRAM initAnthony Felice2015-10-16-1/+1
| | | | | | | | | | | | | | | | | | This commit fixes a typo in vf610twr DRAM init that was causing a hang in U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc (vf610: refactor DDRMC code). Signed-off-by: Anthony Felice <tony.felice@timesys.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini2015-10-16-24/+42
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| * | exynos: more debug and cleanup in do_sdhci_init()Tobias Jakobi2015-10-13-9/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add more debug printfs in do_sdhci_init() for calls that can potentially fail. Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
generated by cgit v1.1 at 2024-09-19 07:42:36 +0000