summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* usb: dwc3: Add chained TRB support for ep0Kishon Vijay Abraham I2015-04-14-19/+55
| | | | | | | | | dwc3 can do only max packet aligned transfers. So in case request length is not max packet aligned and is bigger than DWC3_EP0_BOUNCE_SIZE two chained TRBs is required to handle the transfer. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: ep0: preparation for implementing chained TRBKishon Vijay Abraham I2015-04-14-8/+12
| | | | | | | | No functional change. Modified few things so that there are no code duplication while implementing chained TRB. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* dwc3: flush the buffers before using itKishon Vijay Abraham I2015-04-14-3/+27
| | | | | | | | In the linux kernel, non cacheable buffers are used. However in uboot since there are no APIs to allocate non cacheable memory, all the buffers should be flushed before using it. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* usb: dwc3: TI PHY: PHY driver for dwc3 in TI platformsKishon Vijay Abraham I2015-04-14-0/+331
| | | | | | | | | | | | | | | Added a single driver for both USB2 PHY programming and USB3 PHY programming. USB3 PHY is taken from drivers/phy/phy-ti-pipe3.c in linux kernel. commit 56042e : phy: ti-pipe3: Fix suspend/resume and module reload. USB2 PHY is taken from drivers/phy/phy-omap-usb2.c in linux kernel. commit eb82a3 : phy: omap-usb2: Balance pm_runtime_enable() on probe failure and remove. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: dwc3-omap: add interrupt status API to check for interruptsKishon Vijay Abraham I2015-04-14-0/+21
| | | | | | | | Added an API to check for interrupt status. This API is generally called from board file to check for interrupt status. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* dwc3: dwc3-omap: add support for multiple dwc3-omap controllersKishon Vijay Abraham I2015-04-14-7/+22
| | | | | | | | Added support for multiple dwc3 omap controllers. This gives uboot the capability to control multiple dwc3 omap controllers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: dwc3-omap: change probe and remove to uboot init and uboot exit codeKishon Vijay Abraham I2015-04-14-89/+42
| | | | | | | | | | | Removed probe and remove that are specific to linux and replaced it with uboot init and uboot exit. These functions will be invoked from boardfile. This will change once we have dwc3-omap driver adapted to use the uboot driver model. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* include: dwc3-omap-uboot: add a structure for populating dwc3-omap platform dataKishon Vijay Abraham I2015-04-14-7/+27
| | | | | | | | | | Added a structure to populate dwc3 omap platform data. The board file should populate these platform data before invoking dwc3 omap driver. This will be removed once dwc3-omap driver is adapted to use the driver model. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: dwc3-omap: make dwc3-omap build in ubootKishon Vijay Abraham I2015-04-14-136/+27
| | | | | | | | | | | *) Changed the included header files to that used in u-boot. *) Removed extcon_* APIs *) Removed regulator_* APIs *) Fixed other misc warnings *) Added dwc3-omap.h to include the definitions of UTMI modes. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* dwc3: core: added an API to invoke irq handlersKishon Vijay Abraham I2015-04-14-0/+22
| | | | | | | | | Since interrupt support is not present in u-boot, added an API to handle the interrupts in dwc3 core. This API can be polled to handle the interrupts. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* dwc3: core: add support for multiple dwc3 controllersKishon Vijay Abraham I2015-04-14-9/+30
| | | | | | | | Added support for multiple dwc3 controllers. This gives uboot the capability to control multiple dwc3 controllers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* dwc3: core: change probe and remove to uboot init and uboot exit codeKishon Vijay Abraham I2015-04-14-166/+52
| | | | | | | | Removed probe and remove that are specific to linux and replaced it with uboot init and uboot exit. These functions will be invoked from boardfile. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* include: dwc3-uboot: add a structure for populating platform dataKishon Vijay Abraham I2015-04-14-0/+40
| | | | | | | | | Added a structure to populate dwc3 core platform data. The board file should populate these platform data before invoking dwc3 driver. This will be removed once we have dwc3 driver adapted to use the driver model. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: core: make dwc3 core build in ubootKishon Vijay Abraham I2015-04-14-196/+40
| | | | | | | | | | | *) Changed the include header files to that used in u-boot. *) Removed phy_* APIs *) Removed jiffies and used a simple while loop *) Used dma_alloc_coherent and dma_free_coherent APIs of u-boot *) Fixed other misc warnings Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* include: usb: composite: add USB_GADGET_DELAYED_STATUS to avoid compilation ↵Kishon Vijay Abraham I2015-04-14-0/+9
| | | | | | | | | | | | | | | | | | | | | error Added USB_GADGET_DELAYED_STATUS to avoid the following compilation error. error: ‘USB_GADGET_DELAYED_STATUS’ undeclared (first use in this function) while compiling dwc3/ep0.c While this is been added only to avoid compilation error, the complete fix should be something like the one added in linux kernel. The complete fix will be ported once we have the composite driver in u-boot look similar to the one in linux kernel. commit 1b9ba000177ee47bcc5b44c7c34e48e735f5f9b1 Author: Roger Quadros <roger.quadros@nokia.com> Date: Mon May 9 13:08:06 2011 +0300 usb: gadget: composite: Allow function drivers to pause control transfers Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: ep0: make dwc3 ep0 build in ubootKishon Vijay Abraham I2015-04-14-12/+27
| | | | | | | | | *) Changed the included header files to that used in u-boot. *) added dwc3_ep_event_string() used in ep0.c *) Fixed other misc warnings Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* include: asm: types: add resource_size_t typeKishon Vijay Abraham I2015-04-14-0/+1
| | | | | | | | | Added resource_size_t type in order to get rid of the following compilation error whiel building dwc3 gadget. include/linux/ioport.h:19:2: error: unknown type name ‘resource_size_t’ Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: gadget: make dwc3 gadget build in ubootKishon Vijay Abraham I2015-04-14-163/+125
| | | | | | | | | | | | | Did a bunch of things to get dwc3/gadget.c compile in u-boot without build errors and warnings *) Changed the included header files to that used in u-boot. *) Used dma_alloc_coherent and dma_free_coherent APIs of u-boot *) removed sg support *) remove jiffies and used a simple while loop *) removed irq support and added a function to call these interrupt handler. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: linux-compat: Add header for dwc3 linux compatibiltiyKishon Vijay Abraham I2015-04-14-0/+30
| | | | | | | | | Added a header file to include various linux specific APIs like pr_debug, WARN_ WARN_ON_ONCE etc.. in order to avoid compilation error while building dwc3 driver. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* arm: asm: dma-mapping: added dma_free_coherent APIKishon Vijay Abraham I2015-04-14-0/+7
| | | | | | | | | Added dma_free_coherent corresponding to the dma_alloc_coherent in dma-mapping.h in order to free memory allocated using dma_alloc_coherent. This API is used in dwc3 driver. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: remove pm related operations from dwc3 driverKishon Vijay Abraham I2015-04-14-223/+5
| | | | | | | | Removed all pm related operations including pm_runtime APIs, suspend/resume hooks as support for these are not present in u-boot. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: fix dwc3 header filesKishon Vijay Abraham I2015-04-14-14/+23
| | | | | | | | | Changed the header files included in core.h and io.h to the u-boot header files so that these files can be included in other dwc3 source files and be compiled in uboot. Also added otg.h which has the defines for dr_mode. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: remove trace_* APIs from dwc3 driverKishon Vijay Abraham I2015-04-14-80/+29
| | | | | | | | Removed most of the trace_* APIs from dwc3 driver since tracepoints are not supported in u-boot. Replaced some of the trace_* API with dev_dbg/dev/vdbg. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Review-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: Modify the file headers to u-boot formatKishon Vijay Abraham I2015-04-14-58/+45
| | | | | | | | | Modified the file header to the format that is used in u-boot. Also included in the header, the commit in linux kernel from which each of these files are added. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: remove un-used files from dwc3 folderKishon Vijay Abraham I2015-04-14-2741/+0
| | | | | | | | removed un-used/un-supported files from dwc3. These files can be added later as and when the support is added. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc3: add dwc3 folder from linux kernel to u-bootKishon Vijay Abraham I2015-04-14-0/+9679
| | | | | | | | | Added dwc3 folder from linux kernel 3.19-rc1 (97bf6af1f9) to u-boot. This will be adapted to work with u-boot in the following patches. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* include: asm: dma-mapping: get rid of the compilation warning in udc-coreKishon Vijay Abraham I2015-04-14-1/+1
| | | | | | | | | Fixed the following warning here. "warning: ‘dma_alloc_coherent’ defined but not used" while compiling udc-core Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: gadget: udc: make udc-core compile in u-boot buildKishon Vijay Abraham I2015-04-14-309/+26
| | | | | | | | | | Make udc-core compile in u-boot by removing all linux specific stuff and having only the bare minimal udc-core required for usb gadget drivers. Also modified the file header to a format that is generally being used in u-boot. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* include: usb: modify gadget.h to include udc supportKishon Vijay Abraham I2015-04-14-0/+43
| | | | | | | | Made changes in gadget.h that is required after adding udc-core.c except changes that might break other platforms. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: gadget: udc: add udc-core from linux kernel to u-bootKishon Vijay Abraham I2015-04-14-0/+641
| | | | | | | | | | | | | | Added udc-core.c from linux kernel 3.19-rc1 (97bf6af1f9) to u-boot. This will be adapted to work with u-boot in the following patches. Adding support for udc will help to seamlessly port dwc3 driver from linux kernel to u-boot (since dwc3 uses udc-core) and it'll also help to add support for multiple gadget controllers to be functional at the same time. All other gadget drivers can also be adapted to use udc-core. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* ARM: AM43xx: Enable clocks for USB OTGSS and USB PHYKishon Vijay Abraham I2015-04-14-5/+30
| | | | | | | Enabled clocks for dwc3 controller and USB PHY present in AM43xx. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* ARM: DRA7: Enable clocks for USB OTGSS and USB PHYKishon Vijay Abraham I2015-04-14-7/+21
| | | | | | | Enabled clocks for dwc3 controller and USB PHY present in DRA7. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* usb: dwc2: retry NAK'd interrupt transfersStephen Warren2015-04-14-6/+19
| | | | | | | | | | | | | | | | | IIUC, interrupt transfers are NAK'd by devices until they wish to trigger an interrupt, and e.g. EHCI controllers retry these in HW until they are ACK'd. However, DWC2 doesn't seem to retry, so we need to do this in SW. In practice, I've seen DWC2_HCINT_FRMOVRUN happen too. I'm not quite sure what this error implies; perhaps it's related to how near the end of a USB frame we're at when the interrupt transfer is initiated? Anyway, retrying this temporary error seems to be necessary too. With all these commits applied, both my USB keyboards (one LS Lenovo and one FS Dell) work correctly when there is no USB hub between the SoC and the keyboard; We still need split transactions to be implemented for hubs to work. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: dwc2: implement interrupt transfersStephen Warren2015-04-14-3/+2
| | | | | | | | | | | | | | | | | | | | | | As best I can tell, there's no difference between bulk and interrupt transfers in terms of how the HW should be programmed, at least given that we're executing one transaction at a time rather than scheduling them into frames for maximum throughput. This patch ends up sharing the toggle bit state between bulk and interrupt transfers on a particular EP. However I believe this is fine; AFAIK a given EP either uses bulk or interrupt transfers and doesn't mix them. This patch doesn't do anything with the "interval" parameter for interrupt transfers, but then most other USB controller drivers in U-Boot don't either. It turns out that one of my keyboards is happy to work using control transfers but the other only gives non-zero "HID reports" via interrupt transfers. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: dwc2: correctly program hcchar for LS devicesStephen Warren2015-04-14-9/+12
| | | | | | | | A bit must be set in HCCHAR when communicating with low-speed devices. I have no idea why there's no corresponding bit to distinguish between full-speed and high-speed devices, but no matter; they all work now! Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: bcm2835: use phys_to_bus() for mboxStephen Warren2015-04-14-2/+3
| | | | | | | | When we communicate with the VideoCore to perform property mailbox transactions, that is a DMA operation as far as the property buffer is concerned. Use phys_to_bus() on that buffer. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: dwc2: detect device speed correctlyStephen Warren2015-04-14-1/+8
| | | | | | | This doesn't make my LS keyboard work any better, but it does at least report the correct speed in "usb tree". Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: dwc2: use phys_to_bus/bus_to_physStephen Warren2015-04-14-1/+3
| | | | | | | Use of these APIs is required on the Raspberry Pi. With this change, USB on RPi1 should be more reliable, and USB on the RPi2 will start working. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: bcm2835: implement phys_to_bus/bus_to_physStephen Warren2015-04-14-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BCM283[56] contain both a L1 and L2 cache between the GPU (a/k/a VideoCore CPU?) and DRAM. DMA-capable peripherals can also optionally access DRAM via this same L2 cache (although they always bypass the L1 cache). Peripherals select whether to use or bypass the cache via the top two bits of the bus address. An IOMMU exists between the ARM CPU and the rest of the system. This controls whether the ARM CPU's accesses use or bypass the L1 and/or L2 cache. This IOMMU is configured/controlled exclusively by the VideoCore CPU. In order for DRAM accesses made by the ARM core to be coherent with accesses made by other DMA peripherals, we must program a bus address into those peripherals that causes the peripheral's accesses to use the same set of caches that the ARM core's accesses will use. On the RPi1, the VideoCore firmware sets up the IOMMU to enable use of the L2 cache. This corresponds to addresses based at 0x40000000. On the RPi2, the VideoCore firmware sets up the IOMMU to disable use of the L2 cache. This corresponds to addresses based at 0xc0000000. This patch implements U-Boot's phys_to_bus/bus_to_phys APIs according to those rules. For full details of this setup, please see Dom Cobley's description at: http://lists.denx.de/pipermail/u-boot/2015-March/208201.html http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/215038 https://www.mail-archive.com/u-boot@lists.denx.de/msg166568.html Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* Create API to map between CPU physical and bus addressesStephen Warren2015-04-14-0/+33
| | | | | | | | | | | | | On some SoCs, DMA-capable peripherals see a different address space to the CPU's physical address space. Create an API to allow platform-agnostic drivers to convert between the two address spaces when programming DMA operations. This API will exist on all platforms, but will have a dummy implementation when this feature is not required. Other platforms will enable CONFIG_PHYS_TO_BUS and provide the required implementation. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: dwc2: fix bulk transfersStephen Warren2015-04-14-9/+13
| | | | | | | | | | | | | | | | When I created wait_for_chhltd(), I noticed that some instances of the code it replaced expected the ACK bit to be set and others didn't. I assumed this was an accidental inconsistency in the code, so wrote wait_for_chhltd() to always expect ACK to be set. This code appeared to work correctly for both enumeration of USB keyboards and operation of USB Ethernet devices. However, this change broke USB Mass Storage (at least my USB SD card reader). This change reverts to exactly the original behaviour. I'm not sure why the ACK bit isn't always set (perhaps a quirk in the USB HW or DWC2 controller), but the code works this way! Fixes: 5be4ca7d6ac8 ("usb: dwc2: unify waiting for transfer completion") Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: dwc2: remove restriction on buffer lengthStephen Warren2015-04-14-9/+3
| | | | | | | | | | Each USB transfer is split up into chunks that are held in an aligned buffer. This imposes a limit on the size of each chunk, but no limit on the total size of transferred data. Fix the logic in chunk_msg() not to reject large transfers, but simply take the size of the aligned buffer into account when calculating the chunk size. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: dwc2: fix aligned buffer usageStephen Warren2015-04-14-6/+8
| | | | | | | | | | | | | | | The original aligned_buffer usage: a) Uselessly copied data into the aligned buffer even for IN transactions. Fix this my making the copy conditional. b) Always programmed the HW to transfer to/from the start of the aligned buffer. This worked fine for OUT transactions since the memcpy copied the OUT data to this location too. However, for large IN transactions, since the copy from the aligned buffer to the "client" buffer was deferred until after all chunks were transferred. it resulted in each chunk's transfer over-writing the data for the first transfer. Fix this by copying IN data as soon as it's received. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: dwc2: simplify wait_for_chhltdStephen Warren2015-04-14-4/+2
| | | | | | | toggle is never NULL. Simplify the code by removing handling of when it is NULL. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: dwc2: remove control_data_toggle[]Stephen Warren2015-04-14-8/+4
| | | | | | | | The control data toggle resets to DATA1 at the start of the data phase of every setup transaction. We don't need a global variable to store the value; we can just store it on the stack. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: dwc2: usb chunk_msg() for control transfers tooStephen Warren2015-04-14-95/+19
| | | | | | This removes duplicated code. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: dwc2: refactor submit_bulk_msg to be commonStephen Warren2015-04-14-16/+39
| | | | | | | | Move the body of submit_bulk_msg() into new function chunk_msg(). This can be shared with submit_control_msg() to reduce code duplication, and allow control messages larger than maxpacket. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: dwc2: unify waiting for transfer completionStephen Warren2015-04-14-107/+60
| | | | | | Lift common code out of submit_bulk_msg() and submit_control_msg(). Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* usb: hub: allow pgood_delay to be specified via envTim Harvey2015-04-14-0/+8
| | | | | | | Some USB devices break the spec and require longer warm-up times. Allow the usb_pgood_delay env variable to override the calculated time. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* usb: fix first descriptor fetch error handlingStephen Warren2015-04-14-1/+16
| | | | | | | | | | | | | | | | | | When fetching the first descriptor from a new device, only validate that we received at least 8 bytes, not that we received the entire descriptor. The reasoning is: - The code only uses fields in the first 8 bytes, so that's all we need to have fetched at this stage. - The smallest maxpacket size is 8 bytes. Before we know the actual maxpacket the device uses, the USB controller may only accept a single packet (see the DWC2 note in the comment added in the commit). Consequently we are only guaranteed to receive 1 packet (at least 8 bytes) even in a non-error case. Fixes: 1a7758044b04 ("usb: Early failure when the first descriptor read fails or is invalid") Cc: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
generated by cgit v1.1 at 2024-09-12 18:20:51 +0000