summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* sunxi: display: Add overscan correctionHans de Goede2015-08-14-12/+45
| | | | | | | | | | | Add support for making the visual area of the framebuffer smaller and drawing a black border around it. This is intended for use with overscanning monitors (esp. with composite video out), to avoid part of the picture being invisible. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Anatolij Gustschin <agust@denx.de>
* cfbconsole: Add support for stride != widthHans de Goede2015-08-14-35/+37
| | | | | | | | | | | | | | cfbconsole currently assumes that the width and stride of the framebuffer are the same, in most places where stride matters it uses a VIDEO_LINE_LEN helper macro. This commit changes the few places not using VIDEO_LINE_LEN to also use VIDEO_LINE_LEN, and protects the default VIDEO_LINE_LEN with a #ifndef guard, allowing the boards config.h to override and, and thus support cases where stride != width. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Anatolij Gustschin <agust@denx.de>
* cfbconsole: Remove width argument from the logo functionsHans de Goede2015-08-14-13/+8
| | | | | | | | The passed in width is always VIDEO_COLS. This is a preparation patch for adding stride != width support to the cfbconsole code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Anatolij Gustschin <agust@denx.de>
* ARM: tegra: represent RAM in 1 or 2 banksStephen Warren2015-08-13-15/+107
| | | | | | | | | | | | | | | | | | | | | Represent all available RAM in either one or two banks. The first bank describes any RAM below 4GB. The second bank describes any RAM above 4GB. This split is driven by the following requirements: - The NVIDIA L4T kernel requires separate entries in the DT /memory/reg property for memory below and above the 4GB boundary. The layout of that DT property is directly driven by the entries in the U-Boot bank array. - On systems with RAM beyond a physical address of 4GB, the potential existence of a carve-out at the end of RAM below 4GB can only be represented using multiple banks, since usable RAM is not contiguous. While making this change, add a lot more comments re: how and why RAM is represented in banks, and implement a few more "semantic" functions that define (and perhaps later detect at run-time) the size of any carve-out. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: query_sdram_size() cleanupStephen Warren2015-08-13-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The return value of query_sdram_size() is assigned directly to gd->ram_size in dram_init(). Adjust the return type to match the field it's assigned to. This has the beneficial effect that on 64-bit systems, the return value can correctly represent large RAM sizes over 4GB. For similar reasons, change the type of variable size_bytes in the same way. query_sdram_size() would previously clip the detected RAM size to at most just under 4GB in all cases, since on 32-bit systems, larger values could not be represented. Disable this feature on 64-bit systems since the representation restriction does not exist. On 64-bit systems, never call get_ram_size() to validate the detected/ calculated RAM size. On any system with a secure OS/... carve-out, RAM may not have a single contiguous usable area, and this can confuse get_ram_size(). Ideally, we'd make this call conditional upon some other flag that indicates specifically that a carve-out is actually in use. At present, building for a 64-bit system is the best indication we have of this fact. In fact, the call to get_ram_size() is not useful by the time U-Boot runs on any system, since U-Boot (and potentially much other early boot software) always runs from RAM on Tegra, so any mistakes in memory controller register programming will already have manifested themselves and prevented U-Boot from running to this point. In the future, we may simply delete the call to get_ram_size() in all cases. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: move kernel_addr_r on T210Stephen Warren2015-08-13-1/+1
| | | | | | | | | | | | | | The new value is the most likely value where the kernel wants to end up at run-time. Selecting this value as the load address likely avoids the need to copy the kernel image from the actual load address to the desired load address. Note that this isn't guaranteed since the kernel may wish to run at an arbitrary location. In that case, U-Boot will still relocate the image according to its wishes; this change is a performance optimization, not a hard-coding of the final image location. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Correct logic for reading pll_misc in clock_start_pll()Simon Glass2015-08-13-13/+31
| | | | | | | | | | | | The logic for simple PLLs on T124 was broken by this commit: 722e000c Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. Correct it by reading from the same pll_misc register that it writes to and adding an entry for the DP PLL in the pllinfo table. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Make pinmux.h standalone includibleThierry Reding2015-08-13-0/+2
| | | | | | | | | | | This header file uses type definitions (u8, u32) from linux/types.h but doesn't include it. If includes aren't carefully ordered this can cause build failures. Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: nand: disable subpage writesMarcel Ziswiler2015-08-13-0/+3
| | | | | | | | Disable subpage writes as we do not provide ecc->hwctl. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* apalis/colibri_t30: fix usb dm regressionMarcel Ziswiler2015-08-13-2/+2
| | | | | | | | | | | | | | | | Unfortunately currently both Apalis T30 as well as Colibri T30 crash upon starting USB host support. This is due to the following patch not having taken into account that our T30 device trees were defaulting to peripheral only mode instead of otg: commit ddb9a502d18008e845d5a8fa03ec48630fa77fb7 dm: usb: tegra: Move most of init/uninit into a function This patch fixes this by defaulting to otg now. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* colibri_t20: fix reset out pinMarcel Ziswiler2015-08-13-0/+3
| | | | | | | | | | | Make sure SODIMM pin 87 nRESET_OUT is released properly by explicitly setting its pin mux function to GMI. This solves some issues with e.g. USB not being fully operational on carrier boards with USB hubs connected to reset if U-Boot got loaded via recovery mode aka rcm. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* apalis/colibri_t20/30: clean-upMarcel Ziswiler2015-08-13-17/+26
| | | | | | | | | | | | | | | Various clean-ups either in comments, order or spacing without any functional impact: - Add some comments in the device trees resp. reorder some parameters for consistency across all our modules. - Sort some include files alphabetically (while leaving common.h on top of course). - Streamline some comments in the configuration files and fix the spacing from using spaces to tabs. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* apalis/colibri_t20/t30: increase tftp blocksizeMax Krummenacher2015-08-13-0/+9
| | | | | | | | | | | | | Enable CONFIG_IP_DEFRAG and set CONFIG_TFTP_BLOCKSIZE to 16384. This increases the tftp download speed considerably. While at it enable CONFIG_TFTP_TSIZE which limits the progress bar to fifty '#' independent of the downloaded file size. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* colibri_t20: enable ubi/ubifs supportMarcel Ziswiler2015-08-13-0/+8
| | | | | | | | | Now as all is in place actually enable UBI/UBIFS support to be able to boot the Linux kernel and root file system from NAND. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* colibri_t20: enable mtdparts supportMarcel Ziswiler2015-08-13-0/+14
| | | | | | | | | Enable mtdparts aka dynamic MTD partition support. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* mtd/nand/tegra: alignment workaroundMarcel Ziswiler2015-08-13-51/+36
| | | | | | | | | | | | | | | | | | | | | | | | | Integrate cache alignment bounce buffer to workaround issues as follows: Loading file '/boot/zImage' to addr 0x01000000 with size 4499152 (0x0044a6d0)... ERROR: v7_dcache_inval_range - start address is not aligned - 0x1f7f0108 ERROR: v7_dcache_inval_range - stop address is not aligned - 0x1f7f1108 Done Kernel image @ 0x1000000 [ 0x000000 - 0x44a6d0 ] Starting kernel ... undefined instruction pc : [<005ff03c>] lr : [<0000800c>] sp : 0144b6e8 ip : 01000188 fp : 0144a6c8 r10: 00000000 r9 : 411fc090 r8 : 00000100 r7 : 00000cfb r6 : 0144a6d0 r5 : 00000000 r4 : 00008000 r3 : 0000000c r2 : 00000100 r1 : 00000cfb r0 : 00000000 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: nand: fix read_byte required for proper onfi detectionMarcel Ziswiler2015-08-13-31/+7
| | | | | | | | | | | | | | | | | | Fix PIO read_byte() implementation not only used for the legacy READ ID but also the PARAM command required for proper ONFI detection. This fix is inspired by Lucas Stach's Linux Tegra NAND driver of late (not mainline yet but getting there soon I hope). I vaguely remember that those commands are special on 16-bit bus NAND (e.g. always return 8-bit data regardless) and later Linux MTD fixed/ changed the way this is handled which in turn broke once U-Boot pulled that in. Basically instead of doing PIO read regular DMA block read is now used which this patch actually fixes. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* colibri_t20: disable PMIC sleep mode on low supply voltageMarcel Ziswiler2015-08-13-0/+35
| | | | | | | | | | | | | | | | | | The Colibri T20's PMIC enters a sleep mode on low supply voltage < 3.0V ±2.5% (2.92...3.08V). Rising the main supply voltage again does not bring it back to regular operation. Not even a full reset does bring the module back. A full power cycle was required to reboot the system. A long positive pulse on the PMICs resume pin also reboots the system but this pin is only accessible as a test point on the module. This patch configures the PMIC through I2C to not enter this sleep mode plus force it to normal state upon sleep request exit should this ever happen. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* colibri_t20: add i2c supportMarcel Ziswiler2015-08-13-0/+32
| | | | | | | | | | Add I2C support in order to subsequently allow disabling the PMIC sleep mode on low supply voltage. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* colibri_t20: add lcd display supportMarcel Ziswiler2015-08-13-0/+57
| | | | | | | | | | Add LCD display support defaulting to VESA VGA resolution. Different resolutions configurable via device tree. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* colibri_t20: fix device-tree compatible nodeMarcel Ziswiler2015-08-13-1/+1
| | | | | | | | | | Use toradex,colibri_t20 as the device-tree compatible node value rather than toradex,t20 in accordance to our Apalis/Colibri T30 products. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* apalis/colibri_t20/t30: integrate recovery mode detectionMarcel Ziswiler2015-08-13-0/+42
| | | | | | | | | | | | Allow detecting whether or not U-Boot was launched through the recovery mode of the resp. NVIDIA SoC. Make use of a board specific arch_misc_init() and enable the same via CONFIG_ARCH_MISC_INIT configuration option. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: allow reading recovery mode boot typeMarcel Ziswiler2015-08-13-0/+2
| | | | | | | | | | Add defines to allow reading recovery mode (RCM) boot type from the boot information table (BIT) written by the boot ROM (BR) to the IRAM. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: allow custom usb manufacturer/product/vendor ids/stringsMarcel Ziswiler2015-08-13-0/+6
| | | | | | | | | | Allow for optional custom USB gadget manufacturer/product/vendor IDs/strings to be specified. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2015-08-13-22/+47
|\
| * mmc_spi: Big-endian supportYoshinori Sato2015-08-13-5/+5
| | | | | | | | | | | | | | Currently implement always swap for big-endian value. So doesn't work big-endian environment. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
| * dw_mmc: Calculate dwmmc FIFO threshold size if not providedSimon Glass2015-08-13-2/+8
| | | | | | | | | | | | | | | | | | We can calculate this. Add code to do this if it is not provided. panto: prefix changed to dw_mmc to make things easier to grep Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
| * mmc: dw_mmc: Avoid using printf() for errorsSimon Glass2015-08-11-11/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | The dw_mmc driver uses printf() in various places. These bloat the code and cause problems for SPL. Use debug() where possible and try to return a useful error code instead. panto: Small rework to make it apply against top of tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
| * mmc: dw_mmc: Improve handling of data transfer failureMarek Vasut2015-08-11-7/+9
| | | | | | | | | | | | | | | | | | | | | | In case the data transfer failure happens, instead of returning immediatelly, make sure the DMA is disabled, status register is cleared and the bounce buffer is stopped. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com>
| * mmc: dw_mmc: Zap endless timeoutMarek Vasut2015-08-11-2/+17
| | | | | | | | | | | | | | | | | | | | Endless timeouts are bad, since if we get stuck in one, we have no way out. Zap this one by implementing proper timeout. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com>
| * mmc: dw_mmc: Stop bounce buffer even in case of failureMarek Vasut2015-08-11-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The driver didn't stop the bounce buffer in case a data transfer failed. This would lead to memory leakage if the communication between the CPU and the card is unreliable. Add the missing call to stop the bounce buffer. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com>
* | net: lpc32xx: eth buffers base configSylvain Lemieux2015-08-13-3/+5
| | | | | | | | | | | | | | | | Add support to specify the Ethernet buffer base address; if none are supply by the board, the default value is use (from existing code). Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2015-08-13-55/+210
|\ \
| * | net: e1000: Increase autoneg timeout to 8 secondsStefan Roese2015-08-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current 4.5 timeout for the autonegotiation are not enough to complete it on my platform. Using the Intel E1000 PCIe card in the Marvell db-mv784mp-gp eval board. So lets increase the timeout to 8 seconds. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org>
| * | tftp.c: fix CONFIG_TFTP_TSIZE for small filesMax Krummenacher2015-08-12-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_TFTP_TSIZE should limit a tftp downloads progress to 50 '#' chars. Make this work also for small files. If the file size is small, i.e. smaller than 2 tftp block sizes the number of '#' can get much larger. i.e. with a 1 byte file 65000 characters are printed, with a 512 byte file around 500. When using CONFIG TFTP BLOCKSIZE together with CONFIG_IP_DEFRAG the issue is more notable. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: broadcom: Add BCM Cygnus PHYJiandong Zheng2015-08-11-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | Add Ethernet PHY for BCM Cygnus SoC Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: phy: delay only if reset handler is registeredJörg Krause2015-08-11-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | With commit e3a77218a256edbe201112a39beeed8adcabae3f the MII bus is only reset if a reset handler is registered. If there is no reset handler there is no need to wait for a device to come out of the reset. Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
| * | net: phy: fix data type of phy_idJörg Krause2015-08-11-1/+1
| | | | | | | | | | | | | | | | | | phy_id is declared as u32 in create_phy_by_mask and in struct phy_device. Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
| * | qoriq eth.c bugfix: handle received corrupted frames correctlyDaniel Inderbitzin2015-08-11-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | The rxbd is not correctly handled in case of a frame physical error (FPE) or frame size error (FSE). The rxbd must be cleared and advanced in case of an error to avoid receive stall. Signed-off-by: Daniel Inderbitzin <daniel.inderbitzin@gmail.com>
| * | net: lpc32xx: add RMII phy mode supportVladimir Zapolskiy2015-08-11-4/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LPC32xx MAC and clock control configuration requires some minor quirks to deal with a phy connected by RMII. It's worth to mention that the kernel and legacy BSP from NXP sets SUPP_RESET_RMII == (1 << 11) bit, however the description of this bit is missing in shared LPC32x0 User Manual UM10326 Rev. 3, July 22, 2011 and in LPC32x0 Draft User Mannual Rev. 00.27, November 20, 2008, also in my tests an SMSC LAN8700 phy device connected over RMII seems to work correctly without touching this bit. Add support of RMII, if CONFIG_RMII is defined, this option is aligned with a number of boards, which already define the same config value. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
| * | net: lpc32xx: improve MAC configuration on reset and initializationVladimir Zapolskiy2015-08-11-18/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change rearranges general MAC configuration and PHY specific configuration of MAC registers (duplex mode and speed), before this change set bits related to PHY configuration in MAC2 and COMMAND registers are rewritten by the following writing to the registers. Without the change auto negotiation on boot quite often is not completed in reasonable time: Waiting for PHY auto negotiation to complete......... TIMEOUT ! Additionally MAC1_SOFT_RESET clear bit is removed since it is done in preceding lpc32xx_eth_initialize() and in lpc32xx_eth_halt(), instead added missing MCFG_RESET_MII_MGMT on device initialization. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
| * | net: lpc32xx: connect MAC to phy with CONFIG_PHY_ADDR idVladimir Zapolskiy2015-08-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The lpc32xx_eth_phylib_init() function is capable to connect LPC32XX MAC to some specified phy by phy id, by chance the single user of lpc32xx_eth has CONFIG_PHY_ADDR set to 0, however other boards may have non-zero CONFIG_PHY_ADDR value, fix it. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: lpc32xx: correct command register reset valueVladimir Zapolskiy2015-08-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to LPC32x0 User Manual the following bits in Command register 0x3106_0100 are defined: Bit Symbol 2 - Unused 3 RegReset 4 TxReset 5 RxReset Fix wrong (1-bit shifted right) COMMAND_RESETS value, which sets an unused bit, but neglects RxReset. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: davinci_emac: don't teardown inactive rx channelJeroen Hofstee2015-08-11-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tearing down an unitialized rx channel causes a pending address hole event to be queued. When booting linux it will report this pending as something like "Address Hole seen by USB_OTG at address 57fff584", since u-boot did not handled this interrupt. Prevent that by not tearing down the rx channel, when not receiving. Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * | net: Add support for Marvell 88E1510 PHYClemens Gruber2015-08-11-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support the 88E1510 PHY which is very similar to the 88E1518. I also set the INTn output and configured the LEDs. Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Hao Zhang <hzhang@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: Improve 88E151x PHY initializationClemens Gruber2015-08-11-14/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - The EEE fixup magic should also be enabled for RGMII - Improved comments Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Hao Zhang <hzhang@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: macb: add gmac multi-queue supportWu, Josh2015-08-11-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch refer to linux kernel commit: d8b763e1e79f net/macb: add TX multiqueue support for gem by: Cyrille Pitchen 1. macb driver will check the register to find how many queues support for this chip. 2. Then as we only use queue0 for tx, so we will set up all other queues use a dummy descriptor, which USED bit is set. So those queues are not used. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net/phy: set led for rtl8211f phyShengzhou Liu2015-08-11-0/+8
| | | | | | | | | | | | | | | | | | | | | Initialize LCR rigister to configure green LED for Link, yellow LED for Active. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
| * | e1000: remove unnecessary clearing of SWSM.SWSM_SMBITim Harvey2015-08-11-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | remove unnecessary clearing of SWSM.SWSM_SMBI when obtaining the SW semaphore. This was introduced in 951860634fdb557bbb58e0f99215391bc0c29779 while adding i210 support and should be now resolved by releasing the semaphore when no longer needed. Cc: Marcel Ziswiler <marcel@ziswiler.com> Cc: Marek Vasut <marex@denx.de> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: York Sun <yorksun@freescale.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| * | Revert "e1000: fix sw fw sync on igb i210/i211"Tim Harvey2015-08-11-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 17da7120249bfdef877f46be5bbcb3cc01212eb9. The i210/i211 do have the SW_FW_SYNC (0x5b5c) register and this is what should be used when acquiring the semaphore. I believe the issue that this patch was trying to resolve is now resolved by properly releasing the semaphore once no longer needed. Cc: Marcel Ziswiler <marcel@ziswiler.com> Cc: Marek Vasut <marex@denx.de> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: York Sun <yorksun@freescale.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
generated by cgit v1.1 at 2024-08-21 23:29:22 +0000