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* cfi_flash: Use flash_read32() in sector_erased()Stefan Roese2010-12-17-3/+3
| | | | | | | | | | The function sector_erased() is modified to not use pointer access, but to use the correct accessor functions. This fixes a problem on the t3corp board with the Xilinx DS617 flash chips. Here a board specific accessor function is needed to read from flash in 32bit mode. This patch enables such an operation mode. Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: Fix problems with status/id read modeStefan Roese2010-12-17-0/+12
| | | | | | | | | This patch adds some calls to set the flash chip in the read-status- register- or read-id-mode before the corresponding register is read back. This problem was detected while porting the common CFI driver to support the Xilinx DS617 flash chips. Signed-off-by: Stefan Roese <sr@denx.de>
* powerpc/nand spl: link libgccScott Wood2010-12-16-8/+8
| | | | | | | | | | | | | | | | Recent GCC (4.4+) performs out-of-line epilogues in some cases, when optimizing for size. It causes a link error for _restgpr_30_x (and similar) if libgcc is not linked. It actually increases size with very small binaries, due to the fixed size of the out-of-line code, and not having any functions that actually need to restore more than 2 or 3 registers. But I don't see a way to turn it off, other than asking GCC to optimize for speed -- which may also increase size for some boards. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Wolfgang Denk <wd@denx.de>
* MAINTAINERS: Transfer openrd_base maintainership to Prafulla WadaskarSimon Kagstrom2010-12-16-4/+1
| | | | Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
* Armada100: Add Board Support for Marvell Aspenite-DBPrafulla Wadaskar2010-12-16-0/+171
| | | | | | | | | | | | | | | | | | | | | | | | | | | Aspenite is a Development Board for ASPEN/ARMADA168(88AP168) with * Processor upto 1.2GHz * Parallel 1Gb x8 DDR2-1066 MHz * 16 Mb x16 NOR, 4Gb x8 SLC NAND, footprint for SPI NOR * Footprints for eMMC/eSD NAND & MMC x8 card * 4-in-1 card reader (xD, MMC/SD/MS Pro), CF True IDE socket * SEAF memory board, subset of PISMO2 With Peripherals: * 4.3” WVGA 24-bit LCD * Audio codecs (AC97 & I2S), TSI * VGA camera * Video in via 3 RCA jacks, and HDMI type C out * Marvell 88W8688 802.11bg/BT module * GPS RF IC * Dual analog mics & speakers, headset jack, LED, ambient light sensor * USB2.0 HS host (A), OTG (micro AB) * FE PHY, PCIE Mini Card slot * GPIO, GPIO expander with DIP switches for easier selection UART serial over USB, CIR This patch adds basic board support with DRAM and UART functionality The patch is tested for boot from DRAM using XDB Signed-off-by: Mahavir Jain <mjain@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* mv-common.h: Add support for ARMADA100 PlatformsPrafulla Wadaskar2010-12-16-16/+50
| | | | | | | This patch adds commonly used macros for ARMADA100 based baords, Also some code reshuffled and updated for typos and comments Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* Serial: Add UART support for Marvell ARMADA 100 SoCs.Prafulla Wadaskar2010-12-16-2/+3
| | | | | | | | ARMADA 100 SoCs has NS16550 compatible UART peripheral This patch enables the same for ARMADA100 platforms Signed-off-by: Mahavir Jain <mjain@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* Serial: ns16550: Add support for CONFIG_SYS_NS16550_IER macroPrafulla Wadaskar2010-12-16-2/+6
| | | | | | | | | | On some processors this ier register configuration is different for ex. Marvell Armada100 This patch introduce CONFIG_SYS_NS16550_IER macro support to unconditionally initialize this register. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* add Multi Function Pin configuration support for ARMADA100Prafulla Wadaskar2010-12-16-0/+67
| | | | | | This patch adds the support MFP support for Marvell ARMADA100 SoCs Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* gpio: Add Multi-Function-Pin configuration driver for Marvell SoCsPrafulla Wadaskar2010-12-16-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the Marvell SoCs has Multi Function Pin (MFP) configuration registers For ex. ARMADA100. These registers are programmed to expose the specific functionality associated with respective SoC Pins This driver provides configuration APIs, using them, configuration need to be done in board specific code for ex- following code configures MFPs 107 and 108 for UART_TX/RX functionality int board_early_init_f(void) { u32 mfp_cfg[] = { /* Console on UART1 */ MFP107_UART1_RXD, MFP108_UART1_TXD, MFP_EOC /*End of configureation*/ }; /* configure MFP's */ mfp_config(mfp_cfg); return 0; } Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* arm: Add Support for Marvell ARMADA 100 Familiy SoCsPrafulla Wadaskar2010-12-16-0/+650
| | | | | | | | | | | | | | | | | | | ARMADA 100 Family processors are highly integrated SoCs based on Sheeva_88SV331x-v5 PJ1 cpu core. Ref: http://www.marvell.com/products/processors/applications/armada_100 SoC versions Supported: 1) ARMADA168/88AP168 (Aspen P) 2) ARMADA166/88AP166 (Aspen M) 3) ARMADA162/88AP162 (Aspen L) Contributors: Eric Miao <eric.y.miao@gmail.com> Lei Wen <leiwen@marvell.com> Mahavir Jain <mjain@marvell.com> Signed-off-by: Mahavir Jain <mjain@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* Merge branch 'master' of ../master into nextWolfgang Denk2010-12-16-663/+1638
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| * Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2010-12-16-6/+45
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| | * pm9261: enable cache commandAsen Dimov2010-12-16-0/+1
| | | | | | | | | | | | Signed-off-by: Asen Dimov <dimov@ronetix.at>
| | * pm9261: ARM relocation supportAsen Dimov2010-12-16-2/+14
| | | | | | | | | | | | Signed-off-by: Asen Dimov <dimov@ronetix.at>
| | * pm9263: enable cache commandAsen Dimov2010-12-16-0/+1
| | | | | | | | | | | | Signed-off-by: Asen Dimov <dimov@ronetix.at>
| | * pm9263: ARM relocation supportAsen Dimov2010-12-16-2/+14
| | | | | | | | | | | | Signed-off-by: Asen Dimov <dimov@ronetix.at>
| | * pm9g45: enable cache commandAsen Dimov2010-12-16-0/+1
| | | | | | | | | | | | Signed-off-by: Asen Dimov <dimov@ronetix.at>
| | * pm9g45: ARM relocation supportAsen Dimov2010-12-16-2/+14
| | | | | | | | | | | | Signed-off-by: Asen Dimov <dimov@ronetix.at>
| * | ppc4xx: Fix missing linker scripts for partial linkingStefan Roese2010-12-15-80/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the acadia_nand and kilauea_nand linker scripts which have been missing in commit ee8028b7 [ppc4xx: Cleanup for partial linking and --gc-sections] Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bernhard Weirich <Bernhard.Weirich@riedel.net>
| * | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2010-12-14-6/+6
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| | * | mpc83xx: fix pcie enumerationBaidu Boy2010-12-13-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix a problem for the pcie enumeration for mpc83xx cpus. Without this we will not get correct value in hose->regions[...]. The pointer *reg in function mpc83xx_pcie_init_bus() shall not be changed. Because we will use this pointer as a parameter to call function mpc83xx_pcie_register_hose(). Signed-off-by: Baidu Boy <liucai.lfn@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2010-12-14-86/+66
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| | * | ARM: */start.S: use canonical asm syntaxWolfgang Denk2010-12-13-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | Make code build with older tool chains. Signed-off-by: Wolfgang Denk <wd@denx.de>
| | * | omap3: emif|sdrc: use a single global data defineNishanth Menon2010-12-11-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DECLARE_GLOBAL_DATA_PTR declarations in functions are inherently troublesome with various compilers (e.g. gcc 4.5) Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * | OMAP: Timer: Replace bss variable by gdDirk Behme2010-12-11-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in the OMAP timer driver. The usage of bss values in drivers before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted. Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Tested-by: Steve Sakoman <steve.sakoman@linaro.org> Tested-by: John Rigby <john.rigby@linaro.org> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Tested-by: Heiko Schocher <hs@denx.de> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * | DaVinci DM6446: Config UpdateSandeep Paulraj2010-12-11-8/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DM6446 does not build due to the ARM relocation patch. Also the board does not build in the NOR mode. Changed default to NAND to ensure no build failure. While at it removed CONFIG_CMD_KGDB Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * | davinci: Rewrite timer.c to use tbl/tbu emulation variables in gdNick Thompson2010-12-11-49/+28
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change allows the davinci timer functions to be used before relocation since it avoids using static variables prior to BSS being made available. The code is based on that used in the at91 timers, modified to use a davinci specific hardware timer. It also maintains reset_timer() to allow deprecated timer usage to continue to work (for example, in nand_base.c) Signed-off-by: Nick Thompson <nick.thompson@ge.com> Tested-by: Ben Gardiner <bengardiner@nanometrics.ca> Tested-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Tested-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | p1022ds: fix switching of DIU/LBC signalsTimur Tabi2010-12-13-10/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the P1022, the pins which drive the video display (DIU) are muxed with the local bus controller (LBC), so if the DIU is active, the pins need to be temporarily muxed to LBC whenever accessing NOR flash. The code which handled this transition is checking and changing the wrong bits in PMUXCR. Also add a follow-up read after a write to NOR flash if we're going to mux back to DIU after the write, as described in the P1022 RM. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | fsl_esdhc: Set the eSHDC DMACTL[SNOOP] bit after resetting the controllerP.V.Suresh2010-12-13-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | eSDHC host controller reset results in clearing of snoop bit also. This patch sets the SNOOP bit after the completion of host controller reset. Without this patch mmc reads are not consistent. Signed-off-by: P.V.Suresh <pala@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | fsl_upm: Add MxMR/MDR synchronizationJohn Schmoller2010-12-13-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to Freescale reference manuals (eg section "13.4.4.2 Programming the UPMs" of the P4080 Reference Manual): "Since the result of any update to the MxMR/MDR register must be in effect before the dummy read or write to the UPM region, a write to MxMR/MDR should be followed immediately by a read of MxMR/MDR." The UPM on a custom P4080-based board did not work without performing a read of MxMR/MDR after a write. Signed-off-by: John Schmoller <jschmoller@xes-inc.com> Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | tsec: Revert to setting TBICR_ANEG_ENABLE by default for SGMIIKumar Gala2010-12-13-13/+24
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following commit: commit 46e91674fb4b6d06c6a4984c0b5ac7d9a16923f4 Author: Peter Tyser <ptyser@xes-inc.com> Date: Tue Nov 3 17:52:07 2009 -0600 tsec: Force TBI PHY to 1000Mbps full duplex in SGMII mode Removed setting Auto-Neg by default, however this is believed to be proper default configuration for initialization of the TBI interface. Instead we explicitly set CONFIG_TSEC_TBICR_SETTINGS for the XPedite5370 & XPedite5500 boards that use a Broadcomm PHY which require Auto-Neg to be disabled to function properly. This addresses a breakage on the P2020 DS & MPC8572 DS boards when used with an SGMII riser card. We also remove setting CONFIG_TSEC_TBICR_SETTINGS on the P1_P2_RDB family of boards as now the default setting is sufficient for them. Additionally, we clean up the code a bit to remove an unnecessary second define. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Peter Tyser <ptyser@xes-inc.com> Tested-by: Peter Tyser <ptyser@xes-inc.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-12-09-33/+102
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| | * imx: Get fec mac address from fuseLiu Hui-R643432010-11-21-30/+98
| | | | | | | | | | | | | | | | | | | | | The patch is to support getting FEC MAC address from fuse bank. Signed-off-by: Jason Liu <r64343@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de>
| | * mx51evk: savenv or env save command does not workJason Liu2010-11-21-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | fix saveenv or env save command not work on mx51evk board. with this patch, we can use savenv or env save to store enviroments to mmc card slot 0 Signed-off-by: Jason Liu <r64343@freescale.com>
| * | include/linux/mii.h: update for supporting GEMacpaul Lin2010-12-09-74/+107
| | | | | | | | | | | | | | | | | | | | | | | | This file has been synced (copy) from Linux source code. This commit was based on kernel 2.6.32. It updates gigabit related phy registers and basic definitions. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * | ARM: make timer variables in gt_t available for all ARM platformsPrafulla Wadaskar2010-12-09-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All code that attemots to access variables in BSS before relocation (for example directly or indirectly by board_init_f()) needs to be fixed. Especially timer.c needs to fix on most of the ARM platforms. This patch makes timer related variables in gd_t available for all ARM implementations. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Edited commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
| * | armv7: fix relocation skipAndreas Bießmann2010-12-09-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | I doubt the stack_setup() was defective before: we load the current location of _start and compare against destination of relocate_code(). If we are already there we shoud skip the relocation and jump over to clear_bss. Before the clear_bss was also skipped. Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
| * | arm: fixloop(): do not use r8 for relocationAndreas Bießmann2010-12-09-42/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | r8 is used for global_data and should therefore be left alone! For C code the compiler flag --fixed-r8 does the job, but in assembler we need to be aware of that fact. Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
| * | arm: relocate_code(): do not set register uselessAndreas Bießmann2010-12-09-30/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | In case we are still at relocation target address before relocation we do not need to load the registers needed for relocation. We should instead skip the whole relocation part and jump over to clear_bss immediately. Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
| * | arm: copy_loop(): use scratch registerAndreas Bießmann2010-12-09-70/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch uses r1 as scratch register for copy_loop(). Therefore we do not longer need r7 for the storage of relocate_code()'s 'addr_moni' (the destination address of relocation). Therefore r7 can be used later on for other purposes. Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
| * | hwconfig: Fix handling of env_hwconfig, board_hwconfig, and cpu_hwconfigKumar Gala2010-12-09-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The handling of env_hwconfig, board_hwconfig, and cpu_hwconfig got broken when we removed the boards defining dummy board_hwconfig & cpu_hwconfig values. We fix this by handling the various strings in priority order. If hwconfig_parse returns NULL for a given string we check the next one in order (env_hwconfig, board_hwconfig, followed by cpu_hwconfig). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | arm: add 8-byte alignment for ABI compliance before board_init_fHeiko Schocher2010-12-08-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | suggested from Daniel Hobi<daniel.hobi@schmid-telecom.ch> Tested on following boards: arm1136: qong armv7: omap3_beagle arm926ejs: magnesium, tx25 Signed-off-by: Heiko Schocher <hs@denx.de> cc: Daniel Hobi <daniel.hobi@schmid-telecom.ch> cc: Albert ARIBAUD <albert.aribaud@free.fr>
| * | ARMV7: Vexpress: Fix build errorDirk Behme2010-12-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix ca9x4_ct_vxp build error Configuring for ca9x4_ct_vxp board... board/armltd/vexpress/libvexpress.o: In function `udelay': u-boot.git/board/armltd/vexpress/ca9x4_ct_vxp.c:161: multiple definition of `udelay' lib/libgeneric.o:u-boot.git/lib/time.c:34: first defined here lib/libgeneric.o: In function `udelay': zlib.c:(.text+0x1ee8): undefined reference to `__udelay' Signed-of-by: Dirk Behme <dirk.behme@googlemail.com>
| * | ARMV7: Vexpress: fix compile warningsMatt Waddel2010-12-08-3/+6
| | | | | | | | | | | | | | | | | | Fixed "pointer from integer without a cast" warnings in Vexpress. Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
| * | ARMV7: Vexpress: fix build errorsMatt Waddel2010-12-08-68/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes build errors in the vexpress system: - Removed sys_proto.h requirement from syslib.c. - Switched vexpress to the default armv7 linker script. - Renamed TEXT_BASE to CONFIG_SYS_TEXT_BASE. Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
| * | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2010-12-08-38/+771
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| | * | arm920t/at91/timer: replace bss variables by gdAndreas Bießmann2010-12-07-15/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss values in arm920t/at91/timer driver. The usage of bss values in driver before initialisation of bss is forbidden. In that special case some data in .rel.dyn gets corrupted by the arm920t/at91/timer driver. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | arm920t/at91/reset: board_reset: define weak symbolAndreas Bießmann2010-12-07-3/+5
| | | | | | | | | | | | | | | | Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
| | * | MAKEALL: fix AT91Andreas Bießmann2010-12-07-15/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | * add boards_by_soc() * remove boards already in boards.cfg from LIST_AT91 Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
generated by cgit v1.1 at 2024-09-18 21:57:45 +0000