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* ARM: uniphier: define CONFIG_SYS_BOOTMAPSZMasahiro Yamada2016-01-20-0/+2
| | | | | | | | | | | | | U-Boot relocates the device tree and the initramdisk to the tail of the memory region before booting the kernel. Some UniPhier boards are equipped with a large amount of memory. For those boards, the device tree and the initramdisk are placed out of the the kernel causing a kernel panic. Add CONFIG_SYS_BOOTMAPSZ to prevent them from going too high. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* armv8: cavium: Get DRAM size from ATFSergey Temerkhanov2016-01-19-0/+27
| | | | | | | | Change the dram_init() function on ThunderX to query ATF services for the real installed DRAM size Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
* armv8: cavium: Add an implementation of ATF calling functionsSergey Temerkhanov2016-01-19-1/+430
| | | | | | | | This commit adds functions issuing calls to the product-specific ATF services Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
* armv8: cavium: Add ThunderX 88xx board definitionSergey Temerkhanov2016-01-19-2/+290
| | | | | | | | | This commit adds basic Cavium ThunderX 88xx board definitions and support. Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> [trini: Drop CONFIG_SYS_GENERIC_BOARD define] Signed-off-by: Tom Rini <trini@konsulko.com>
* armv8: cavium: Add the device tree for ThunderXSergey Temerkhanov2016-01-19-0/+395
| | | | | | | | | This commit adds the FDT for the ThunderX family of SoCs Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* armv8: Add psci.h from the Linux kernelSergey Temerkhanov2016-01-19-0/+90
| | | | | | | | | This commit adds the psci.h header file from Linux kernel which contains definitions related to the PSCI interface provided by firmware Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
* armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructureSergey Temerkhanov2016-01-19-0/+97
| | | | | | | | | | | | | | | | | This commit adds functions issuing calls to secure monitor or hypervisore. This allows using services such as Power State Coordination Interface (PSCI) provided by firmware, e.g. ARM Trusted Firmware (ATF) The SMC call can destroy all registers declared temporary by the calling conventions. The clobber list is "x0..x17" because of this Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
* armv8: New MMU setup code allowing to use 48+ bits PA/VASergey Temerkhanov2016-01-19-12/+228
| | | | | | | | | | | | | This patch adds code which sets up 2-level page tables on ARM64 thus extending available VA space. CPUs implementing 64k translation granule are able to use direct PA-VA mapping of the whole 48 bit address space. It also adds the ability to reset the SCTRL register at the very beginning of execution to avoid interference from stale mappings set up by early firmware/loaders/etc. Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
* armv8: Add read_mpidr() functionSergey Temerkhanov2016-01-19-0/+11
| | | | | | | | | | This patch adds the read_mpidr() function which returns the MPIDR_EL1 register value Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* arm: serial: Add Kconfig entries to facilitate usage of the pl01x driver for ↵Sergey Temerkhanov2016-01-19-0/+22
| | | | | | | | | | | | early debug output This patch adds Kconfig entries to facilitate usage of pl01x as a debug UART. Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Acked-by: Simon Glass <sjg@chromium.org>
* arm: serial: Add debug UART capability to the pl01x driverSergey Temerkhanov2016-01-19-0/+28
| | | | | | | | | | | This patch adds an ability to use pl01x as a debug UART. It must be configured like other types of debug UARTs Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> [trini: Update for _debug_uart_init change] Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2016-01-19-26/+26
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| * video: Typo cleanup in drivers/video/da8xx-fb.cRobert P. J. Day2015-12-16-5/+5
| | | | | | | | Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
| * video: Clean up formatting, spelling mistakes in exynos_dp*Robert P. J. Day2015-12-16-21/+21
| | | | | | | | | | | | Aesthetic cleanup in drivers/video/exynos_dp*.[ch] files. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* | x86: quark: Fix boot breakageBin Meng2016-01-19-11/+16
| | | | | | | | | | | | | | | | | | With driver model timer conversion, quark based board does not boot any more as mdelay() is called during quark_pcie_early_init() which is before driver model gets initialized. Fix this breakage. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | power: regulator: max77686: Don't use switch() on boolsTom Rini2016-01-19-20/+8
| | | | | | | | | | | | | | | | | | | | | | With gcc-5.3 we get a warning for using switch() on a bool type. Rewrite these sections as if/else and update the one section that was using 1/0 instead of true/false. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
* | spi: rk_spi: Fix debug format warningTom Rini2016-01-19-1/+1
| | | | | | | | | | | | | | We need to use %lx not %x to describe a fdt_addr_t Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* | pci_rom.c: Fix may be used uninitialized warningTom Rini2016-01-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With gcc-5.x we get: drivers/pci/pci_rom.c: In function 'dm_pci_run_vga_bios': drivers/pci/pci_rom.c:352:3: warning: 'ram' may be used uninitialized in this function [-Wmaybe-uninitialized] While unconvinced that this can happen in practice (if we malloc we set alloced to true, it will be false otherwise), silence the compiler. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Add more SPDX-License-Identifier tagsTom Rini2016-01-19-1733/+182
| | | | | | | | | | | | | | | | | | In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
* | scripts/Makefile* Add SPDX-License-Identifier tagTom Rini2016-01-19-0/+20
| | | | | | | | | | | | | | A general best practice for SPDX is that Makefiles should have an identifier, add these as everything else is currently covered. Signed-off-by: Tom Rini <trini@konsulko.com>
* | gunzip.c: Only include gzwrite on CONFIG_CMD_UNZIPTom Rini2016-01-19-0/+2
| | | | | | | | | | | | | | | | | | Only when we have CONFIG_CMD_UNZIP enabled do we have the 'gzwrite' command. While this command should be separated from CONFIG_CMD_UNZIP we should also only include the write portion of the gz code in that case as well. Signed-off-by: Tom Rini <trini@konsulko.com>
* | axm/taurus: Enable tiny printf in SPLTom Rini2016-01-19-0/+2
| | | | | | | | | | | | | | Both of these boards are very close to their limit and with some toolchains such as gcc 5.x are too large. Switch to tiny printf to reclaim some size. Signed-off-by: Tom Rini <trini@konsulko.com>
* | vsprintf.c: Always enable CONFIG_SYS_VSNPRINTFTom Rini2016-01-19-51/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enabling this function always removes some class of string saftey issues. The size change here in general is about 400 bytes and this seems a reasonable trade-off. Cc: Peng Fan <peng.fan@nxp.com> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Adrian Alonso <aalonso@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* | image: fix getenv_bootm_size() functionMasahiro Yamada2016-01-19-2/+2
| | | | | | | | | | | | | | | | Currently, this function returns wrong size if "bootm_low" is defined, but "bootm_size" is not. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-01-16-1026/+2396
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| * | MIPS: implement bit manipulating I/O accessorsDaniel Schwierzeck2016-01-16-0/+55
| | | | | | | | | | | | | | | | | | | | | Add support for functions clrbits_X(), setbits_X() and clrsetbits_X() on MIPS. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: fix SPDX license identifier in remaining arch header filesDaniel Schwierzeck2016-01-16-55/+32
| | | | | | | | | | | | | | | | | | | | | Add a SPDX license identifier to MIPS header files where it is still missing. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: sync processor and register definitions with linux-4.4Daniel Schwierzeck2016-01-16-553/+1211
| | | | | | | | | | | | | | | | | | | | | Update definitions for processor, registers as well as assemby macros. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: sync I/O related header files with linux-4.4Daniel Schwierzeck2016-01-16-364/+941
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mainly sync asm/io.h to get a working ioremap() implementation as well as the full set of I/O accessors. Pull in additional header files to make this work. Furthermore port over the directory 'arch/mips/include/asm/mach-generic/' with contains default definitions for I/O and memory spaces and default implementations for mapping those spaces. All files in that directory can be overwritten by a SoC/machine. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | net: pcnet: refactor mapping of virtual addresses to physical onesDaniel Schwierzeck2016-01-16-7/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci_virt_to_mem() uses virt_to_phys() to get the physical address. But pci_virt_to_mem() is also called with uncached addresses which is wrong according to the documentation of virt_to_phys(). Refactor the PCI_TO_MEM() macro to optionally map an uncached address back to a cached one before calling pci_virt_to_mem(). Currently pcnet works because virt_to_phys() is incorrectly implemented on MIPS. With the upcoming asm header file update for MIPS, the virt_to_phys() implementation will be fixed. Thus this patch is needed to keep pcnet working on MIPS Malta board. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: kconfig: add option for MIPS_L1_CACHE_SHIFTDaniel Schwierzeck2016-01-16-10/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Kconfig symbol for L1 cache shift like the kernel does. The value of CONFIG_SYS_CACHELINE_SIZE is not a reliable source for ARCH_DMA_MINALIGN anymore, because it is optional on MIPS. If CONFIG_SYS_CACHELINE_SIZE is not defined by a board, the cache sizes are automatically detected and ARCH_DMA_MINALIGN would be set to 128 Bytes. The default value for CONFIG_MIPS_L1_CACHE_SHIFT is 5 which corresponds to 32 Bytes. All current MIPS boards already used that value. While on it, fix the Malta board to use a value of 6 like the kernel port does. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: vct: fix I/O accessor callsDaniel Schwierzeck2016-01-16-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | Use void pointers as address argument for readl( and writel()). This is required for the upcoming MIPS asm header file and I/O accessor update. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: malta: fix IO accessor callDaniel Schwierzeck2016-01-16-1/+2
| | | | | | | | | | | | | | | | | | | | | Use void pointer as address argument for readl(). This is required for the upcoming MIPS asm header file and I/O accessor update. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: malta: do not pull in target header files in config.hDaniel Schwierzeck2016-01-16-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | config.h is used in target and host code and therefore should not pull in target header files to avoid compile errors. This change is also required for the MIPS header file sync done in follow-up patches. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: Kconfig: optimize gcc -march and -mtune setupDaniel Schwierzeck2016-01-16-15/+24
| | | | | | | | | | | | | | | | | | | | | | | | Move setup of -march to arch/mips/Makefile and follow the design on ARM. Also add a possibility to chose specific CPU tune options. Signed-off-by: Wills Wang <wills.wang@live.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: au1x00: move SoC header files to arch/mips/mach-au1x00/include/mach/Daniel Schwierzeck2016-01-16-7/+7
| | | | | | | | | | | | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: Kconfig: refactor machine setupDaniel Schwierzeck2016-01-16-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | Refactor machine setup like it is done on ARM. While on it, also support "include <mach/file.h" for machine specific header files. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: add initial infrastructure for device-tree filesDaniel Schwierzeck2016-01-16-1/+44
| | | | | | | | | | | | | | | | | | | | | | | | Prepare sub-folder for device-tree files. Make support for device-tree on MIPS available in Kbuild/Kconfig. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
| * | MIPS: do not build position-independent executables for SPLDaniel Schwierzeck2016-01-16-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | SPL binaries are usually linked to a fixed address in SRAM. Furthermore SPL binaries do not need to relocate itself. Thus do not build them as position-independent binaries which helps to largely reduce the size of SPL binaries. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: create .text sub-sections for assembler functionsDaniel Schwierzeck2016-01-16-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | Put all functions coded in assembly in sub-sections of section .text. This allows the linker to garbage collect unused assembly functions too. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: fix annotation of _start and relocate_codeDaniel Schwierzeck2016-01-16-7/+11
| | | | | | | | | | | | | | | | | | | | | Correctly annotate _start and relocate_code as functions to produce more readable disassembly code generated by objdump. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIO.Purna Chandra Mandal2016-01-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With CONFIG_CMD_GPIO compilation reports error. common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory #include <asm/gpio.h> ^ Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Chin Liang See <clsee@altera.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-01-16-32/+47
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| * | | socfpga: Modify qts-filter args to allow input for bsp generated files and ↵Dalon Westergreen2016-01-16-31/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | quartus project directories The hps_isw_handoff and bsp/generated folders are typically not in the same path.This patch adds support for specifying the different input directories for the bsp and quartus projects. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Chin Liang See <clsee@altera.com>
| * | | arm: socfpga: set the fpga global bit to disable HPS to FPGA signalsDinh Nguyen2016-01-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We should be setting the FPGA Interface Group global bit that will correctly disable all interfaces between the FPGA and HPS. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | | ddr: altera: Init the rule ID in debug codeMarek Vasut2016-01-16-0/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Init the rule ID, otherwise the debug code will always dump the protection settings entry 0. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com>
* | | common: usb: fix checking conditionPeng Fan2016-01-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We support max USB_MAXENDPOINTS, so need to use "epno >= USB_MAXENDPOINTS", but not "epno > USB_MAXENDPOINTS". If use ">", we may exceeds the array of if_desc->ep_desc. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Marek Vasut <marex@denx.de> Cc: Paul Kocialkowski <contact@paulk.fr> Cc: "Stefan Brüns" <stefan.bruens@rwth-aachen.de> Cc: Vincent Palatin <vpalatin@chromium.org>
* | | usb: host: ehci-vf: Implement board_usb_phy_mode weak functionSanchayan Maity2016-01-16-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add board_usb_phy_mode weak function on similar lines to ehci-mx6. However since Vybrid USB does not have a true OTG, make this weak functon just return 0. The function is supposed to be implemented by the individual boards using a GPIO for providing the OTG pin functionality. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
* | | usb: host: ehci-vf: Remove hardcoded USB host client configurationSanchayan Maity2016-01-16-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | The current ehci-vf USB driver for Vybrid hardcodes the USB host and client functionality. Remove this. Reported-by: Santhosh Kumar Janardhanam <santhosh.kj@hcl.com> Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
* | | usb:ci_udc: Remove ULPI setting for i.MX OTG controllerYe.Li2016-01-16-11/+3
|/ / | | | | | | | | | | | | | | | | All the i.MX6, i.MX23 and i.MX28 OTG controllers only support UTMI interface. Set to ULPI is not correct, even the controller will reject this setting in PORTSC register. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit v1.1 at 2024-08-27 14:50:08 +0000