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* Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2015-12-17-311/+380
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| * usb: kbd: don't use int xfers when polling via ctrl xfersStephen Warren2015-12-17-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is enabled, use a GET_REPORT control transfer to retrieve the initial state of the keyboard. This matches the technique used to poll the keyboard state. This is useful since it eliminates the remaining use of interrupt transfers from the USB keyboard driver, which allows it to work with USB HCD that don't support interrupt transfers. Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * usb: add support of generic OHCI devicesAlexey Brodkin2015-12-17-0/+54
| | | | | | | | | | | | | | | | | | | | | | This driver is meant to be used with any OHCI-compatible host controller in case if there's no need for platform-specific glue such as setup of controller or PHY's power mode via GPIOs etc. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Marek Vasut <marex@denx.de>
| * usb: host: ehci: samsung: Move hcor initialization after usb phy setupLukasz Majewski2015-12-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | With the old order of initialization the hcor pointer has been setup to the same address as Exynos EHCI base address (0x12110000 instead of 0x12110010). Such behaviour was caused by reading value of 0 instead of 0x10 from EHCI HCCPBASE register without doing proper clock initialization before. To fix this problem hcor initialization has been moved after USB PHY setup. Now ehci_readl(&ctx->hcd->cr_capbase) returns correct value. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
| * usb: s3c-otg: Rename usb/s3c_udc.h to usb/dwc2_udc.hMarek Vasut2015-12-17-18/+18
| | | | | | | | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the global s3c_udc.h header to dwc2_udc.h. The rename is done automatically: $ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \ `git grep "s3c_udc\.h" | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename s3c_udc_probe() functionMarek Vasut2015-12-17-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch is the second and final to rename global symbol, the s3c_udc_probe() function. The rename is done automatically: $ sed -i "s/s3c_udc_probe/dwc2_udc_probe/g" \ `git grep s3c_udc_probe | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_plat_otg_dataMarek Vasut2015-12-17-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch is the first to rename global symbol, the struct s3c_plat_otg_data. The rename is done automatically: $ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \ `git grep s3c_plat_otg_data | cut -d : -f 1` Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename USB_GADGET_S3C_UDC_OTG* to USB_GADGET_DWC2_OTG*Marek Vasut2015-12-17-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | The s3c-otg IP block is in fact a DWC2 OTG one, so finally rename the config option to make it less misleading. No functional change, just a mechanical change done using the following script: git grep USB_GADGET_S3C_UDC_OTG | cut -d : -f 1 | sort -u | \ while read line ; do sed -i "s/USB_GADGET_S3C_UDC_OTG/USB_GADGET_DWC2_OTG/g" $line ; done Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Tweak the commentsMarek Vasut2015-12-17-5/+5
| | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. Tweak the comments in the driver to reflect this fact. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename remaining macrosMarek Vasut2015-12-17-22/+22
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the remaining S3C_* macros to match the DWC2 naming. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename sources to dwc2_*cMarek Vasut2015-12-17-6/+6
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the local source files to dwc2_*c and adjusts the Makefile to use the new names. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename local headers to dwc2_*hMarek Vasut2015-12-17-8/+8
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the local header files to dwc2_*h and adjusts the sources to use the new names. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Change the driver name to dwc2-udcMarek Vasut2015-12-17-3/+3
| | | | | | | | | | | | Just change the driver name. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Zap useless externsMarek Vasut2015-12-17-5/+3
| | | | | | | | | | | | | | The extern statements are useless, remove them. Also remove the extern ... controller, which is completely useless. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename remaining local s3c_*() functionsMarek Vasut2015-12-17-23/+23
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the remaining local s3c_*() functions to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename s3c_udc_*() functionsMarek Vasut2015-12-17-47/+47
| | | | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the s3c_ep_*() functions to reflect this. The function s3c_udc_probe() is a special case and is not renamed by this patch yet. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename s3c_ep_*() functionsMarek Vasut2015-12-17-11/+11
| | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the s3c_ep_*() functions to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename s3c_ep0_*() functionsMarek Vasut2015-12-17-14/+14
| | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames the s3c_ep0_*() functions to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Staticize functions in s3c_udc_otg_xfer_dma.cMarek Vasut2015-12-17-7/+7
| | | | | | | | | | | | Just staticize the functions, they are not used outside of the file. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Staticize s3c_udc_ep_set_stallMarek Vasut2015-12-17-3/+1
| | | | | | | | | | | | This function is local to s3c_udc_otg_xfer_dma.c , staticize it. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_requestMarek Vasut2015-12-17-28/+28
| | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_request to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_epMarek Vasut2015-12-17-46/+46
| | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_ep to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_dev_*_epMarek Vasut2015-12-17-4/+4
| | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_dev_*_ep to reflect this. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_usbotg_phy to dwc2_usbotg_phyMarek Vasut2015-12-17-5/+5
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_usbotg_phy to struct dwc2_usbotg_phy to make things more obvious and clear. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Split private bits from s3c_udc.hMarek Vasut2015-12-17-92/+108
| | | | | | | | | | | | | | | | | | Most of the functions are local to the s3c_udc driver, remove them from the s3c_udc.h header to stop those bits from propagating all over the place. Instead, move all the private stuff into new private s3c_udc_otg_priv.h header. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_usbotg_reg to dwc2_usbotg_regMarek Vasut2015-12-17-3/+3
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_usbotg_reg to struct dwc2_usbotg_reg to make things more obvious and clear. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename struct s3c_udc to dwc2_udcMarek Vasut2015-12-17-51/+51
| | | | | | | | | | | | | | | | The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_udc to struct dwc2_udc to make things more obvious and clear. Signed-off-by: Marek Vasut <marex@denx.de>
| * usb: s3c-otg: Rename regs-otg.h to s3c_udc_otg_regs.hMarek Vasut2015-12-17-2/+2
| | | | | | | | | | | | | | Rename the header file, so it's obvious which driver it's part of. No functional change. Signed-off-by: Marek Vasut <marex@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-12-17-30/+32
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| * | net: fm: disables unused FM1-DTSEC1 MAC node in DTSShaohui Xie2015-12-17-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't disable unused FM1-DTSEC1 MAC node in FMAN v2 since it is used by MDIO. For FMAN v3, MDIO uses dedicated controller, so we can disable unused FM1-DTSEC1 MAC node to avoid being probed in Linux. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> [York Sun: revised commit message] Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8/ls1043aqds/rcw: change core frequency to 1600MHzMingkai Hu2015-12-17-4/+4
| | | | | | | | | | | | | | | | | | | | | Change RCW for SD boot and NAND boot. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8/ls1043ardb/rcw: change core frequency to 1600MHzMingkai Hu2015-12-17-4/+4
| | | | | | | | | | | | | | | | | | | | | Change RCW for SD boot and NAND boot. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8/ls1043a: Implement workaround for PEX erratum A009929Mingkai Hu2015-12-17-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | Consecutive write transactions from core to PCI express outbound path hangs after 25 to 30 transactions depending on core freq. This erratum enable the mbist clock through COP register setting. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8/fsl_lsch2: fix DCSR_DCFG addressMingkai Hu2015-12-17-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | armv8/ls1043a: remove print infoMingkai Hu2015-12-17-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | Remove verbose message for FMan port. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> [York Sun: Added commit message] Reviewed-by: York Sun <yorksun@freescale.com>
| * | driver: net: fsl-mc: remove MC firmware version checkStuart Yoder2015-12-17-13/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MC version numbers provide no meaningful information about binary interface compatibility, so remove the check which refuses to start the MC unless a specific version is found. Version checking is supposed to be done at the individual object level, and individual drivers are responsible for their own version checking. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Acked-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2015-12-16-279/+483
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| * rockchip: Add basic support for kylin boardhuang lin2015-12-13-0/+113
| | | | | | | | | | | | | | | | | | kylin board use rk3036 SOC, 512M sdram, 8G emmc. This add some basic files required to allow the board to output serial message and can run command(mmc info etc). Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rk3036 sdram setting cs1_row when rank larger than 1huang lin2015-12-13-1/+5
| | | | | | | | | | | | | | | | only rank large than 1, we will use cs1_row, so check rank, when rank larger than 1, we set the cs1_row. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: firefly: Use tiny-printfSjoerd Simons2015-12-13-0/+1
| | | | | | | | | | | | | | | | Switch to using tiny-printf for the firefly SPL, this reduces the SPL by around 1800 bytes bringing it back under the 32k limit for both gcc 4.9 and gcc 5. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
| * mmc: mmc: Don't use sprintf when using tiny-printfSjoerd Simons2015-12-13-1/+3
| | | | | | | | | | | | | | There is no sprintf implementation in tiny-printf, so don't try to use it when tiny-printf if used. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
| * lib: split out strtoxxxx functions out of vsprintf.cSjoerd Simons2015-12-13-167/+177
| | | | | | | | | | | | | | | | To allow the various string to number conversion functions to be used when using tiny-printf,split them out into their own file which gets build regardless of what printf implementation is used. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
| * lib: Split panic functions out of vsprintf.cSjoerd Simons2015-12-13-32/+48
| | | | | | | | | | | | | | | | To allow panic and panic_str to still be used when using tiny-printf, split them out into their own file which gets build regardless of what printf implementation is used. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
| * lib/tiny-printf.c: Implement vprintfSjoerd Simons2015-12-13-5/+13
| | | | | | | | | | | | | | Implement both printf and vprintf for a bit more flexibility, e.g. allows the panic() function to work with tiny-printf. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
| * spl: use panic_str instead of panicSjoerd Simons2015-12-13-1/+1
| | | | | | | | | | | | | | | | For a simple static string, use panic_str() which prevents calling printf needlessly. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Simon Glass <sjg@chromium.org>
| * rockchip: doc: add imagenameJeffy Chen2015-12-13-4/+4
| | | | | | | | | | | | | | We now using imagename to select rockchip's spl hdr & spl size. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: mkimage: use imagename to select spl hdr & spl sizeJeffy Chen2015-12-13-38/+120
| | | | | | | | | | | | | | | | Our chips may have different spl size and spl header, so use imagename(passed by "mkimage -n") to select them now. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * Revert "rockchip: Add max spl size & spl header configs"Jeffy Chen2015-12-13-40/+8
| | | | | | | | | | | | | | This reverts commit 10b4615f9d7e177ec7fe644fbb2616e0e0956f6e Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | eeprom: fix eeprom write procedureAlexey Brodkin2015-12-16-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes commit 1a37889b0ad084a740b4f785031d7ae9955d947b: ----------------------->8-------------------- eeprom: Pull out the RW loop Unify the code for doing read/write into single function, since the code for both the read and write is almost identical. This again trims down the code duplication. ----------------------->8-------------------- where the same one routine is utilized for both EEPROM writing and reading. The only difference was supposed to be a "read" flag which in both cases was set with 1 somehow. That lead to a missing delay in case of writing which lead to write failure (in my case no data was written). Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Cc: Heiko Schocher <hs@denx.de>
* | Revert "include/linux: move typdef for uintptr_t"York Sun2015-12-16-1/+3
| | | | | | | | | | | | | | | | This reverts commit e8f954a756a825130d11b9c8fca70101dd8b3ac5, which causes compiling errors on 32-bit hosts. Acked-by: Aneesh Bansal <aneesh.bansal@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
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