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| * mx6_common: Fix LOADADDR and SYS_TEXT_BASE for MX6SL and MX6SXFabio Estevam2015-06-08-8/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8183058188cd2d942 ("imx6: centralise common boot options in mx6_common.h") broke boot on mx6sl and mx6sx by assuming that all mx6 SoCs use the same LOADADDR/SYS_TEXT_BASE range, which is not correct. DDR on mx6sx/mx6sl starts at 0x80000000. Adjust LOADADDR/SYS_TEXT_BASE to the proper values for mx6sx/mx6sl, so that these SoCs can boot again. Also, TQMA6 requires a custom CONFIG_SYS_TEXT_BASE value, so move its setting prior to the inclusion of mx6_common.h. Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
| * wandboard: Add board revision detection supportFabio Estevam2015-06-08-3/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | There are two revisions of wandboard: version B1 and C1. Add the revision detection support, so that the correct dtb file can be automatically loaded. Based on the patch from Richard Hu <hakahu@gmail.com>. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Tested-By: Vagrant Cascadian <vagrant@aikidev.net>
| * arm: mx6: tqma6: use default CONFIG_SYS_PBSIZEMarkus Niebel2015-06-01-4/+0
| | | | | | | | | | | | | | | | | | this removes a config entry and uses the default value defined in config_fallbacks.h. This implements the same behaviour as a patch series for other i.MX6 boards from Freescale Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
| * arm: mx6: tqma6: fix spelling error in conditionMarkus Niebel2015-06-01-2/+2
| | | | | | | | Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
| * imx: ventana: skip mtdparts fixup if no flashTim Harvey2015-06-01-3/+5
| | | | | | | | | | | | This avoids an error message on NAND-less boards. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: hang if board model could not be determinedTim Harvey2015-06-01-4/+2
| | | | | | | | | | | | | | | | If the EEPROM could not be read or is corrupt we always want to hang. Note that an error message will have been displayed by read_eeprom in this case. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: make fdt_file1 and fdt_file2 automatic and non-overridableTim Harvey2015-06-01-8/+4
| | | | | | | | | | | | | | | | | | The fdt_file1 and fdt_file2 vars provide fallbacks for the fdt file loading script. There is no need to allow the user to override these as if they want to specify the fdt, they should do so in the first attempt which is the fdt_file var. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: make model env var automatic and non-overridableTim Harvey2015-06-01-6/+1
| | | | | | | | | | | | | | We want to model env var to always reflect what was in the EEPROM. There is no point in allowing a user to override this. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * imx: ventana: various board-specific GPIO config updatesTim Harvey2015-06-01-30/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | - Added iomux for CAN_STBY and RS484_TEN (GW52xx/GW53xx/GW54xx/GW551x) - Moved iomux of USBHUB_RST# out of board_ehci_hcd_init so that it is done regardless of USB being initialized in bootloader - Added usb_sel iomux/hwconfig for GW552x - Fixed mezzanine DIO for GW54xx - Fixed PANLEDR# for GW54xx - Fixed dio iomux/hwconfig for GW552x - Fixed dio iomux for GW551x - removed redundant #define Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * mxs: Do not disable bo detection when DC-DC is already enabledStefan Wahren2015-06-01-5/+5
| | | | | | | | | | | | | | | | | | In case the DC-DC is already enabled mxs_enable_4p2_dcdc_input() returns without reenabling brown out detection. So fix this issue by moving the return before brown out deactivation. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Marek Vasut <marex@denx.de>
| * warp: Fix the 'saveenv' commandFabio Estevam2015-05-28-1/+1
| | | | | | | | | | | | | | | | | | After the mx6 config consolidation, 'save' command is no longer recognized. Pass the full command name 'saveenv' instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * warp: Add fuse command supportFabio Estevam2015-05-28-0/+4
| | | | | | | | | | | | Select the fuse command support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * warp: Enable CONFIG_SUPPORT_EMMC_BOOTFabio Estevam2015-05-28-0/+1
| | | | | | | | | | | | | | CONFIG_SUPPORT_EMMC_BOOT is important to enable the boot partition via 'mmc partconf 0 1 1 0' command, for example. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * warp: Fix CONFIG_SYS_FSL_ESDHC_ADDRFabio Estevam2015-05-28-1/+1
| | | | | | | | | | | | | | Warp uses eMMC connected to esdhc2 port, so fix CONFIG_SYS_FSL_ESDHC_ADDR to reflect that. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * warp: Adjust CONFIG_SYS_DFU_DATA_BUF_SIZEFabio Estevam2015-05-28-1/+1
| | | | | | | | | | | | | | | | | | Adjust CONFIG_SYS_DFU_DATA_BUF_SIZE in order to avoid the following error when running the dfu command: => dfu 0 mmc 0 dfu_get_buf: Could not memalign 0x2000000 bytes Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * pci: imx: display message if no pcie linkTim Harvey2015-05-28-1/+3
| | | | | | | | | | | | | | If CONFIG_PCI_SCAN_SHOW enabled then lets print a message of no link was detected. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * Revert "imx: drop warning: unused variable 'max_freq'"Stefano Babic2015-05-28-2/+1
| | | | | | | | | | | | This reverts commit a0117a5e416629932becf079589f5e1859eab90a. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * imx: drop warning: unused variable 'max_freq'Stefano Babic2015-05-27-1/+2
| | | | | | | | | | | | | | max_freq in print_cpuinfo is used only with imx6. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | image-fit: Fix compiler warning in fit_conf_print()Hans de Goede2015-06-06-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | This fixes the following compiler warning: In file included from tools/common/image-fit.c:1:0: ./tools/../common/image-fit.c: In function ‘fit_conf_print’: ./tools/../common/image-fit.c:1470:27: warning: logical not is only applied to the left hand side of comparison [-Wlogical-not-parentheses] (const char **)&uname) > 0; Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | Merge git://git.denx.de/u-boot-sunxiTom Rini2015-06-06-1229/+1837
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| * | sunxi: Select CONFIG_CMD_NET and CONFIG_CMD_SETEXPR by defaultHans de Goede2015-06-05-116/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Select CONFIG_CMD_NET and CONFIG_CMD_SETEXPR by default rather then needing to have this in every sunxi defconfig file. This also fixes the Merrii_A80_Optimus defconfig no longer building. Cc: Maxin B. John <maxin.john@enea.com> Reported-by: Maxin B. John <maxin.john@enea.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Add a proper dts file for the ga10h a33 based tabletHans de Goede2015-06-05-1/+127
| | | | | | | | | | | | | | | | | | | | | | | | Add and use a proper dts for the ga10h a33 based tablet, as submitted upstream. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Rename Astar_MID756 to Et_q8_v1_6 to match kernel dts nameHans de Goede2015-06-04-5/+5
| | | | | | | | | | | | | | | | | | | | | Rename the Astar_MID756 to Et_q8_v1_6 to match the kernel dts name. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Sync dts files with the linux kernelHans de Goede2015-06-04-1103/+1507
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Copy over all the latest dts changes from mripard/sunxi/dt-for-4.2 , this gives us a proper dtsi file for the A33 rather then abusing sun8i-a23.dtsi for this. And this replaces our minimal (dummy) sun7i-a20-mk808c and sun8i-a33-astar-mid756 dts files with proper ones. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: gpio: Add "allwinner,sun8i-a33-pinctrl"Hans de Goede2015-06-04-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add "allwinner,sun8i-a33-pinctrl", this is used by the latest upstream linux sunxi dts files. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Add new Mele_A1000G_quad defconfigHans de Goede2015-06-04-0/+185
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Mele A1000G-quad and the Mele M9 have the same PCB, sofar we've been using the same defconfig (and dts on the kernel side) for both models. Unfortunately this does not work for the otg controller, on the M9 this is routed to a micro-usb connector on the outside, while as on the A1000G-quad it is connected to an usb to sata bridge. This commit adds a new defconfig for the Mele-A1000G-quad to allow using different otg controller settings on the 2 boards. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: usb_phy: Swap check for disconnect thresholdHans de Goede2015-06-04-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit the code for determining the disconnect threshold was checking for sun4i or sun6i assuming that those where the exception and that newer SoCs use a disconnect threshold of 2 like sun7i does. But it turns out that newer SoCs actually use a disconnect threshold of 3 and sun5i and sun7i are the exceptions, so check for those instead. Here are the settings from the various Allwinner SDK sources: sun4i-a10: USBC_Phy_Write(usbc_no, 0x2a, 3, 2); sun5i-a13: USBC_Phy_Write(usbc_no, 0x2a, 2, 2); sun6i-a31: USBC_Phy_Write(usbc_no, 0x2a, 3, 2); sun7i-a20: USBC_Phy_Write(usbc_no, 0x2a, 2, 2); sun8i-a23: USBC_Phy_Write(usbc_no, 0x2a, 3, 2); sun8i-h3: USBC_Phy_Write(usbc_no, 0x2a, 3, 2); sun9i-a80: USBC_Phy_Write(usbc_no, 0x2a, 3, 2); Note this commit makes no functional changes for sun4i - sun7i, and changes the disconnect threshold for sun8i to match what Allwinner uses. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: mmc: Enable pull-up on card-detect gpio pinHans de Goede2015-06-04-1/+3
| | | | | | | | | | | | | | | | | | | | | On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | Merge git://git.denx.de/u-boot-fdtTom Rini2015-06-05-0/+60
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| * | | fdt: Documentation for a few support functions aside their prototypesPaul Kocialkowski2015-06-05-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This instroduces comments that explain the purpose, parameters and return codes of a few fdt support functions, that are used to fill the fdt. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Simon Glass <sjg@chromium.org>
| * | | fdt: Pass the device serial number through devicetreePaul Kocialkowski2015-06-05-0/+34
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before device-tree, the device serial number used to be passed to the kernel using ATAGs (on ARM). This is now deprecated and all the handover to the kernel should now be done using device-tree. Thus, this passes the serial-number property to the kernel using the serial-number property of the root node, as expected by the kernel. The serial number is a string that somewhat represents the device's serial number. It might come from some form of storage (e.g. an eeprom) and be programmed at factory-time by the manufacturer or come from identification bits available in e.g. the SoC. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Simon Glass <sgj@chromium.org>
* | | Merge git://git.denx.de/u-boot-dmTom Rini2015-06-05-93/+135
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| * | | gpio: fix typos in GPIO headerMasahiro Yamada2015-06-04-8/+8
| | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * | | sandbox: Compile test device tree when CONFIG_UT_DM is definedSimon Glass2015-06-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A conflict between the PMIC and unit test work means that the sandbox test device tree file is no-longer built. Fix this. Series-to: u-boot Series-cc: joe, prz Change-Id: I6616428e05713e5306f848e7dd0a645dedf0934e Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: dts: Add the real-time-clock test nodes back inSimon Glass2015-06-04-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These were lost when the PMIC series was applied. Add them back so that the tests pass again. Reported-by: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | sandbox: dts: Sort the sandbox.dts fileSimon Glass2015-06-04-52/+54
| | | | | | | | | | | | | | | | | | | | | | | | Sort this by node name for easier browsing. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: dts: Sort the test.dts file a littleSimon Glass2015-06-04-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are some core test nodes near the beginning of the file which should be grouped together. But for other nodes, let's sort them. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | dm: Sort the uclass IDs after the tegra/PMIC additionSimon Glass2015-06-04-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tidy up the sort order again. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | dm: pci: Allow PCI bus numbering aliasesSimon Glass2015-06-04-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 9cc36a2 'dm: core: Add a flag to control sequence numbering' changed the default uclass behaviour to not support bus numbering. This is incorrect for PCI and that commit should have enabled the flag for PCI. Enable it so that PCI buses can be found and the 'pci' command works again. Also add a test for this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | sandbox: Tidy up terminal restoreSimon Glass2015-06-04-3/+15
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | For some reason 'u-boot -D' does not restore the terminal correctly when the 'reset' command is used. Call the terminal restore function explicitly in this case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* | | x86: minnowmax: initialize the pin-muxing from device treeGabriel Huau2015-06-04-0/+10
| | | | | | | | | | | | | | | Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: gpio: add pinctrl support from the device treeGabriel Huau2015-06-04-28/+317
| | | | | | | | | | | | | | | | | | | | | | | | | | | Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: baytrail: pci region 3 is not always mapped to end of ramAndrew Bradford2015-06-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Baytrail physically maps the first 2 GB of SDRAM from 0x0 to 0x7FFFFFFF and additional SDRAM is mapped from 0x100000000 and up. There is a physical memory hole from 0x80000000 to 0xFFFFFFFF for other uses. Because of this, PCI region 3 should only try to use up to the amount of SDRAM or 0x80000000, which ever is less. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: qemu: Implement PIRQ routingBin Meng2015-06-04-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | Support QEMU PIRQ routing via device tree on both i440fx and q35 platforms. With this commit, Linux booting on QEMU from U-Boot has working ATA/SATA, USB and ethernet. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: coreboot: Control I/O port 0xb2 writing via device treeBin Meng2015-06-04-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Writing 0xcb to I/O port 0xb2 (Advanced Power Management Control) causes U-Boot to hang on QEMU q35 target. We introduce a config option in the device tree "u-boot,no-apm-finalize" under /config node if we don't want to do that. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: qemu: Create separate i440fx and q35 device treesBin Meng2015-06-04-6/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Although the two qemu-x86 targets (i440fx and q35) share a lot in common, they still have something that cannot easily handled in one single device tree). Split to create two dedicated device tree files and make the i440fx be the default build target. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: coreboot: Fix cosmetic issuesBin Meng2015-06-04-25/+3
| | | | | | | | | | | | | | | | | | | | | Clean up arch/x86/cpu/coreboot.c to fix several cosmetic issues. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: kconfig: Make FSP_TEMP_RAM_ADDR depend on HAVE_FSPBin Meng2015-06-04-0/+1
| | | | | | | | | | | | | | | | | | | | | FSP_TEMP_RAM_ADDR should only be visible when HAVE_FSP is on. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | tools: ifdtool: Do not write region while its size is negativeBin Meng2015-06-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | We should ignore those regions whose size is negative. These are typically optional and unused regions (like GbE and platform data). Change-Id: I65ad01746144604a1dc0588b617af21f2722ebbf Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | x86: qemu: Adjust VGA initializationBin Meng2015-06-04-19/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As VGA option rom needs to run at C segment, although QEMU PAM emulation seems to only guard E/F segments, for correctness, move VGA initialization after PAM decode C/D/E/F segments. Also since we already tested QEMU targets to differentiate I440FX and Q35 platforms, change to locate the VGA device via hardcoded b.d.f instead of dynamic search for its vendor id & device id pair. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-07-17 01:47:47 +0000