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* board/ti/am335x: beaglebone stop muxing i2c1_pin_muxrobertcnelson@gmail.com2015-11-12-2/+0
| | | | | | | | | | | On the BeagleBone these i2c1 pins are routed to the expanasion header, where they can be defined as either pr1_usart0_Xxd/pwm0/spi0/i2c1, dont assume i2c1 Fixes: https://e2e.ti.com/support/arm/sitara_arm/f/791/p/313894/1387696 Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Reported-by: Matthijs van Duin <matthijsvanduin@gmail.com> CC: Tom Rini <trini@konsulko.com>
* sunxi: cubietruck: Enable the USB OTG controllerMaxime Ripard2015-11-12-0/+5
| | | | | | | | | | The Cubietruck has a mini-USB connector that can be used to power up the board and as an OTG connector. Since we have already some USB host-only ports right beside this one, enable it in gadget mode Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* sunxi: A13-Olinuxino: Enable the USB OTG controllerMaxime Ripard2015-11-12-0/+3
| | | | | | | | | | The A13-Olinuxino has a mini-USB connector that can be used to power up the board and as an OTG connector. Since we have already some USB host-only ports right beside this one, enable it in gadget mode Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* sparse: Rename the file and headerMaxime Ripard2015-11-12-4/+4
| | | | | | | | | | | | The Android sparse image format is currently supported through a file called aboot, which isn't really such a great name, since the sparse image format is only used for transferring data with fastboot. Rename the file and header to a file called "sparse", which also makes it consistent with the header defining the image structures. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* fastboot: nand: Add pre erase and write hooksMaxime Ripard2015-11-12-0/+18
| | | | | | | | | | | Some devices might need to do some per-partition initialization (ECC/Randomizer settings change for example) before actually accessing it. Add some hooks before the write and erase operations to let the boards define what they need to do if needed. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* fastboot: Implement NAND backendMaxime Ripard2015-11-12-1/+223
| | | | | | | | | So far the fastboot code was only supporting MMC-backed devices for its flashing operations (flash and erase). Add a storage backend for NAND-backed devices. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* sparse: Implement several chunks flashingMaxime Ripard2015-11-12-2/+15
| | | | | | | | | | | | | | | The fastboot client will split the sparse images into several chunks if the image that it tries to flash is bigger than what the device can handle. In such a case, the bootloader is supposed to retain the last offset to which it wrote to, so that it can resume the writes at the right offset when flashing the next chunk. Retain the last offset we used, and use the session ID to know if we need it or not. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* fastboot: Implement flashing session counterMaxime Ripard2015-11-12-9/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fastboot flash command that writes an image to a partition works in several steps: 1 - Retrieve the maximum size the device can download through the "max-download-size" variable 2 - Retrieve the partition type through the "partition-type:%s" variable, that indicates whether or not the partition needs to be erased (even though the fastboot client has minimal support for that) 3a - If the image is smaller than what the device can handle, send the image and flash it. 3b - If the image is larger than what the device can handle, create a sparse image, and split it in several chunks that would fit. Send the chunk, flash it, repeat until we have no more data to send. However, in the 3b case, the subsequent transfers have no particular identifiers, the protocol just assumes that you would resume the writes where you left it. While doing so works well, it also means that flashing two subsequent images on the same partition (for example because the user made a mistake) would not work withouth flashing another partition or rebooting the board, which is not really intuitive. Since we have always the same pattern, we can however maintain a counter that will be reset every time the client will retrieve max-download-size, and incremented after each buffer will be flashed, that will allow us to tell whether we should simply resume the flashing where we were, or start back at the beginning of the partition. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* sparse: Implement storage abstractionMaxime Ripard2015-11-12-34/+104
| | | | | | | | | | | The current sparse image parser relies heavily on the MMC layer, and doesn't allow any other kind of storage medium to be used. Rework the parser to support any kind of storage medium, as long as there is an implementation for it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* fastboot: Move fastboot response functions to fastboot coreMaxime Ripard2015-11-12-59/+76
| | | | | | | | | | The functions and a few define to generate a fastboot message to be sent back to the host were so far duplicated among the users. Move them all to a common place. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* sparse: Simplify multiple logicMaxime Ripard2015-11-12-4/+10
| | | | | | | | | To check the alignment of the image blocks to the storage blocks, the current code uses a convoluted syntax, while a simple mod also does the work. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* sparse: Refactor chunk parsing functionMaxime Ripard2015-11-12-133/+239
| | | | | | | | | | | | The chunk parsing code was duplicating a lot of code among the various chunk types, while all of them could be covered by generic and simple functions. Refactor the current code to reuse as much code as possible and hopefully make the chunk parsing loop more readable and concise. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* sparse: Move main header parsing to a function of its ownMaxime Ripard2015-11-12-21/+24
| | | | | | | | | | | The current sparse image format parser is quite tangled, with a lot of code duplication. Start refactoring it by moving the header parsing function to a function of its own. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* mtd: uboot: Add meaningful error messageMaxime Ripard2015-11-12-1/+1
| | | | | | | | | | The current error message in get_part if CONFIG_MTDPARTS is disabled is "offset is not a number" which is confusing and doesn't help at all. Change that for something that might give a hint on what's going on. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board/BuR/kwb: use bootvx(...) (with bootline feature) instead go(...)Hannes Petermaier2015-11-12-21/+17
| | | | | | | | | | | | | | | | Since we don't have for sure a valid IP-setup during board_late_init(...) because it maybe allready stored in environment or not, we cannot form a proper vxWorks bootline at this place. So we move to the way, forming the bootline just before executing/launching vxWorks. To do this we use the bootvx command instead go. We only have to form the "othbootargs" environment variable, the rest is done pretty good by the "bootvx" commannd. Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge branch 'next' of git://git.denx.de/u-boot-blackfinTom Rini2015-11-12-6/+0
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| * blackfin: Disable CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED in some casesTom Rini2015-11-04-6/+0
| | | | | | | | | | | | | | | | | | The boards do not link for me due to exceeding their size constrains, change the config so they fit again. Cc: Sonic Zhang <sonic.adi@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* | nios2: add 3c120 and 10m50 devboards MAINTAINERSThomas Chou2015-11-12-0/+13
| | | | | | | | | | | | | | Add 3c120 and 10m50 devboards MAINTAINERS Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
* | nios2: change README.nios2 to use 10m50 as templateThomas Chou2015-11-12-7/+7
| | | | | | | | | | | | | | | | The 10m50 devboard becomes the new golden reference design of Nios II Linux. So change README.nios2 to use 10m50 as template. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
* | nios2: rename board nios2-generic to 3c120_devboardThomas Chou2015-11-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Rename board nios2-generic to 3c120_devboard. Since nios2 is converted to driver model and device tree control of u-boot, the nios2-generic board directory is removed. We can rename the board back to a real board name. Now the boards maintained in u-boot mainline are the same as Linux kernel, namely 3c120 and 10m50. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* | nios2: add 10m50 devboard supportThomas Chou2015-11-12-0/+396
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add 10m50 devboard support. It is based on the Golden Hardware Reference Design (GHRD), available at, http://rocketboards.org/foswiki/view/Documentation/ AlteraMAX1010M50RevCDevelopmentKitLinuxSetup Though we supported only one nios2-generic board in the past. Now, with the removal of the nios2-generic board dir, adding new nios2 boards to u-boot is easier than before. It should be helpful to add those boards supported in Linux mainline. There are only two such nios2 boards, the 3c120 devboard and 10m50 devboard. The nios2-generic is actually 3c120, and should restore the name. The 10m50 is this one. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* | net: altera_tse: add mSG-DMA supportThomas Chou2015-11-12-0/+191
| | | | | | | | | | | | | | | | | | | | | | The Modular Scatter-Gather DMA core is a new DMA core to work with the Altera Triple-Speed Ethernet MegaCore. It replaces the legacy Scatter-Gather Direct Memory Access (SG-DMA) controller core. Please find details on the "Embedded Peripherals IP User Guide" of Altera. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* | net: altera_tse: add priv ops to prepare msgdma supportThomas Chou2015-11-12-25/+81
| | | | | | | | | | | | | | | | Add priv ops to prepare msgdma support. These ops are dma type specific. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* | net: altera_tse: wait sgdma in altera_tse_recvThomas Chou2015-11-12-1/+1
| | | | | | | | | | | | | | | | Move the sgdma wait from free_pkt to recv. This is the proper place to wait recv sgdma done. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* | net: altera_tse: factor out stop mac funcThomas Chou2015-11-12-15/+21
| | | | | | | | | | | | | | Factor out the stop mac function to prepare msgdma support. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* | net: zap altera_tse_initialize prototypesThomas Chou2015-11-12-3/+0
| | | | | | | | | | | | | | | | Zap the altera_tse_initialize() prototypes, since it is converted to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* | nios2: nios2-generic: do not allocate rx buf in net.cThomas Chou2015-11-12-1/+2
| | | | | | | | | | | | | | Do not allocate rx buf in net.c, because altera_tse allocates its own rx buf in driver. This can save 6KB memory. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | mtd: add altera quadspi driverThomas Chou2015-11-12-0/+318
| | | | | | | | | | | | | | | | Add Altera Generic Quad SPI Controller support. The controller converts SPI NOR flash to parallel flash interface. So it is not like other SPI flash, but rather like CFI flash. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | nios2: add memcpy_fromio and memcpy_toioThomas Chou2015-11-12-0/+4
| | | | | | | | | | | | Add memcpy_fromio() and memcpy_toio(). Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | nios2: use cfi flash driver modelThomas Chou2015-11-12-2/+3
| | | | | | | | | | | | Use cfi flash driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | cfi_flash: convert to driver modelThomas Chou2015-11-12-0/+177
| | | | | | | | | | | | | | Convert cfi flash to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: implement a MTD uclassThomas Chou2015-11-12-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | Implement a Memory Technology Device (MTD) uclass. It should include most flash drivers in the future. Though no uclass ops are defined yet, the MTD ops could be used. The NAND flash driver is based on MTD. The CFI flash and SPI flash support MTD, too. It should make sense to convert them to MTD uclass. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | ARM: uniphier: drop UniPhier specific SMP codeMasahiro Yamada2015-11-11-61/+0
| | | | | | | | | | | | | | | | | | | | | | The latest Linux can directly handle SMP operations for UniPhier SoCs without any help of U-boot. Drop the relevant code from U-boot. See commit b1e4006aeda8c8784029de17d47987c21ea75f6d ("ARM: uniphier: rework SMP operations to use trampoline code") in Linux Kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: dts: uniphier: add USB xHCI nodes for PH1-Pro5 and ProXstream2Masahiro Yamada2015-11-11-0/+60
| | | | | | | | | | | | | | This makes USB3.0 available on new SoCs/boards. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | ARM: dts: uniphier: fix interrupt number of USB core for PH1-Pro4Masahiro Yamada2015-11-11-1/+1
| | | | | | | | | | | | | | The IRQ is not used in U-Boot, but this would be useful to sync device trees between Linux and U-Boot. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2015-11-10-17/+855
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| * | ARM: tegra: enable CONFIG_SYS_NONCACHED_MEMORY everywhereStephen Warren2015-11-10-2/+0
| | | | | | | | | | | | | | | | | | | | | Now that we have solved the problems that prevented this feature from being enabled, enable it everywhere. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | ARM: tegra: add custom MMU setup on ARMv8Stephen Warren2015-11-10-0/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This sets up a fine-grained page table, which is a requirement for noncached_init() to operate correctly. MMU setup code currently exists in a number of places: - A version in the core ARMv8 support code that sets up page tables that use very large block sizes that CONFIG_SYS_NONCACHED_MEMORY doesn't support. - Enhanced versions for fsl-lsch3 and zynmq that set up finer grained page tables. Ideally, rather than duplicating the MMU setup code yet again this patch would instead consolidate all the different routines into the core ARMv8 code so that it supported all use-cases. However, this will require significant effort since there appear to be a number of discrepancies[1] between different versions of the code, and between the defines/values by some copies of the MMU setup code use and the architectural MMU documentation. Some reverse engineering will be required to determine the intent of the current code. [1] For example, in the core ARMv8 MMU setup code, three defines named TCR_EL[123]_IPS_BITS exist, but only one of them sets the IPS field and the others set a different field (T1SZ) in the page tables. As far as I can tell so far, there should be no need to set different values per exception level nor to modify the T1SZ field at all, since TTBR1 shouldn't be enabled anyway. Another example is inconsistent values for *_VA_BITS between the current core ARMv8 MMU setup code and the various SoC- specific MMU setup code. Another example is that asm/armv8/mmu.h's value for SECTION_SHIFT doesn't match asm/system.h's MMU_SECTION_SHIFT; research is needed to determine which code relies on which of those values and why, and whether fixing the incorrect value will cause any regression. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | armv8: allow custom MMU setup routines on ARMv8Stephen Warren2015-11-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order for noncached_init() to operate correctly, SoCs must set up a custom page table with fine-grained (2MiB) sections, which can be configured from noncached_init(). This is currently performed by arch/arm/cpu/armv8/{fsl-lsch3,zynqmp}/cpu.c by cut/pasting and re-implementing mmu_setup, enable_caches(), etc. There are some other reasons for the duplication there though, such as enabling icache early, and enabling dcaching earlier with a different configuration. This change makes mmu_setup() a weak implementation, so that the MMU setup code can be replaced without having to duplicate other code that calls it. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORYStephen Warren2015-11-10-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The implementation of noncached_init() uses define MMU_SECTION_SIZE. Define this on ARM64. Move the prototype of noncached_{init,alloc}() to a location that doesn't depend on !defined(CONFIG_ARM64). Note that noncached_init() calls mmu_set_region_dcache_behaviour() which relies on something having set up translation tables with 2MB block size. The core ARMv8 MMU setup code does not do this by default, but currently relies on SoC specific MMU setup code. Be aware of this before enabling this feature on your platform! Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | ls1043ardb: Add missing config entries to MAINTAINERSFabio Estevam2015-11-10-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing in the MAINTAINERS file, so add them for completeness. Reported-by: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * | board/ti: Update MAINTAINERS entries with more boardsTom Rini2015-11-10-0/+5
| | | | | | | | | | | | | | | | | | | | | A few config files have been added without updating MAINTAINERS. Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Tom Rini <trini@konsulko.com>
| * | arm: stm32f4: fix a bug when a random sector gets erasedVadzim Dambrouski2015-11-10-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Old sector number is not being cleared from FLASH_CR register. For example when first erased sector was 001 and then you want to erase sector 010, sector 011 gets erased instead. This patch clears old sector number from FLASH_CR register before a new one is written. Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
| * | arm: stm32f4: fix a bug when only first sector gets erasedVadzim Dambrouski2015-11-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | flash_lock call is inside a for loop, so after the first iteration flash is locked and no more sectors can be erased. Move flash_lock out of the loop. Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
| * | Revive OpenRD targetsAlbert ARIBAUD2015-11-10-3/+543
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Revert commit 7a2c1b13 which dropped OpenRD boards. Assume maintainership of OpenRD. Remove OpenRD from scrapyard. Switch OpenRD to generic board. Switch to Thumb build. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * | kirkwood: support CONFIG_SYS_THUMB_BUILDAlbert ARIBAUD2015-11-10-0/+6
| | | | | | | | | | | | | | | | | | | | | Kirkwood files cpu.c and cache.c cannot build in Thumb state; force them in ARM state even under CONFIG_SYS_THUMB_BUILD. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * | tricorder: switch to CONFIG_SYS_THUMB_BUILDAlbert ARIBAUD2015-11-10-0/+1
| | | | | | | | | | | | | | | | | | | | | The tricorder and tricorder_flash boards have grown too big. Reduce their size by building them with CONFIG_SYS_THUMB_BUILD. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * | arm: support Thumb-1 with CONFIG_SYS_THUMB_BUILDAlbert ARIBAUD2015-11-10-3/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When building a Thumb-1-only target with CONFIG_SYS_THUMB_BUILD, some files fail to build, most of the time because they include mcr instructions, which only exist for Thumb-2. This patch introduces a Kconfig option CONFIG_THUMB2 and uses it to select between Thumb-2 and ARM mode for the aforementioned files. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * | stm32f429-discovery: add CONFIG_SYS_THUMB_BUILDAlbert ARIBAUD2015-11-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This target is ARMv7-M therefore can only build for Thumb, but it did not #define CONFIG_SYS_THUMB_BUILD, so the U-Boot code did not know it had to build for Thumb(2), not ARM. This patch is binary-invariant: builds of stm32f429-discovery with and without this patch were compared and found to differ only by their U-Boot version strings. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * | arm: fix compile warnings when semihosting is enabled on ARMv7M target.Vadzim Dambrouski2015-11-10-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes compile warnings like this: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'size_t' In C99 standard you can use %zu modifier to print size_t values. Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
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