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* fdt: Add DEV_TREE_BIN option to specify a device tree binary fileSimon Glass2014-06-11-3/+19
| | | | | | | | | | | | | | In some cases, an externally-built device tree binary is required to be attached to U-Boot. An example is when using image signing, since in that case the .dtb file must include the public keys. Add a DEV_TREE_BIN option to the Makefile, and update the documentation. Usage is something like: make DEV_TREE_BIN=boot/am335x-boneblack-pubkey.dtb Signed-off-by: Simon Glass <sjg@chromium.org>
* hash: Export the function to show a hashSimon Glass2014-06-11-4/+17
| | | | | | This function is useful for displaying a hash value, so export it. Signed-off-by: Simon Glass <sjg@chromium.org>
* am33xx/omap: Allow cache enable for all Sitara/OMAPSimon Glass2014-06-11-58/+60
| | | | | | | | | Enable the cache for all devices, unless CONFIG_SYS_DCACHE_OFF is defined. This speeds up the Beaglebone Black boot considerable. (Tested only on Beaglebone Black with SD card boot) Signed-off-by: Simon Glass <sjg@chromium.org>
* Check that u-boot.bin size looks correctSimon Glass2014-06-11-1/+13
| | | | | | | | | | | | Check that the image size matches the size we get from u-boot.bin. If it doesn't, that generally means that some extra sections are being added to u-boot.bin, meaning that it is not possible to access data appended to the U-Boot binary. This is used for device tree, so needs to work. This problem was introduced by commit b02bfc4. By adding a test we can prevent a reccurence. Signed-off-by: Simon Glass <sjg@chromium.org>
* mx31ads: Fix the U-Boot binary outputSimon Glass2014-06-11-1/+3
| | | | | | | Correct the binary output so that image_binary_size is really at the end of the image. Signed-off-by: Simon Glass <sjg@chromium.org>
* cm_t335: Fix the U-Boot binary outputSimon Glass2014-06-11-2/+2
| | | | | | | Correct the binary output so that image_binary_size is really at the end of the image. Signed-off-by: Simon Glass <sjg@chromium.org>
* ti: am335x: Fix the U-Boot binary outputSimon Glass2014-06-11-1/+2
| | | | | | | This should include the hash so that image_binary_size is really at the end of the image, and not some 300 bytes earlier. Signed-off-by: Simon Glass <sjg@chromium.org>
* tools: include u-boot version of sha256.hJeroen Hofstee2014-06-11-0/+1
| | | | | | | | | | | When building tools the u-boot specific sha256.h is required, but the host version of sha256.h is used when present. This leads to build errors on FreeBSD which does have a system sha256.h include. Like libfdt_env.h explicitly include u-boot's sha256.h. cc: Simon Glass <sjg@chromium.org> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Acked-by: Simon Glass <sjg@chromium.org>
* Makefile: fix clang warnings due to clang supportJeroen Hofstee2014-06-11-28/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building u-boot tools with clang as a host compiler e.g. on FreeBSD with `gmake HOSTCC=clang CONFIG_USE_PRIVATE_LIBGCC=y tools` leads to many warnings [1] for every compiler invocation since commit 598e2d33. Part of mentioned commit imports linux patches: - kbuild: LLVMLinux: Adapt warnings for compilation with clang - kbuild: LLVMLinux: Add Kbuild support for building kernel with Clang No version of clang supports the gcc fno-delete-null-pointer-checks though, but it is only passed to clang. Gcc does not have the clang specific Qunused-arguments for the target. Furthermore several warnings are disabled which aren't encountered in u-boot. Since such a build has worked for quite some time and works after removing these changes, just remove the clang specific handling to restore normal building with clang as hostcc. [1] Actual warnings ------------------- GEN include/autoconf.mk.dep arm-freebsd-gcc: unrecognized option '-Qunused-arguments' HOSTCC scripts/basic/fixdep clang: warning: argument unused during compilation: '-fno-delete-null-pointer-checks' cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2014-06-11-16/+23
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| * sf: probe: Fix quad bit set pathPoddar, Sourav2014-06-08-10/+10
| | | | | | | | | | | | | | | | | | | | Currently, flash quad bit is set in "spi_flash_validate_params" and later at the end in the same api, we write 0 to status register for few flashes, thereby overriding the quad bit set. This fix moves the quad bit setting outside this api in "spi_flash_probe_slave" Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * spi: soft_spi: Support NULL din/dout buffersAndrew Ruder2014-06-08-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This mirrors the conventions used in other SPI drivers (kirkwood, davinci, atmel, et al) where the din/dout buffer can be NULL when the received/transmitted data isn't important. This reduces the need for allocating additional buffers when write-only/read-only functionality is needed. In the din == NULL case, the received data is simply not stored. In the dout == NULL case, zeroes are transmitted. Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * sf: params: Added support for Spansion S25FL512S_512KSiva Durga Prasad Paladugu2014-06-08-0/+1
| | | | | | | | | | | | | | | | Added support for Spansion chip "S25FL512S_512K". Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2014-06-10-55/+183
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| * | dfu: Disable default calculation of CRC32Lukasz Majewski2014-06-11-13/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch (SHA1: bd694244db7bc969954) dfu: Introduction of the "dfu_hash_algo" env variable for checksum method setting already introduced more generic handling of the crc32 calculation. Up till now the CRC32 of received data was calculated unconditionally. This patch changes this and from now - by default the crc32 is NOT calculated anymore. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
| * | usb: ci_udc: terminate ep0 INs with a zlp when requiredStephen Warren2014-06-11-3/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes, a zero-length packet is required at the end of an IN transaction so that the host knows the device is done sending data. Enhance ci_udc to send a zlp when necessary. See the comments for more details. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | usb: ci_udc: clean up all allocations in unregisterStephen Warren2014-06-11-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | usb_gadget_unregister_driver() is called to tear down the USB device mode stack. Fix the driver to stop the USB HW (which causes any attached host to notice the disappearance of the device), and free all allocations (which obviously prevents memory leaks). Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | usb: ci_udc: fix probe error cleanupStephen Warren2014-06-11-0/+1
| | | | | | | | | | | | | | | | | | | | | If allocation of the ep0 req fails, clean up all the allocations that were made in ci_udc_probe(). Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | usb: ci_udc: fix freeing of ep0 reqStephen Warren2014-06-11-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ci_ep_alloc_request() avoids allocating multiple request objects for ep0 by keeping a record of the first req allocated for ep0, and always returning that instead of allocating a new req. However, if this req is ever freed, the record of the previous allocation is not cleared, so ci_ep_alloc_request() will keep returning this stale pointer. Fix ci_ep_free_request() to clear the record of the previous allocation. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | usb: ci_udc: call udc_disconnect() from ci_pullup()Stephen Warren2014-06-11-16/+12
| | | | | | | | | | | | | | | | | | | | | ci_pullup()'s !is_on path contains a cut/paste copy of udc_disconnect(). Remove the duplication by simply calling udc_disconnect() instead. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | usb: ci_udc: complete ep0 direction handlingStephen Warren2014-06-01-7/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | handle_setup() currently assumes that the response to a Setup transaction will be an OUT transaction, and any subsequent packet (if any) will be an IN transaction. This appears to be valid in many cases; both USB enumeration and Mass Storage work OK with this restriction. However, DFU uses ep0 to transfer data in both directions. This renders the assumption invalid; when sending data from device to host, the Data Stage is an IN transaction, and the Status Stage is an OUT transaction. Enhance handle_setup() to deduce the correct direction for the USB transactions based on Setup transaction data. ep0's request object only needs to be automatically re-queued when the Data Stage completes, in order to implement the Status Stage. Once the Status Stage transaction is complete, there is no need to re-queue the USB request, so don't do that. Don't sent USB request completion callbacks for Status Stage transactions. These were queued by ci_udc itself, and only serve to confuse the USB function code. For example, f_dfu attempts to interpret the 0-length data buffers for Status Stage transactions as DFU packets. These buffers contain stale data from the previous transaction. This causes f_dfu to complain about a sequence number mismatch. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | usb: ci_udc: pre-allocate ep0 reqStephen Warren2014-06-01-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allocate ep0's USB request object when the UDC driver is probed. This solves a couple of issues in the current code: a) A request object always exists for ep0. Prior to this patch, if setup transactions arrived in an unexpected order, handle_setup() would need to reply to a setup transaction before any ep0 usb_req was created. This issue was introduced in commit 2813006fecda "usb: ci_udc: allow multiple buffer allocs per ep." b) handle_ep_complete no longer /has/ to queue the ep0 request again after every single request completion. This is currently required, since handle_setup() assumes it can find some request object in ep0's request queue. This patch doesn't actually stop handle_ep_complete() from always requeueing the request, but the next patch will. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | usb: ci_udc: use a single descriptor for ep0Stephen Warren2014-06-01-11/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | ci_udc currently points ep->desc at separate descriptors for IN and OUT. These descriptors only differ in the ep address IN/OUT field. Modify the code to use a single descriptor, and change that descriptor's ep address to indicate IN/OUT as required. This removes some data duplication. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | usb: ci_udc: detect queued requests on ep0Stephen Warren2014-06-01-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The flipping of ep0 between IN and OUT relies on ci_ep_queue() consuming the current IN/OUT setting immediately. If this is deferred to a later point when the req is pulled out of ci_req->queue, then the IN/OUT setting may have been changed since the req was queued, and state will get out of sync. This condition doesn't occur today, but could if bugs were introduced later, and this error-check will save a lot of debugging time. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | usb: hub: remove CONFIG_USB_HUB_MIN_POWER_ON_DELAYStephen Warren2014-06-01-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we wait the correct specification-mandated time at the end of usb_hub_power_on(), I suspect that CONFIG_USB_HUB_MIN_POWER_ON_DELAY has no purpose. For cm_t35.h, we already wait longer than the original MIN_POWER_ON_DELAY, so this change is safe. For gw_ventana.h, we will wait as long as the original MIN_POWER_ON_DELAY iff pgood_delay was at least 200ms. I'm not sure if this is the case or not, hence I've CC'd relevant people to test this change. Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | usb: hub: fix power good delay timingStephen Warren2014-06-01-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | usb_hub_power_on() currently waits for the maximum of (a) the hub port's power output to become good, (b) the max time the USB specification allows a device to take to connect. However, these two operations must occur in series rather than in parallel. First, the power supply ramps up to the level required to power the USB device, and then the device may take a certain amount of time to connect (assert D+/D- pullups). Related, the maximum time that a device has to assert pullups is 1s not 100ms. This is explained in "Connect Timing ECN.pdf", itself part of usb_20_042814.zip from www.usb.org. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | dfu: Introduction of the "dfu_hash_algo" env variable for checksum method ↵Lukasz Majewski2014-06-01-5/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | setting Up till now the CRC32 of received data was calculated unconditionally. The standard crc32 implementation causes long delay when large images were uploaded. The "dfu_hash_algo" environment variable gives the opportunity to disable on demand the hash (crc32) calculation. It can be done without the need to recompile the u-boot binary. By default the crc32 is calculated, which means that legacy behavior has been preserved. Tests results: 400 MiB ums.img file With crc32 calculation: 65 sec [avg 6.29 MB/s] Without crc32 calculation: 25 sec [avg 16.17 MB/s] Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
* | | Prepare v2014.07-rc3Tom Rini2014-06-10-1/+1
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | | net: sh-eth: Fix typo from rESR_RTLF to EESR_RTLFNobuhiro Iwamatsu2014-06-10-1/+1
| | | | | | | | | | | | | | | | | | | | | 'r' of rESR_RTLF is a mistake of E. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | net: sh-eth: Fix coding styleNobuhiro Iwamatsu2014-06-10-22/+22
| | | | | | | | | | | | | | | | | | | | | This fixes checkpatch's warning. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | net: sh-eth: Add support R7S72100 of rmobileNobuhiro Iwamatsu2014-06-10-14/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | The R7S72100 of ARM SoC that Renesas manufactured has one Ether port. This has the same IP SH-Ether. This patch adds support of the R7S72100 in SH-Ether. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-06-08-763/+1918
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| * | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-06-08-155/+624
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| | * | arm:am43xx: Add TPS65218 support to scale voltages upTom Rini2014-06-06-7/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This family is supported by the TPS65218 PMIC. Implement a scale_vcores to set the MPU and CORE voltage correctly to the max frequency that is supported (and what we will be scaling them to in setup_dplls()). Signed-off-by: Tom Rini <trini@ti.com>
| | * | power: Add support for the TPS65218 PMICTom Rini2014-06-06-0/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a driver for the TPS65218 PMIC which is used by TI AM43xx SoCs and may be used by TI AM335x SoCs. Signed-off-by: Tom Rini <trini@ti.com>
| | * | arm:am33xx: Add a scale_vcores() hookTom Rini2014-06-06-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to OMAP4/5 we need to scale the voltage up prior to changing the clock frequencies up higher. Add a similar hook to start with. Signed-off-by: Tom Rini <trini@ti.com>
| | * | am43xx: Only read the MPU frequency bits of CTRL_DEV_ATTRTom Rini2014-06-06-1/+4
| | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| | * | board/BuR/tseries: cosmetic changesHannes Petermaier2014-06-06-2/+2
| | | | | | | | | | | | | | | | | | | | Cc: trini@ti.com Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
| | * | board/BuR/common: Add CONFIG_CMD_I2CHannes Petermaier2014-06-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | in almost all cases we need the i2c commands within the u-boot shell. So we enable them within the common section. Cc: trini@ti.com Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
| | * | board/BuR/tseries: only run gpmc_init(...) in NAND-buildHannes Petermaier2014-06-06-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | if we have no NAND-Chip, we don't need the gpmc-controller and therefore is no need to init it. Cc: trini@ti.com Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
| | * | board/BuR/tseries: Add support for using 8-bit on eMMCHannes Petermaier2014-06-06-0/+5
| | | | | | | | | | | | | | | | | | | | Cc: trini@ti.com Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
| | * | board/BuR/common: introduce usage of CONFIG_SYS_GENERIC_BOARDHannes Petermaier2014-06-06-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
| | * | arch-am33xx: Add defines for timer0-7Hannes Petermaier2014-06-06-6/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For usage of timer6 within B&R we need this defines to enable clock modules and clk-source. Also the 'Timer register bits' are expanded. By the way we add defines for all timers within AM335x SoC. Cc: trini@ti.com Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
| | * | ARM: AM43xx: Fix UART clocks enablingLokesh Vutla2014-06-06-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After enabling a module, SW has to wait on IDLEST bit until it is Fully functional. This wait is missing for UART module and there is a immediate access of UART registers after this. So there is a chance of hang on this module( This can happen when we are running from MPU SRAM). So waiting for IDLEST bit. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| | * | ARM: AM43xx: Fix mmcboot command in EXTRA_ENV_SETTINGSLokesh Vutla2014-06-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | loadbootenv expects devtype variable to be set. This is missing in mmcboot command. With this the following error comes: U-Boot# run mmcboot mmc0 is current device SD/MMC found on device 0 ** Bad device usb 0 ** ** Bad device usb 0 ** Fixing this by setting devtype as mmc. Reported-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| | * | tam3517: fix NAND detectionJeroen Hofstee2014-06-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit a0a37183bd7 "ARM: omap: merge GPMC initialization code for all platform" needs CONFIG_NOR, CONFIG_NAND or CONFIG_CMD_ONENAND to be set to access flash. Add CONFIG_NAND for tam3517 derived boards to prevent the following error: "nand: error: Unable to find NAND settings in GPMC Configuration - quitting" cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| | * | keystone: k2hk: enable support of nand ecclayout commandWingMan Kwok2014-06-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support of nand ecclayout command. Acked-By: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: WingMan Kwok <w-kwok2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| | * | keystone: init: enable UART1 to be able use it from kernelMurali Karicheri2014-06-06-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently PWREMU_MGMT is not configured in the Linux generic UART driver as this register seems to be specific TI UART IP. So this needs to be enabled in u-boot to use UART1 from kernel space. Acked-By: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| | * | arm:am33xx: Rework s_init and add board_early_init_fTom Rini2014-06-06-2/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the changes to the i2c framework (and adopting the omap24xx_i2c driver to them) we can no longer call i2c functions prior to gd having been set and cleared. When SPL booting, this is handled by setting gd to point to SRAM in s_init. However in the cases where we are loaded directly by ROM (memory mapped NOR or QSPI) we need to make use of the normal hooks to slightly delay these calls. Signed-off-by: Tom Rini <trini@ti.com>
| | * | arm:am33xx: Make dram_init call sdram_init() in some contextsTom Rini2014-06-06-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have two contexts for booting these platforms. One is SPL which is roughly: reset, cpu_init_crit, lowlevel_init, s_init, sdram_init, _main, board_init_f from SPL, ... then U-Boot loads. The other is a memory-mapped XIP case (NOR or QSPI) where we do not run an SPL. In this case we go, roughly: reset, cpu_init_crit, lowlevel_init, s_init, _main, regular board_init_f. In the first case s_init will set a valid gd and then be able to call sdram_init which in many cases will need i2c (which needs a valid gd for gd->cur_i2c_bus). In this second case we must (and are able to and should) defer sdram_init() into dram_init() called by board_init_f as gd will have been set in _main and cleared in board_init_f. Signed-off-by: Tom Rini <trini@ti.com>
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