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* rockchip: Enable generation of SPI imagesSimon Glass2016-01-08-1/+1
| | | | | | This feature was dropped at some point. Restore it. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-mpc85xxTom Rini2016-01-07-0/+2
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| * powerpc, mpc5xxx: fix missing bootflag initHeiko Schocher2016-01-05-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | since: commit: f05ad9ba "Add a way to skip relocation" tqm5200s board fails to boot. Reason is that board_init_f has a function parameter bootflag, which is not setup in in arch/powerpc/cpu/mpc5xxx/start.S _start So board_init_f gets a undefined bootflag, currently the gd pointer address. Unfortunately this address sets the GD_FLG_SKIP_RELOC bit, so u-boot code gets not relocated and u-boot does not boot ... Init bootflag with 0, and tqm5200 boots fine again. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <yorksun@freescale.com>
* | Prepare v2016.01-rc4Tom Rini2016-01-04-1/+1
| | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* | common: nvedit: use snprintf instead of sprintfPeng Fan2016-01-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use snprintf to replace sprintf. Coverity log: " Unbounded source buffer (STRING_SIZE) string_size: Passing string init_val of unknown size to sprintf. " Reported-by: Coverity Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* | common: env: initialize scalar variablePeng Fan2016-01-04-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before calling hsearch_r, initialize callback entry to NULL. Coverity log: " Uninitialized scalar variable (UNINIT) uninit_use_in_call: Using uninitialized value e. Field e.callback is uninitialized when calling hsearch_r. " Reported-by: Coverity Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org>
* | common: cli: avoid memory leakPeng Fan2016-01-04-1/+1
| | | | | | | | | | | | | | | | | | | | Whether CONFIG_SYS_HUSH_PARSER is defined or not, should always check to free 'buff' to avoid memory leak. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Tom Rini <trini@konsulko.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org>
* | net: e1000: use correct helper to do endianness conversionMiao Yan2016-01-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | In struct e1000_rx_desc, field 'length' is declared as uint16_t, so use le16_to_cpu() to do endianness conversion. Also drop conversion on 'status' which is declared as uint8_t. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | qemu-ppce500: pass 'range_id' around in pci_map_regionMiao Yan2016-01-04-1/+1
| | | | | | | | | | | | | | | | | | | | In pci_map_region(), pass 'range_id' to fdt_read_range(), otherwise the same address will be mapped again in other calls to pci_map_region() Signed-off-by: Miao Yan <yammiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alexander Graf <agraf@suse.de>
* | checkpatch: fix left brace warningHeiko Schocher2016-01-04-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | using checkpatch with Perl 5.22.0 generates a warning, this is fixed in linux through commit: commit 4e5d56bdf892e18832a6540b63ebf709966bce2a Author: Eddie Kovsky <ewk@edkovsky.org> Date: Wed Sep 9 15:37:52 2015 -0700 checkpatch: fix left brace warning Using checkpatch.pl with Perl 5.22.0 generates the following warning: Unescaped left brace in regex is deprecated, passed through in regex; This patch fixes the warnings by escaping occurrences of the left brace inside the regular expression. Adapt it for U-Boot. Signed-off-by: Heiko Schocher <hs@denx.de>
* | mmc: update MMC_ERASE argument to match Linux kernel.Eric Nelson2016-01-04-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Table 41 of the JEDEC standard for eMMC says that bit 31 of the command argument is obsolete when issuing the ERASE command (CMD38) on page 115 of this document: http://www.jedec.org/sites/default/files/docs/jesd84-B45.pdf The SD Card Association Physical Layer Simplified Specification also makes no mention of the use of bit 31. https://www.sdcard.org/downloads/pls/part1_410.pdf The Linux kernel distinguishes between secure (bit 31 set) and non-secure erase, and this patch copies the macro names from include/linux/mmc/core.h. Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Eric Nelson <eric@nelint.com> Tested-by: Hector Palacios <hector.palacios@digi.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ubiTom Rini2016-01-04-1/+0
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| * | UBI: Fix compile error when CONFIG_UBI_SILENCE_MSG definedLadislav Michl2016-01-04-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | drivers/mtd/ubi/io.c:1354:3: error: 'dump_len' undeclared (first use in this function) dump_len = max_t(int, 128, len - i); Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-01-03-22/+268
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| * | | imx: mx6qsabreauto: support lvds displayPeng Fan2016-01-03-3/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move setup_display from board_early_init_f to board_init. Add more clock settings. Add blacklight iomux setting. Add display_info_t info for the lvds screen. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * | | i2c: mxc: add a condition in case the parameter is NULLGong Qianyu2016-01-03-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This could avoid executing the code that only applies to i.MX platforms. The bus_i2c_init() is called before relocation and will assgin value to a static variable. If U-Boot is then still running in a flash device, it's theoretically not allowed to write data to flash without an erasing operation. For i.MX platforms, the U-Boot is always running in DDR. Actually it causes asynchronous error when the ARM64 system error report is enabled and the flash write protect is set. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | | imx_common: check for Serial Downloader in spl_boot_deviceStefano Babic2016-01-03-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check for bmode before reading the boot device to check if a serial downloader is started, and returns UART if the serial downloader is set, letting SPL to wait for an image if CONFIG_SPL_YMODEM_SUPPORT is set. This allows to load again a SPL based board with imx_usb_loader together with a tool such as kermit. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tim Harvey <tharvey@gateworks.com> CC: Fabio Estevam <Fabio.Estevam@freescale.com> CC: Eric Nelson <eric.nelson@boundarydevices.com> Reviewed-by: Eric Nelson <eric@nelint.com> Tested-by: Eric Nelson <eric@nelint.com>
| * | | ARM: mxs: allow boards to select DC-DC switching clock sourceMichael Heimpold2016-01-03-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some board designs, it might be useful to switch the DC-DC clock source to something else rather the default 24 MHz, e.g. for EMI reasons. For this, override the mxs_power_setup_dcdc_clocksource function in your board support files. Example: void mxs_power_setup_dcdc_clocksource(void) { mxs_power_switch_dcdc_clocksource(POWER_MISC_FREQSEL_20MHZ); } Signed-off-by: Michael Heimpold <mhei@heimpold.de> Cc: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
| * | | cgtqmx6eval: fix pad configuration for SPI busMichael Schanz2016-01-03-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the macro SETUP_IOMUX_PAD(...) rather than imx_iomux_v3_setup_multiple_pads(...) in order to setup the pin configuration for ECSPI1. ARRAY_SIZE(pads) provides the wrong size for imx_iomux_v3_setup_multiple_pads(pads, ARRAY_SIZE(pads)) in case of MX6QDL. In the particular case, the content of GPR12 is overwritten and the IPG/AHB/ATB/ATP clocks are deactivated. Therefore, the connection to the system via JTAG is not possible anymore. Furthermore, kernel version 3.0.35 hangs during bootprocess in the function etm_init(). Signed-off-by: Michael Schanz <michael.schanz@congatec.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | net: fec_mxc: unregister mdio bus on probe errorMåns Rullgård2016-01-03-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If fecmxc_initialize_multi() fails, it frees but does not unregister the mdio bus, causing subsequent uses of the "mii" command to crash. Fix this by adding mdio_unregister() calls where needed. Signed-off-by: Mans Rullgard <mans@mansr.com> Reviewed-by: Eric Nelson <eric@nelint.com>
| * | | net: fec_mxc: configure MDIO hold timeMåns Rullgård2016-01-03-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the host clock frequency is higher than 100 MHz, the MDIO hold time needs to be increased from its current setting of one cycle in order to meet the specified minium of 10 ns. Writing an appropriate value to the HOLDTIME field of the MII_SPEED register achieves this. Comment copied from Linux kernel. Signed-off-by: Mans Rullgard <mans@mansr.com> Reviewed-by: Eric Nelson <eric@nelint.com>
| * | | serial_mxc: Fix setup of UARTx_UFCR registerMaximilian Schwerin2016-01-03-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch writes the default values for TXTL and RXTL to UARTx_UFCR. Without this patch some older kernel versions crash as UARTx_UFCR was not always correctly initialized. Signed-off-by: Maximilian Schwerin <maximilian.schwerin@tigris.de>
| * | | ARM: imx: fsl_esdhc: fix usage of low 4 bits of sysctl registerEric Nelson2016-01-03-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The low four bits of the SYSCTL register are reserved on the USDHC controller on i.MX6 and i.MX7 processors, but are used for clocking operations on earlier models. Guard against their usage by hiding the bit mask macros on those processors. These bits are used to prevent glitches when changing clocks on i.MX35 et al. Use the RSTA bit instead for i.MX6 and i.MX7. >From the i.MX6DQ RM: To prevent possible glitch on the card clock, clear the FRC_SDCLK_ON bit when changing clock divisor value(SDCLKFS or DVS in System Control Register) or setting RSTA bit. Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Hector Palacios <hector.palacios@digi.com>
| * | | imx: ddr: drop duplicated debug infoPeng Fan2016-01-03-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop duplicated debug info for tcl. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * | | arm: novena: Switch novena to config_distro_bootcmdVagrant Cascadian2015-12-14-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch Novena to distro bootcmd, so it can be used with debian easily. Signed-off-by: Vagrant Cascadian <vagrant@aikidev.net> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Sean Cross <xobs@kosagi.com> Cc: Stefano Babic <sbabic@denx.de> Tested-by: Vagrant Cascadian <vagrant@aikidev.net>
| * | | imx: mx6: fix reg base address when runtime usagePeng Fan2015-12-07-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Should use parenthese to wrap the macro definition, otherwise we will encounter error like the following: " if (base_addr != LCDIF1_BASE_ADDR) { puts("Wrong LCD interface!\n"); return -EINVAL; } " Without this patch, we will always encounter "Wrong LCD interface". Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * | | imx: mx6: add missing return valueJeroen Hofstee2015-12-07-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | cc: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * | | imx: mx7: enable CONFIG_FSL_CLKPeng Fan2015-12-07-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit "677f970bc62a661690b3431543d5a5d5e682ba70" introduce a new macro "CONFIG_FSL_CLK" that get_clocks() should not be limited by ESDHC. But that patch missed to enable it for i.MX7. THis patch enables CONFIG_FSL_CLK to let get_clocks work. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Adrian Alonso <aalonso@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * | | mx6sxsabresd: Fix Ethernet PHY reset sequenceFabio Estevam2015-12-07-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is registered") Ethernet is no longer functional. This commit does not have an issue in itself, but it revelead a problem with the Ethernet initialization. Fix this by calling enable_fec_anatop_clock() earlier and also by adding a 10ms reset delay as recommended in the AR8031 datasheet. Suggested-by: Jörg Krause <joerg.krause@embedded.rocks> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * | | cgtqmx6eval: Fix defconfig nameOtavio Salvador2015-12-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | After the conversion to SPL the defconfig was renamed, so adjust it. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* | | | Merge git://git.denx.de/u-boot-usbTom Rini2016-01-02-120/+115
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| * | | usb: musb: Fix hub port setting for SPLIT transactionsStefan Brüns2015-12-31-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ifdef'ed Linux kernel code uses the 1 based port number, whereas U-Boot puts a 0 based port number into the register. The reason the 0 based port number apparently works can probably be taken from the USB 2.0 spec: 8.4.2.2 Start-Split Transaction Token ... The host must correctly set the port field for single and multiple TT hub implementations. A single TT hub implementation *may ignore* the port field. Actually, as far as I understand, a multi TT hub defaults to single TT (bAlternateSetting: 0) until switched via SetInterface, so even "port 42" would work. The change was verified by hardcoding the port number to a wrong value, SPLIT transactions kept working (although using a DWC2 instead of MUSB). Tested hubs are the RPi onboard SMC9514 and an external "05e3:0608 Genesys Logic, Inc. USB-2.0 4-Port HUB". The former is a multi TT hub, the latter single TT only. Addendum: Tested on sunxi/MUSB by Hans de Goede Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Hans de Goede <hdegoede@redhat.com>
| * | | usb: Move determination of TT hub address/port into separate functionStefan Brüns2015-12-31-101/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start split and complete split tokens need the hub address and the downstream port of the first HS hub (device view). The core of the function was duplicated in both host/ehci_hcd and musb-new/usb-compat.h. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Hans de Goede <hdegoede@redhat.com>
| * | | usb: dwc2: avoid out of bounds accessStefan Brüns2015-12-31-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flush_dcache_range may access data after priv->aligned_buffer end if len > DWC2_DATA_BUF_SIZE. memcpy may access data after buffer end if done > 0 Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
| * | | usb: Alloc buffer for USB descriptor dynamicallyStefan Brüns2015-12-31-16/+31
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | The configuration descriptor includes all interface, endpoint and auxiliary descriptors (e.g. report, union) so 512 bytes may not be enough. Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | altera_qspi: allow ctrl-c to abort the erase opsThomas Chou2015-12-28-0/+9
| | | | | | | | | | | | | | | | | | Allow ctrl-c to abort the erase ops. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | | altera_qspi: show erase progressThomas Chou2015-12-28-0/+14
| | | | | | | | | | | | | | | | | | Show sector erase progress with dot and comma. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | | altera_qspi: skip erase if the sector is blankThomas Chou2015-12-28-14/+25
| | | | | | | | | | | | | | | | | | | | | Skip erase if the sector is blank. The sector erase is slow, and may take 0.7 sec typically or up to 3 sec worst-case. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | | altera_qspi: set fail_addr for erase opsThomas Chou2015-12-28-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | If the erase fails, fail_addr might indicate exactly which block failed. If fail_addr = MTD_FAIL_ADDR_UNKNOWN, the failure was not at the device level or was not specific to any particular block. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | | altera_qspi: call callback even if the erase failedThomas Chou2015-12-28-0/+1
|/ / | | | | | | | | | | | | | | Erase is an asynchronous operation. Device drivers are supposed to call instr->callback() whenever the operation completes, even if it completes with a failure. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-12-27-1/+1
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| * | sunxi: Reduce Orangepi PC RAM speed to 624 MHzHans de Goede2015-12-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are some reports of stability issues at 672 MHz, see: http://linux-sunxi.org/Orange_Pi_PC#DRAM_clock_speed_limit So reduce the DRAM speed to 624MHz which seems to be reliable everywhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | | Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-12-24-93/+163
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: include/configs/axs101.h Signed-off-by: Tom Rini <trini@konsulko.com>
| * | | arm: socfpga: Fix i2c mux on cyclone5-socdk boardChin Liang See2015-12-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updated pinmux group GENERALIO[15-16] for i2c. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: shengjiangwu <shengjiangwu@icloud.com>
| * | | arm: socfpga: Fix USB doesn't work on socdk boardshengjiangwu2015-12-23-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updated pinmux group EMACIO[1-8] and EMACIO[10-13] for USB. Signed-off-by: shengjiangwu <shengjiangwu@icloud.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de>
| * | | arm: socfpga: Add support for Denali NAND controllerMarek Vasut2015-12-22-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add common configuration bits for the Denali NAND controller and also support for using it as a boot device in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | | arm: socfpga: Enable DFU MMC support only if DM_MMC is enabledMarek Vasut2015-12-22-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is not possible to compile DFU MMC support if the MMC support is not compiled into U-Boot. Secure the code with an ifdef to prevent compiler splat. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | | arm: socfpga: Enable SPL MMC/SPI support only if DM_MMC/SPI is enabledMarek Vasut2015-12-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is not possible to compile MMC/SPI SPL if the respective DM_MMC/DM_SPI bits are not enabled. Secure the code with an ifdef to prevent compiler splat. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | | arm: socfpga: Unreset NAND in U-BootMarek Vasut2015-12-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure the NAND reset is not asserted in full U-Boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | | arm: socfpga: Unreset NAND in SPLMarek Vasut2015-12-22-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the system boots from NAND, make sure to de-assert the NAND IP reset, otherwise the system will get stuck. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
generated by cgit v1.1 at 2024-11-26 12:56:35 +0000