| Commit message (Collapse) | Author | Age | Lines |
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We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.
Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>
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Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>
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We have switched to the single .config configuration system,
the same one as used in Linux Kernel.
The necessary glue code is small enough now, so move it to the
top-level Makefile and scripts/kconfig/Makefile, and then delete
scripts/multiconfig.sh.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This target was added by commit cbdd9a9737cc (sunxi: kconfig: Add
%_felconfig rule to enable FEL build of sunxi platforms.).
At that time, U-Boot used separate .config files for U-Boot proper
and SPL. I understood the pain to modify both .config and
spl/.config.
Now, we have switched to single .config configuration.
It seems acceptable to run "make menuconfig" or friends to enable
CONFIG_SPL_FEL, as we do for other CONFIGs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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board/sunxi/board.c tries to set ldo3 to 2.8v however drivers/power/axp209.c
contains an incorrect limit on ldo3 of 2.275v
The origin of the incorrect limit seems likely due to some inconsistencies
in the axp209 datasheet. ldo3 is described with different limits in
different sections. register 0x29 uses 7 bits for voltage configuration
while the 2.275v limit would apply if only 6 bits were used.
Probably this is a cut&paste error from register 0x23
The linux kernel driver has the correct limit and operation up to the 2.8v
required by my board has been physically verified with a multimeter.
Signed-off-by: Iain Paton <ipaton0@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Of 4 boards in our automated test system 2 do not have reliable
networking with the default TX delay of 0x0. Increasing to 0x1 seems
to make things reliable on all 4 boards.
Some previous ad-hpoc tests with tx delay set to 0, 1, 2 and 3 on one
of the problematic boards showed:
0: mw.l 0x1c20164 0x006 1 -- t/o in 4/5 tftp runs
1: mw.l 0x1c20164 0x406 1 -- t/o in 1/5 tftp runs
2: mw.l 0x1c20164 0x806 1 -- t/o in 1/5 tftp runs
3: mw.l 0x1c20164 0xc06 1 -- t/o many times in first tftp run
For 0, 1 and 2 "t/o" means one or two "T" glitches in the download,
but it did complete. For 3 those were basically continuous and it
couldn't complete.
tftp was of a 16M initrd.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Serial-uclass should be generically implemented without depending
a particular hardware. Fortunately, nothing in include/ns16550.h is
referenced from drivers/serial/serial-uclass.c, so remove this bogus
include.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
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It is very common in the debug stage to test U-Boot loading a linux
kernel. The commands to boot linux kernel with ramdisk and nfs as the
root are common to all x86 targets, so it makes sense to add them as
the U-Boot default environment in x86-common.h.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chroimum.org>
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Saving U-Boot's environment in SPI flash on Intel Galileo board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sg@chromium.org>
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Saving U-Boot's environment in SPI flash on Intel CrownBay board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sg@chromium.org>
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Intel Crown Bay board has one ethernet port connected from Intel
Topcliff PCH. Enable it in the board configuration.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
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Add a new driver for the Gigabit Ethernet MAC found on Intel Topcliff
Platform Controller Hub. Tested under 10/100 half/full duplex and 1000
full duplex modes using ping and tftpboot commands.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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README.drivers.eth still refers to the deprecated miiphy_register().
Update the doc to mention new APIs mdio_alloc() and mdio_register().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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Some ethernet drivers use their own version of ethernet FCS length
macro which is really common. We define ETH_FCS_LEN in net.h and
replace those custom versions in various places.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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Intel Quark SoC integrates two 10/100 ethernet controllers which can
be connected to an external RMII PHY. The MAC IP is from Designware.
Enable this support with the existing U-Boot Designware MAC driver
so that the ethernet port on Intel Galileo board can be used.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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The FSP release version 001 for Intel Queensbay has a bug which
could cause random endless loop during the FspInit call. This bug
was published by Intel although Intel did not describe any details.
Describe this information in the x86 doc so that U-Boot Queensbay
support is invulnerable.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Add the description that how the compatible property is involved in
the fdtdec_get_pci_bdf() documentation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Using __DATE__ and __TIME__ results in an error due to -Werror=date-time
with gcc-4.9 (__DATE__ / __TIME__ might prevent reproducible builds) so
switch these over to U_BOOT_DATE / U_BOOT_TIME
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
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This patch cleans up the quark MRC codes coding style by:
- Remove BIT0/1../31 defines from mrc_util.h
- Create names for the documented BITs and use them
- For undocumented single BITs, use (1 << n) directly
- For undocumented ORed BITs, use the hex number directly
- Remove redundancy parenthesis all over the codes
- Replace to use lower case hex numbers
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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List bootable partitions and only scan those for bootable files, falling
back to partition 1 if there are no bootable partitions
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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env exists allows scripts to query whether an environment variable
exists. Enable by default as it adds only a trivial amount of code and
can be useful in scripts.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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Add an optional -bootable parameter to the part list commands to only
put the list of bootable partitions in the environment variable
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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After v2015.01 we need to have DM enabled in order to use UART. Also
fix a typo in the EEPROM config format.
Signed-off-by: Gilles Gameiro <gilles@gigadevices.com>
[trini: Reword commit message, re-save defconfigs with 'savedefconfig']
Signed-off-by: Tom Rini <trini@konsulko.com>
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Apparently the firmware's board rev response includes both the board
revision and some other data even on the RPi1. In particular, the
"warranty bit" is bit 24. We need to mask that out when looking up the
board ID.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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Various files are needlessly rebuilt every time due to the version and
build time changing. As version.h is not actually needed, remove the
include.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Macpaul Lin <macpaul@andestech.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: York Sun <yorksun@freescale.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philippe Reynes <tremyfr@yahoo.fr>
Cc: Eric Jarrige <eric.jarrige@armadeus.org>
Cc: "David Müller" <d.mueller@elsoft.ch>
Cc: Phil Edworthy <phil.edworthy@renesas.com>
Cc: Robert Baldyga <r.baldyga@samsung.com>
Cc: Torsten Koschorrek <koschorrek@synertronixx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Łukasz Majewski <l.majewski@samsung.com>
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The callee (arch/arm/lib/cache-cp15.c) has a #ifdef
CONFIG_SYS_DCACHE_OFF conditional. The same conditional in the
caller (arch/arm/mach-uniphier/cache_uniphier.c) is redundant.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The L2 cache is used as a temporary SRAM on SPL.
Now the secondary CPUs store the necessary code for jumping to
Linux on their L1 I-caches. So, the L2 cache can be disabled
much earlier, at the very entry of U-Boot proper (lowlevel_init).
This makes the boot sequence clearer.
Also, as the L1 cache has been disabled by the start.S,
enable_caches() does not need to do it again.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Currently, the secondary CPU(s) are kicked three times:
Boot ROM ---(kick)--> SPL ---(kick)--> U-boot ---(kick)--> Linux.
It makes the boot sequence very complicated.
This commit merges the first and the second kicks, so the secondary
CPU(s) can directly jump from SPL to Linux.
arch/arm/mach-uniphier/smp.S is no longer necessary.
Linux boot test passed.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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To remove the ifdef conditional of CONFIG_SKIP_LOWLEVEL_INIT,
add late_lowlevel_init.S to U-Boot proper.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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There is no good reason to have the 0x1000 gap between
CONFIG_SYS_INIT_SP_ADDR and CONFIG_SYS_TEXT_BASE.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The Boot ROM of UniPhier platform only loads 64KB image. We should
always make sure that SPL memory footprint is less than that.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Ifdef conditionals for CONFIG options are not Kconfig-friendly.
Instead, define CONFIG_SPL_STACK to prepare for Kconfig moves.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Enable CONFIG_SPL_DM and CONFIG_SPL_SERIAL_SUPPORT, which provide
Driver Model UART support on SPL.
CONFIG_SYS_SPL_MALLOC_{START,SIZE} should be dropped because simple
malloc is preferred on SPL. Dlmalloc requires some static variables
on .data section that is not available yet for NOR boot mode etc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Do not reset board on panic, which allows us to not link reset_cpu()
into SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The UniPhier platform is going to enable Driver Model and UART
support on SPL. Move UART pin settings to early_pin_init(),
which is called from SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Since we do not have OF_CONTROL support for SPL, platform devices
are necessary to enable Driver Model on SPL.
To prepare for that, move platdevice.o to SPL and enable it by
CONFIG_SPL_DM.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The two Makefiles arch/arm/mach-uniphier/{ph1-ld4,ph1-sld8}/Makefile
are completely the same. We can improve the maintainability by
having one to include the other.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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Since commit a86ac9540e20 (ARM: UniPhier: include <mach/*.h> instead
of <asm/arch/*.h>), UniPhier platform does not need the symbolic
link arch/arm/include/asm. This option is not necessary either.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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This allows printing the error message when VBUS is detected, as it would with
AXP VBUS detect.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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This flag was missing and thus the board was totally being configured
wrong.
Signed-off-by: Tom Rini <trini@konsulko.com>
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When access the programmable secure peripherals address space,
it needs set them to non-secured.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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If the GBE bit is set, when do next time autonegotiation,
if the result is not 1000Mbps, it will fallback to 100Mbps
checking. So, we need to clear the GBE bit.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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As the u-boot-spl.lds is used only for armv7 SoCs (includes
sama5d3 and sama5d4), so move it to armv7 directory.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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As the u-boot-spl.lds is moved to <arch/arm/mach-at91> directory.
So, correct the path for sama5d4 related boards.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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