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* MLK-12883 usb: limit USB_MAX_XFER_BLK to 256rel_imx_4.1.15_1.2.0_gaimx_v2015.04_4.1.15_1.0.0_gaPeng Fan2016-06-06-1/+3
| | | | | | | | | | | | | | | | | | | | For Some USB mass storage devices, such as: " - Kingston DataTraveler 2.0 001D7D06CF09B04199C7B3EA - Class: (from Interface) Mass Storage - PacketSize: 64 Configurations: 1 - Vendor: 0x0930 Product 0x6545 Version 1.16 " When `usb read 0x80000000 0 0x2000`, we met "EHCI timed out on TD - token=0x80008d80". The devices does not support scsi VPD page, we are not able to get the maximum transfer length for READ(10)/WRITE(10). So we limit this to 256 blocks as READ(6). Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit df0052575b2bc9d66ae73584768e1a457ed5d914)
* MLK-12884 mx7dsabresd: Fix LCD_PWR_EN output settingYe Li2016-06-06-1/+1
| | | | | | | | | LCD_PWR_EN controls the G pin of Q13 PMOS which needs low voltage to connect D to S for outputting LCD 3.3V. If LCD_PWR_EN is high, we measured the LCD 3v3 is actually 1.2V. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 28eb616b6c49de492cc0cdb3ad5b618bed77960f)
* MLK-12865 Nand: Fix BCH debug1 register access issueYe Li2016-05-31-1/+1
| | | | | | | Should have "&" to access the register address, otherwise uboot will hang. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 806b2966f155b8ecef4182fca7151d07b1a9f420)
* imx: iomux-v3: fix UART input selectsStefan Agner2016-05-24-4/+4
| | | | | | | | | | | | | | | | Several UART input selects are missing. The fourth input select for UART2_TX_DATA_ALT0 is actually also missing in the documentation. (at least in Rev. B of the i.MX 7Dual Reference Manual). However, when looking at the tables of other input selects, it is very natural that there must be an input select for the UART2_TX_DATA_ALT0 pad. The Colibri iMX7 also uses that pad for UART2 RX (in DTE mode), and it was required to set that particular input select register to get a working UART2. From https://www.mail-archive.com/u-boot@lists.denx.de/msg211942.html Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit ee6717667799d70a42f00ba46d96f3f34c78f497)
* MLK-12693-2 nand: mxs: correct bitflip for erased NAND pagePeng Fan2016-05-24-2/+24
| | | | | | | | | | | | | | | | | | | This patch is a porting of http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_4.1.15_1.0.0_ga&id=e4dacc44d22e9474ec456cb330df525cd805ea38 " i.MX6QP and i.MX7D BCH module integrated a new feature to detect the bitflip number for erased NAND page. So for these two platform, set the erase threshold to gf/2 and if bitflip detected, GPMI driver will correct the data to all 0xFF. Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q with the one for i.MX6QP. " In this patch, i.MX6UL is added and threshold changed to use ecc_strength. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 489929be0221bb7d4c46bb5bc6083650b78f73e0)
* MLK-12693-1 nand: mxs: fix the bitflips for erased page when uncorrectable errorPeng Fan2016-05-24-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is porting from linux: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_4.1.15_1.0.0_ga&id=3d42fcece496224fde59f9343763fb2dfc5b0768 " We may meet the bitflips in reading an erased page(contains all 0xFF), this may causes the UBIFS corrupt, please see the log from Elie: ----------------------------------------------------------------- [ 3.831323] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.845026] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.858710] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry [ 3.872408] UBI error: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read 16384 bytes ... [ 4.011529] UBIFS error (pid 36): ubifs_recover_leb: corrupt empty space LEB 27:237568, corruption starts at 9815 [ 4.021897] UBIFS error (pid 36): ubifs_scanned_corruption: corruption at LEB 27:247383 [ 4.030000] UBIFS error (pid 36): ubifs_scanned_corruption: first 6569 bytes from LEB 27:247383 ----------------------------------------------------------------- This patch does a check for the uncorrectable failure in the following steps: [0] set the threshold. The threshold is set based on the truth: "A single 0 bit will lead to gf_len(13 or 14) bits 0 after the BCH do the ECC." For the sake of safe, we will set the threshold with half the gf_len, and do not make it bigger the ECC strength. [1] count the bitflips of the current ECC chunk, assume it is N. [2] if the (N <= threshold) is true, we continue to read out the page with ECC disabled. and we count the bitflips again, assume it is N2. (We read out the whole page, not just a chunk, this makes the check more strictly, and make the code more simple.) [3] if the (N2 <= threshold) is true again, we can regard this is a erased page. This is because a real erased page is full of 0xFF(maybe also has several bitflips), while a page contains the 0xFF data will definitely has many bitflips in the ECC parity areas. [4] if the [3] fails, we can regard this is a page filled with the '0xFF' data. " Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit ceb324a2914487aa517a6c70a06a20b5e3438fda)
* imx: imx7d: fix ahb clock mux 1Stefan Agner2016-05-24-1/+1
| | | | | | | | | | | | | | | The clock parent of the AHB root clock when using mux option 1 is the SYS PLL 270MHz clock. This is specified in Table 5-11 Clock Root Table of the i.MX 7Dual Applications Processor Reference Manual. While it could be a documentation error, the 270MHz parent is also mentioned in the boot ROM configuration in Table 6-28: The clock is by default at 135MHz due to a POST_PODF value of 1 (=> divider of 2). Signed-off-by: Stefan Agner <stefan@agner.ch> (cherry picked from commit 8183b60202754d9d33ac1a2a68a5cc2cc4640fc6)
* MLK-12603: mtd: gpmi: may use legacy bch geometry in u-bootHan Xu2016-05-23-1/+7
| | | | | | | | | provide one config "CONFIG_NAND_MXS_BCH_LEGACY_GEO" to keep using legacy bch geometry. NOTICE: the feature must be enabled/disabled in both u-boot and kernel. Signed-off-by: Han Xu <han.xu@nxp.com>
* MLK-12371-2: imx: mx7dsabresd: fix POR reset failed after DDR enter retentionRobin Gong2016-05-23-0/+12
| | | | | | Since DDR enter retention mode after kernel enter DSM mode, we have to exit DDR retention mode before uboot boot, so add this in DCD and plugin code. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
* MLK-12371-1: imx: mx7d_12x12_lpddr3_arm2: fix POR reset failed after DDR ↵Robin Gong2016-05-23-2/+17
| | | | | | | | | | enter retention Since DDR enter retention mode after kernel enter DSM mode, we have to exit DDR retention mode before uboot boot, so add this in DCD and plugin code. Meanwhile correct the HW_ANADIG_SNVS_MISC_CTRL setting to avoid touching other bits. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
* MLK-12393: imx: mx6qamr2: update lpddr2 dcd programming aid settingsAdrian Alonso2016-05-23-5/+5
| | | | | | | | | | | | | | | Adjust optimal valid clock cycles for 400Mhz operation Adjust valid clock cycles before self-refresh exit tCKSRX Adjust valid clock cycles after self-refresh entry tCKSRE Set MMDC1_MPZQHWCCTRL upper 16 bits to default reset value DDR calibration script http://sw-stash.freescale.net/projects/IMX/repos/ddr-scripts-rel/commits/040ee38ba9ad238fcb6053b663746d51321abb69 Test result: Stress test passed. Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
* MLK-12800 imx: mx7dsabresd: support revCPeng Fan2016-05-16-5/+14
| | | | | | | | Add revC board support. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 1f0bb3940876c9b0be6f3c5fc320dde81ced4d97) (cherry picked from commit e28beed75d8c501777f6eeadd127b1cb601115f8)
* MLK-12791 mx6qpsabresd: Change ENET TXCLK clock from PLLYe Li2016-05-16-0/+10
| | | | | | | | | | | | | In u-boot, i.MX6QP sabresd board uses 125Mhz ref clock from PHY, While kernel uses the clock from internal PLL by setting GPR5 bit 9. When doing warm reset in kernel, the GPR regigster is not reset, so the clock source still is the PLL. This causes ENET in u-boot can't work. In this patch, we change the u-boot to use internal PLL to align with kernel for i.MX6QP. This also fixes the ENET issue after kernel warm reset. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 7f00c72e17e4e440df62aa4945a619fdbc9cfd8f)
* MLK-12748-3 imx: adjust imx7d lpddr3 lpsr exit flowAnson Huang2016-05-09-1/+13
| | | | | | | | | | | | On i.MX7D lpddr3, retention mode exit flow should restore more registers to make sure the ddr controller and ddr phy settings restored properly, otherwise, some of the boards can NOT pass memtester after retention mode exited. For LPSR mode, ddr resume flow is same as retention mode, just adjust it accordingly. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* MLK-12748-2 imx: remove IOMUXC GPR setting for i.mx7d retention modeAnson Huang2016-05-09-3/+3
| | | | | | | | i.MX7D TO1.2 removes the DDR PADs retention mode setting in IOMUXC GPR, it is same as TO1.0, so only apply the IOMUXC GPR setting for TO1.1. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* MLK-12748-1 imx: adjust i.mx7d standby voltage settingAnson Huang2016-05-09-16/+16
| | | | | | | i.MX7D VDD_ARM/SOC standby voltage should be 0.95V, adding 25mV margin, so set it to 0.975V; Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* MLK-12723 imx: Change the env offset on NAND to 60MYe Li2016-05-06-14/+14
| | | | | | | | | | | | | | | | Current environment offset on NAND is 37MB, this will cause a alignment issue when erasing if nand erase block is 2MB. The saveenv is failed. => saveenv Saving Environment to NAND... Erasing NAND... Attempt to erase non block-aligned data Since the max erase block we supported is 4MB, adjust the env offset to 60MB, where is the last 4MB in 64MB reserved area for boot. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 27e318ff148bdbeda0d8d80685dc5b4b159a3841)
* MLK-12705-2 imx7d: add build target for TO1.1Anson Huang2016-04-29-6/+6
| | | | | | | Default build target supports TO1.0 and TO1.2, TO1.1 uses its own defconfig. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* MLK-12705-1 ARM: imx: add support for i.MX7D TO1.2Anson Huang2016-04-29-59/+59
| | | | | | | i.MX7D TO1.2 uses same DDR script as TO1.0, TO1.1 uses dedicated DDR script. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* MLK-12576 imx: imx6ul: disable POR_B internal pull uprel_imx_4.1.15_1.1.1_patchrel_imx_4.1.15_1.1.0_gaAnson Huang2016-03-24-0/+9
| | | | | | | | | From TO1.1, SNVS adds internal pull up control for POR_B, the register filed is GPBIT[1:0], after system boot up, it can be set to 2b'01 to disable internal pull up. It can save about 30uA power in SNVS mode. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* MLK-12563: imx: mx6ul evk: fix LCD_nPWREN settingPeng Fan2016-03-15-1/+1
| | | | | | | | Q901 is PMOS, LCD_nPWREN should be at low voltage then output is 3V3. If LCD_nPWREN is high, output is 2.4V which is not correct. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit b54bb7111af62a19a8aa930f8bbcf03f9515b863)
* MLK-12551: imx6ul evk: fix 74LV OE usagePeng Fan2016-03-15-8/+2
| | | | | | | | | | | | Fix 74LV OE gpio index. pinmux is correct, but gpio index is wrong, so gpio output will not have effect, since we use wrong GPIO5_IO18, but not correct GPIO5_IO8. And at the end of the initialization of 74lv init, should keep OE voltage level at LOW, but not high. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit be7654b4cd7edd456ca8d5df3a51cc04ee2fb8f4)
* MLK-12492-2 ecspi: Add ecspi fuse module check only for MX6rel_imx_4.1.15_1.0.0_gaYe Li2016-03-04-0/+2
| | | | | | | | Need the CONFIG_MX6 for using the mx6_ecspi_fused funtion, otherwise will break build for other platforms like MX7. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 9433975cef6a5aef3ff4709ebe68ba97f78740f0)
* MLK-12492-1 mx6: fix type style problems introduced by patch MLK-12483Ye Li2016-03-04-105/+106
| | | | | | | | Some type style problems found by review-commits for previous patch MLK-12483, fix them in this patch and re-check. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 8ada91778f7f28dd33b80f515a35d09c1398933c)
* MLK-12488 mx6sl/ul/sx: Fix incorrect clear mmdc_ch0 handshake maskYe Li2016-03-04-1/+4
| | | | | | | | | | Since the MX6UL/SL/SX only has one DDR channel, in CCM_CCDR register the bit[17] for mmdc_ch0 is reserved and its proper state should be 1. When clear this bit, the periph_clk_sel cannot be set and that CDHIPR[periph_clk_sel_busy] handshake never clears. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 4c3e6cd60f1f15061b391965ebc1ccb158129286)
* MLK-12483-5 mx6ul: Enable module fuse check EVK board and DDR3 ARM2 boardYe Li2016-03-04-2/+49
| | | | | | | | Enable the configurations CONFIG_MODULE_FUSE and CONFIG_OF_SYSTEM_SETUP for module fuse check. And modify board level codes for SD, FEC and EIM. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit f9d57bc73807d14062721a793a2a55be69aa4973)
* MLK-12483-4 mx6: Modify drivers to disable fused modulesYe Li2016-03-04-8/+94
| | | | | | | | | | | Add the fuse checking in drivers, when the module is disabled in fuse, the driver will not work. Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C, USB-EHCI, GIS, LCDIF. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 61789a160ae023ba6f7d37da74be957d22505736)
* MLK-12483-3 mx6: Add a module fuse checkingYe Li2016-03-04-0/+385
| | | | | | | | | | | | | | | | Implement a functionality to read the soc fuses and check if any module is fused. For fused module, we have to disable it in u-boot dynamically, and change the its node in FDT to "disabled" status before starting the kernel. In this patch, we implement the ft_system_setup for FDT fixup. This function will be called during boot process or by "fdt systemsetup" command. To enable the module fuse checking, two configurations must be defined: CONFIG_MODULE_FUSE CONFIG_OF_SYSTEM_SETUP Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 2bce02298d755af0ef7b2aaecc56bcebc1fda61b)
* MLK-12483-2 common: Fix uninitialized return value in image_fdtYe Li2016-03-04-1/+2
| | | | | | | | When using ft_system_setup, the return value fdt_ret is not assigned, so the fdt_strerror(fdt_ret) uses a uninitialized value. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 00667ac75d28fc580b8bcb5db356a7c75f44f02c)
* MLK-12483-1 common: Fix fdt command systemsetup issueYe Li2016-03-04-1/+1
| | | | | | | | | | The fdt command "fdt systemsetup" can't work because the do_fdt check the start char 's' for command "fdt set". So the fdt systemsetup will also go into the "fdt set" in fault. Fix this problem by checking the whole word "set" for "fdt set" command. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 771dab97f93e1ab07a5f2f29f1622528b9477969)
* MLK-12375 imx: mx6ul: fix PMIC_STBY_REQ settinng for TO1.1Peng Fan2016-03-04-6/+8
| | | | | | | TO1.1 already fixed this PMIC_STBY_REQ open drain issue. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit ca666cbc2bff17744f652de72ca258ff9c5275e6)
* MLK-12346 imx: mx7d: switch to use DRAM_PLL, but not DRAM_ALT_CLK_ROOTPeng Fan2016-03-04-24/+79
| | | | | | | To simplify kernel clock management, we switch to use DRAM_PLL for DRAM controller and DDR PHY, but not use DRAM_ALT_CLK_ROOT. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-12329-2 imx7d: Add build target for TO1.0Ye Li2016-03-04-0/+42
| | | | | | | | Since only DDR script changed, create build target for SD boot as example to use TO1.0. All default build target for 7D platforms are for TO1.1. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12329-1 imx7d: Update DDR script for TO1.1Ye Li2016-03-04-24/+998
| | | | | | | | | | | | | | | | | | | | On i.MX7D TO1.1, design team adds a mux cell at the CKE path to fix the suspend mode reset issue, but seems it add extra delay on CKE path, so CKE-CK timing violated. When DDR enters self-refresh or retention for long time(> 15seconds per testing on some boards), DDR data corruption occured, not able to decrease CKE delay, so we have to add extra delay on all other signals to balance it. DDR script needs to be fine-tuned according to this hardware change. For DDR3, since the timing margin is not good, we have to decrease the DDR frequency from 533Mhz to 400Mhz. Compass link: http://compass.freescale.net/livelink/livelink?func=ll&objid=235010235&objAction=browse&sort=name Test: Overnight tests passed on all changed boards. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12296 imx: mx7dsabresd: Change default env for M4 boot to TCMYe Li2016-03-04-13/+24
| | | | | | | | | | | | Since the QSPI needs to rework on this board, at default the QSPI is disabled. So bind the M4 QSPI boot with QSPI enabled u-boot image, set default M4 boot to TCM. Need to use TCM m4 image at default. Additional, on SDB there is only one QSPI flash. Considering the A7 QSPI boot case, we have to move M4 image to 1M offset to give enough space for u-boot and env. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12261 MX6DQ{P}/DL:SABRESD Fix bmode eMMC failureYe Li2016-03-04-1/+1
| | | | | | | | | | The BOOTCFG value used by bmode for SABRESD eMMC boot are actually for SD card. Fixed the value to correct one. The issue was fixed in 2014.04 u-boot, but that patch seems missed during porting to 2015.04. Signed-off-by: Ye Li <ye.li@nxp.com>
* MA-7455-2 Workaround to pass compile for picoHaoran Wang2016-03-04-0/+1
| | | | | | | | | We have some vendor specific codes in board/freescale/common which the picoimx configs also need them when Android or Brillo configs is enabled. So added the folder in Makefile to pass the compile. Signed-off-by: Haoran Wang <Haoran.Wang@freescale.com>
* MA-7455-1 Pico: modify Pico configuration for Brillo.Haoran Wang2016-03-04-2/+8
| | | | | | Modify the picosom to be suit for Brillo configurations. Signed-off-by: Haoran Wang <Haoran.Wang@freescale.com>
* MA-7455 Import picosom boot codesHaoran Wang2016-03-04-0/+1329
| | | | | | | | Imported the picosom boot codes and board configs from technexion. Signed-off-by: Tapani Utriainen <tapani@technexion.com> Signed-off-by: Haoran Wang <Haoran.Wang@freescale.com>
* MLK-12195 imx: mx6/7 define CONFIG_SYS_VSNPRINTFPeng Fan2016-03-04-2/+6
| | | | | | | Define CONFIG_SYS_VSNPRINTF to use snprintf, but not sprintf. Coverity ID: 17926. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-12206 common: usb: fix check conditionPeng Fan2016-03-04-1/+1
| | | | | | | | | | | | | | We support max 16 endpoints, but endpoint starts from 0. So we need to use >= 16 but not > 16 to check whether we already reach max endpoints or not. Coverity ID 17955: Out-of-bounds read (OVERRUN) 37. overrun-local: Overrunning array dev->config.if_desc[ifno].ep_desc of 16 9-byte elements at element index 16 (byte offset 144) using index epno (which evaluates to 16). Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-12201 common: env: fix out of bounds readPeng Fan2016-03-04-1/+1
| | | | | | | | | We should use ARRAY_SIZE, but not directly sizeof, otherwise we may access memory that is not belong the array env_flags_varaccess_mask. Coverity ID: 17949 Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-12200 common: cli_simple: use strlcpy instead of strcpyPeng Fan2016-03-04-1/+2
| | | | | | | | | Report Coverity log: Destination buffer too small (STRING_OVERFLOW) string_overflow: You might overrun the 1024 byte destination string lastcommand by writing 1025 bytes from console_buffer Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-12199 common:env fix unintialized scalar valuePeng Fan2016-03-04-1/+11
| | | | | | | Reported by coverity ID: 17900 17902 Using uninitialized value e. Field e.flags is uninitialized when calling hsearch_r Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-12214 NAND:apbh_dma: Fix logically dead code issueYe.Li2016-03-04-3/+3
| | | | | | | | | | The list_first_entry always assumes the list is not empty, it won't return NULL pointer when the list is empty. So the "if (pdesc == NULL)" becomes a dead code. Fix the issue by calling the list_empty before the list_first_entry. (Coverity CID 29934) Signed-off-by: Ye.Li <ye.li@nxp.com>
* MLK-12246: mtd: nand: fix the read from pointer after free issueHan Xu2016-03-04-2/+2
| | | | | | | Fix a read from pointer after free issue in nand error handling path, which was found by coverity. Signed-off-by: Han Xu <han.xu@nxp.com>
* MLK-12209 mmc: cast u8 to unsigned long long to avoid unexpected errorHaibo Chen2016-03-04-12/+12
| | | | | | | | | | | | | | | | | unsigned long long data might have strange data if first bit of u8 data was 1. this patch cast it to (unsigned long long) ex) u8 data8; u64 data64; data8 = 0x80; data64 = (data8 << 24); // 0xffffffff80000000 data64 = (((unsigned long long)data8) << 24); // 0x80000000; (reported by Coverity) Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
* common: env: initialize scalar variablePeng Fan2016-03-04-0/+2
| | | | | | | | | | | | | | | | | Before calling hsearch_r, initialize callback entry to NULL. Coverity log: " Uninitialized scalar variable (UNINIT) uninit_use_in_call: Using uninitialized value e. Field e.callback is uninitialized when calling hsearch_r. " Reported-by: Coverity Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> (cherry picked from commit 5a6894397a657edec5d0cf4e20968cc66a368c51)
* common: nvedit: use snprintf instead of sprintfPeng Fan2016-03-04-1/+1
| | | | | | | | | | | | | | | | | Use snprintf to replace sprintf. Coverity log: " Unbounded source buffer (STRING_SIZE) string_size: Passing string init_val of unknown size to sprintf. " Reported-by: Coverity Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> (cherry picked from commit 5d49b4cdf9417b88476567c8ec78ff185d84b10f)
* common: cli: avoid memory leakPeng Fan2016-03-04-1/+1
| | | | | | | | | | | Whether CONFIG_SYS_HUSH_PARSER is defined or not, should always check to free 'buff' to avoid memory leak. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Tom Rini <trini@konsulko.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> (cherry picked from commit 09a788624dbe32aeeb0d74c97c0965303eb96d8c)
generated by cgit v1.1 at 2024-05-13 01:17:18 +0000