| Commit message (Collapse) | Author | Age | Lines |
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Use snprintf to replace sprintf.
Coverity log:
"
Unbounded source buffer (STRING_SIZE)
string_size: Passing string init_val of unknown size to sprintf.
"
Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
(cherry picked from commit 5d49b4cdf9417b88476567c8ec78ff185d84b10f)
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Whether CONFIG_SYS_HUSH_PARSER is defined or not, should always
check to free 'buff' to avoid memory leak.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
(cherry picked from commit 09a788624dbe32aeeb0d74c97c0965303eb96d8c)
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The latest iomux head file generated by tool has added some new pinmux settings. Update the
mx6ul_pins.h to this version.
Signed-off-by: Ye.Li <ye.li@nxp.com>
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Need to free memory avoid memory leak, when error.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
(cherry picked from commit c6bb23c819b5dcbc5c3491673f5e408c0b9c38b3)
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The following code will alloc memory for new_dev and ldev:
"
new_dev = mdio_alloc();
ldev = malloc(sizeof(*ldev));
"
Either new_dev or ldev is NULL, directly return, but this may leak memory.
So before return, using free(ldev) and mdio_free(new_dev) to avoid
leaking memory, also free can handle NULL pointer.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
(cherry picked from commit 746da1bd42aa5ecc47898399514c9c76d0329706)
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"enable" is unsigned char type and its value will not be
negative, so discard "enable < 0".
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Diego Santa Cruz <Diego.SantaCruz@spinetix.com>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 678e9316d48f78d162f705846b6f6eeab4aa5dd0)
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The entry name of mii_dev is an array not pointer, so
no need to check.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
(cherry picked from commit d39449b110c8da47bf5b8dc372bd5cd1c33a1a67)
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If condition of "(load == image_start || load == image_data)" is true,
should use "fdt_addr = load;", but not "fdt_blob = (char *)image_data;",
or fdt_blob will be overridden by "fdt_blob = map_sysmem(fdt_addr, 0);"
at the end of the switch case.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Suriyan Ramasami <suriyan.r@gmail.com>
Cc: Paul Kocialkowski <contact@paulk.fr>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit 2ea47be02f356ff275fa5c50392ea510ddb4a96c)
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Condition "(value == NULL && ++value == NULL)" actully will
always return false.
Instead, use condition "(value == NULL || *(value + 1) == 0)" to detect
such expression "c=". To "c=", *(value + 1) is 0, so directly return -1,
but not continue.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Rabin Vincent <rabin@rab.in>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit aa722529635c16c52d9d609122fecc96ec8d03e4)
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Before continue, check return value of strict_strtoul.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
(cherry picked from commit bc3c89b1308281edceb67051a44026545dc7b505)
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Currently there is no API to uninitialize mdio. Add two APIs for this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
(cherry picked from commit cb6baca77bca0ef999203a7ed73bd123e7da062e)
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Introudce wp_enable. If want to check WPSPL, then in board code,
need to set wp_enable to 1.
Take i.MX6UL for example, to some boards, they do not use WP singal,
so they does not configure USDHC1_WP_SELECT_INPUT, and its default
value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and
SION bit set. So USDHC controller can always get wp signal and WPSPL
shows write protect and blocks driver continuing. This is not what
we want to see, so add wp_enable, and if set to 0, just omit the
WPSPL checking and this does not effect normal working of usdhc
controller.
Suggested-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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There is a bad dhcp server which always gives board ipaddr 0.0.0.0,
and board can not get ipaddr from correct dhcp server, since the bad
dhcp server always reply the board's dhcp packet with bad address.
We can ignore the bad dhcp server by checking the assigned ipaddr,
checking whether it is 0 or not.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Fix mmdc_ch0 clk calculation. Also add PLL_AUDIO/VIDEO support
for decode_pll.
Reported-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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The management data input/output (MDIO) requires open-drain,
i.MX7D TO1.0 ENET MDIO pin has no open drain, but TO1.1 supports
this feature. So to TO1.1, need to enable open drain by setting
bits GPR0[8:7] for TO1.1.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add mx6qarm2 new board revision support using mx6q pop SoC
Enable DRAM support for imx6q PoP SoC with populated LPDDR2
MT42L128M64D2
DDR calibration script
http://sw-stash.freescale.net/projects/IMX/repos/ddr-scripts-rel/commits/e5c6184940486bcbc28978d60ad3cd996c205a08
Test result: Stress test passed.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
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Since i.MX7D SDB revB board has some HW changes, we have modify the BSP file to support new pinmux.
1. OTG2 PWR pin is changed to GPIO1_IO07.
2. A enet2_en pin is added for isolating enet2 signals with EPDC, we also add support for enet2.
3. pin6 of 74LV output is changed for CSI PWDN. Set output to high to power down it.
This patch also tries to get the board id and apply changes according with it. Since current
RevB board does not burn GP1 fuse for board id, we have to check the TO rev instead even it is not very
exact. Will update this if any new way implemented.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Current Micron DDR MT41K256M16HA-125 on i.MX6UL will be EOL. Plan is i.MX6UL
will use the new 20nm litho 4Gb DDR3L MT41K256M16TW-107.
Update DDR script of mx6ul evk board for this new DDR, and use it as default.
http://compass.freescale.net/livelink/livelink?func=ll&objId=234910940&objAction=browse&viewType=1
Test result:
Stress test passed.
Meanwhile add build targets below for old DDR support:
mx6ul_14x14_evk_ddr_eol_android_defconfig
mx6ul_14x14_evk_ddr_eol_brillo_defconfig
mx6ul_14x14_evk_ddr_eol_defconfig
mx6ul_14x14_evk_ddr_eol_qspi1_defconfig
Signed-off-by: Ye.Li <B37916@freescale.com>
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We can rely on finish bit for temperature reading for TO1.1.
Also introduce CHIP_REV_xx macros for 7D.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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i.MX7D TO1.1 changes DDR retension mode control to IOMUXC_GPR,
add support to this change for LPSR which needs to exit from
DDR retension mode.
Signed-off-by: Anson Huang <Anson.Huang@freescale.com>
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Clear DLL_CTRL delay line settings at USDHC initialization to eliminate the
pre-settings from boot rom. U-boot should re-init the USDHC not reply on the
value set by boot from.
On MX6DL, the ROM has set the default delay line(DLLCTRL) to 0x1000021,
when eMMC works on DDR mode in kernel, it will possibly cause data CRC errors.
Even u-boot always use eMMC in SDR mode, for safety sake, it is better to clear it too.
Signed-off-by: Ye.Li <B37916@freescale.com>
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change the imx7d arm2 nand rootfs partition index from 3 to 4 since the
weim nor was enabled by default and took the first mtd partition.
Signed-off-by: Han Xu <b45815@freescale.com>
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By Coverity check, the clk_set_rate function dereferences the clk pointer
without checking whether it is NULL. This may cause problem when clk is NULL.
Fix the problem by adding NULL check.
Signed-off-by: Ye.Li <B37916@freescale.com>
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According to the Coverity result, a unsigned int variable is used fo less-
than-zero comparison, the result is never true. Need to fix the variable
type to signed int.
Signed-off-by: Ye.Li <B37916@freescale.com>
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uboot will fail when loader zImage which is larger than 9M.
Increasing CONFIG_SYS_BOOTM_LEN from 8 MB to 16 MB is necessary to
support uncompressing images larger than 8 MB.
Signed-off-by: Zhang Sanshan <b51434@freescale.com>
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Android's tool chain enable the -mandroid at default.
This option will enable the -fpic, which cause uboot compilation
failure:
"
LD u-boot
u-boot contains unexpected relocations: R_ARM_ABS32
R_ARM_RELATIVE
"
In my testcase, arm-linux-androideabi-gcc-4.9 internally
enables '-fpic', so when compiling code, there will be
relocation entries using type R_ARM_GOT_BREL and .got
section. When linking all the built-in.o using ld, there
will be R_ARM_ABS32 relocation entry and .got section
in the final u-boot elf image. This can not be handled
by u-boot, since u-boot only expects R_ARM_RELATIVE
relocation entry.
arm-poky-linux-gnueabi-gcc-4.9 default does not enable '-fpic',
so there is not .got section and R_ARM_GOT_BREL in built-in.o.
And in the final u-boot elf image, all relocation entries are
R_ARM_RELATIVE.
we can pass '-fno-pic' to xxx-gcc to disable pic. whether
the toolchain internally enables or disables pic, '-fno-pic'
can work well.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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We need to access reg stp_rep9, but not stp_rep[(9 - 1) / 2].
If using "__raw_writel(0, DI_STP_REP(disp, 9))", this will exceeds
the size of stp_rep array.
Acked-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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ret should not use unsigned integer. Should use signed interger to
compare against 0.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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birllo use gcc-4.9 to compile kernel, zImage is large then 8M.
set CONFIG_SYS_BOOTM_LEN to 16M
Signed-off-by: fang hui <b31070@freescale.com>
Conflicts:
include/configs/mx6ul_14x14_evk_brillo.h
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update will fail"
This reverts commit 24356fe059abbc9eae1b192f7af8a46f204a36f4.
Conflicts:
common/image-android.c
Conflicts:
common/image-android.c
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Windows DeviceIoControl SCSI_PASSTHROUGH is not stable when report media is
not ready.
Use dummy fat file to workaround this issue and avoid windows popup
format dialog.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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http://sw-stash.freescale.net/projects/IMX/repos/ddr-scripts-rel/commits/8111e4d0cd81226899be637013048281e3c097b4
http://compass.freescale.net/livelink/livelink?func=ll&objId=234753630&objAction=browse&viewType=1
arik_r2_sabre_ddr3_528_1.13.inc is for sabre-AI
arik_r2_sdb_ddr3_528_1.13.inc is for sabresd
1.13<-1.12:
Change log:
1. Remove 20c4080
1.12<-1.10
Change log:
1. NoC register DDRCONF change to 0 which is compatible
for only CS0 is used on board
2. Change 2 values to compatible with our DDR aid script,
these two registers doesn’t have any effect on current system
tRPA = 0;
//this bit only used in DDR2 mode
tAOFPD/tAONPD=0x4;
//These register only works when MDPDC. SLOW_PD = 1 which is 0 in script
Test results:
One mx6qp-sdb and one mx6qp-ard board and one mx6qp-ard board passed
60 hours memtester stress teset.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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The fastboot.exe will get var partition-type:* firstly when "fastboot flash * *".
The uboot did not support get var partition-type: default.
This patch mask info the error when gat cat partition-type.
Signed-off-by: zhang sanshan <b51434@freescale.com>
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will fail
The ota update script will set selinux label with set_metadata when do nand ota update.
The root cause is set_metadata will fail if disable selinux in recovery mode.
This patch is a workaround which will enable selinux in recovery mode,
even if have disable selinux in commandline.
Signed-off-by: zhang sanshan <b51434@freescale.com>
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The ci_udc driver tries to use the ULPI interface for the USB OTG controller,
but this type is not supported by all i.MX6 and i.MX7 platforms. When setting to
ULPI, other platforms except the 6UL refuse the settings and keep default value.
But on 6UL, the PTW bit of PORTSC1 register which is documented as RO can change.
This cause the interface setting problem with USB PHY.
Fix the issue by removing the ULPI setting for i.MX6 and i.MX7. All will use default
UTMI setting.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Fixed the issue that mfgtool failed to download u-boot with plugin enabled.
The u-boot plugin common codes should not call rom___pu_irom_hwcnfg_setup
when using serial download mode.
rom___pu_irom_hwcnfg_setup will load the IVT2 image from boot media, but this
is invalid for USB serial download mode.
Signed-off-by: Ye.Li <B37916@freescale.com>
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According to the latest datasheet(Rev. B, 07/2015), the VDD_SOC_IN
standby voltage should be 1.05V and on i.MX6QP, we can use the PMIC
'APS' mode in standby. we add a 25mV margin to cover the IR drop and
board tolerance, so the standby voltage of VDD_SOC_IN should be
setting to 1.075V.
Signed-off-by: Bai Ping <b51503@freescale.com>
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on i.MX6QP SDB board, the SW1A/B/C regulator is used by
VDD_SOC_IN, the regulator of VDD_ARM_IN is SW2, the voltage
setting for VDD_ARM_IN should be corresponding to SW2. So fix
the regulator mismatch issue on i.MX6QP SDB board.
Signed-off-by: Bai Ping <b51503@freescale.com>
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http://sw-stash.freescale.net/projects/IMX/repos/ddr-scripts-rel/commits/963fbc75ef6d36e12819e81de23410749754e5ef
http://compass.freescale.net/livelink/livelink?func=ll&objId=234709279&objAction=browse&viewType=1
Main change: (SDB board ddr density is different)
1. tRFC is different with density, tXS/tXPR refers tRFC
Test Results:
2 MX6DP-SDB and 2 MX6QP-SDB boards passed overnight stress test.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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The current 36M offset will conflict with NAND FCB firmware2 when the
nand chip block is 1MB size. This patch change it to 36M + 1M offset,
so the redundant u-boot at firmware2 will not be broken.
Signed-off-by: Ye.Li <B37916@freescale.com>
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ddr script update to 1.09:
http://compass.freescale.net/livelink/livelink?func=ll&objId=
234694528&objAction=browse&viewType=1
arik_r2_sabre_ddr3_528_1.09.inc is for sabre-auto board.
arik_r2_sdb_ddr3_528_1.09.inc is for sabre-sd board.
Changelog:
1. Optimize DQS duty cycle setting
2. Optimize ZQ PU/PD value
Test results:
2 ARD boards.
2 6QP-SDB boards.
1 6DP-SDB board.
All passed overnight memtester stress test.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit ba8dcef9d8e10e46130559ce6defe4411bd1d1a6)
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1. Default support SPI-NOR for imx6q/dl/solo sabresd board.
2. Fix bug for mx6soloxxx_spinor_defconfig. "nosmp" should be
\"nosmp\".
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Same issue as ENGR00321137, commit 3695635.
GIS module need total 3M+3M+1.5M+1.5M=9M video memory.
and sys reserved 16M memory for malloc.
When gis module enabled, malloc may failed to allocate memory
for other modules, that may cause system hang.
Expand malloc pool to 32M.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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The previous 8M address for NAND env might conflict with other boot
parameters as the NAND block size increasing, change it to 36M to avoid
it.
Signed-off-by: Han Xu <b45815@freescale.com>
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The cod change updated the NAND driver BCH ECC layout algorithm to
support large oob size NAND chips(oob > 1024 bytes).
Current implementation requires each chunk size larger than oob size so
the bad block marker (BBM) can be guaranteed located in data chunk. The
ECC layout always using the unbalanced layout(Ecc for both meta and
Data0 chunk), but for the NAND chips with oob larger than 1k, the driver
cannot support because BCH doesn’t support GF 15 for 2K chunk.
The change keeps the data chunk no larger than 1k and adjust the ECC
strength or ECC layout to locate the BBM in data chunk. General idea for
large oob NAND chips is
1.Try all ECC strength from the minimum value required by NAND spec to
the maximum one that works, any ECC makes the BBM locate in data chunk
can be chosen.
2.If none of them works, using separate ECC for meta, which will add one
extra ecc with the same ECC strength as other data chunks. This extra
ECC can guarantee BBM located in data chunk, of course, we need to check
if oob can afford it.
Signed-off-by: Han Xu <b45815@freescale.com>
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enlarge the maximum nand page size and oob size to
16k byte and 1280byte.
Signed-off-by: Han Xu <b45815@freescale.com>
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According to the latest datasheet(Rev. C Draft 1, 10/2015) of
i.MX7D, change the VDD_SOC voltage to 0.95V in run mode, and
add a 25mV margin to cover the IR drop and board tolerance.
So setting VDD_SOC voltage to 0.975V.
Signed-off-by: Bai Ping <b51503@freescale.com>
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IC team releases new DDR script "EVK_IMX6UL_DDR3L_400MHz_16bit_V1.2.inc",
update it to DCD and plugin for i.MX6UL 14x14 EVK board.
Updated items:
Removed:
0x020c4084
0x021B0858
Value changed:
0x020E027C
0x020E0280
0x021B0008
0x021B000C
0x021B0010
0x021B0018
0x021B08C0
The script versions of EVK board and Validation Board from the following link:
http://compass.freescale.net/livelink/livelink?func=ll&objId=234191407&obj
Action=browse&viewType=1
Test Results:
Two boards passed overnight memtester stress test.
Signed-off-by: Ye.Li <B37916@freescale.com>
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The PST bit can't be set too small which will cause performance drop.
Refer the commit for same issue on MX6UL 9x9 EVK, now fix it for 14x14 LPDDR2 ARM2
commit e1ca547d198dde94c4d8278c99499ec2d2008880
Signed-off-by: Ye.Li <B37916@freescale.com>
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The actual memory size is 256MB not 512MB, otherwise it has a wrap
problem in memory and will cause memtester failed.
Signed-off-by: Ye.Li <B37916@freescale.com>
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