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* PPC4xx: Reduce NAND TLB window size on CanyonlandsFelix Radensky2011-01-10-1/+1
| | | | | | | 16MiB NAND TLB window is way too big. Reduce it to 1KiB. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove PCI support from lwmon5Stefan Roese2011-01-10-17/+0
| | | | | | | PCI is not used at all on lwmon5. So lets remove it. It saves space and reduces boot time a bit (approx. 50ms). Signed-off-by: Stefan Roese <sr@denx.de>
* asm-offsets: generate bd_t sizeMike Frysinger2011-01-09-0/+3
| | | | | | | | Some ports set up the board info structure at the same time as the global data structure, and largely keep them together. So generate a define for the board info struct too. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* miiphy: convert to linux/mii.hMike Frysinger2011-01-09-458/+361
| | | | | | | | The include/miiphy.h header duplicates a lot of things from linux/mii.h. So punt all the things that overlap to keep the API simple and to make merging between U-Boot and Linux simpler. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* cfi_flash: avoid flash_verbose when possibleMike Frysinger2011-01-09-0/+6
| | | | | | | The flash_verbose logic is only used by the CFI MTD layer, so if we aren't using that, disable the logic completely. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* cmd editing: mark erase/tab seqs constantMike Frysinger2011-01-09-2/+2
| | | | | | These strings are only read, so no need to have them be writable. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* cmd_mem: localize state variablesMike Frysinger2011-01-09-3/+3
| | | | | | These "last" variables aren't used outside of this file, so add static. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* load_addr: move to common env codeMike Frysinger2011-01-09-1/+2
| | | | | | | | | Rather than keep the load_addr definition with the bootm code (which just happens to use this), move it to the common env code. This way we can disable bootm support completely while retaining load_addr usage with many other commands. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* config_cmd_defaults.h: new header for common u-boot command defaultsMike Frysinger2011-01-09-1/+16
| | | | | | | | | | | | | We have config_defaults.h which are random configuration settings that everyone gets by default. We also have config_cmd_default.h which is a recommended list of defaults but boards have to opt into. Now we have config_cmd_defaults.h which is a list of defaults that everyone gets and has to actively opt out of. For now, we populate it with the bootm command which previously was unable to be disabled. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Clarify applicable licensing terms in COPYING file.Wolfgang Denk2011-01-09-1/+9
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* env: re-add support for auto-completionMike Frysinger2011-01-09-27/+50
| | | | | | | Currently, only basic completion is supported (no globs), but this is what we had previously. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* tqm5200.c: fix warning: 'edid_buf' defined but not usedWolfgang Denk2011-01-09-1/+2
| | | | | | | | Commit 98e6956 "mpc52xx: add support for tqm52xx based board charon" caused build warnings on some systems. Fix these. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de>
* examples: update do_reset prototypeMike Frysinger2011-01-09-1/+2
| | | | | | One more place that was missed during the do_reset() unification. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* cmd_net.c: fix build breakageWolfgang Denk2010-12-23-0/+1
| | | | | | | | | | | | Commit 722b061 "autocomplete: remove runtime handler install" caused some boards (like NETTA2_V2) to break with errors like these: cmd_net.c:296: error: expected expression before ',' token Fix this. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'next' of ../nextWolfgang Denk2010-12-22-2029/+4742
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| * p1022ds: enable reginfo commandMatthew McClintock2010-12-18-0/+1
| | | | | | | | | | | | | | Add reginfo as a default command for p1022ds boards Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * NAND: add NAND_CMD_PARAM (0xec) definitionFlorian Fainelli2010-12-17-0/+1
| | | | | | | | | | | | This command is used to read the device ONFI parameters page. Signed-off-by: Florian Fainelli <florian@openwrt.org>
| * onenand: add yaffs write commandLei Wen2010-12-17-5/+36
| | | | | | | | | | | | | | | | | | | | | | Yaffs image require to use the oob to store some info, so when we burn the yaffs image, we need to also write the image's oob part into flash. This patch add addition suffix to onenand write to give the uboot the power to directly burn the yaffs image to onenand. Signed-off-by: Lei Wen <leiwen@marvell.com>
| * MTD/NAND: fix nand_base.c to use get_timer() correctlyReinhard Meyer2010-12-17-6/+9
| | | | | | | | | | | | | | | | | | This is part of the timer cleanup effort. In the future we only use get_timer() in its intended way to program timeout loops. reset_timer() shall not be used anymore. Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * nand: constify id/manu tablesMike Frysinger2010-12-17-7/+7
| | | | | | | | | | | | These id tables need not be writable. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * config.mk: unify duplicated flag settingMike Frysinger2010-12-17-10/+7
| | | | | | | | | | | | | | | | | | | | Multiple rules are using the expanded AFLAGS/CFLAGS settings and some are getting so long that the rules need to be line wrapped. So unify them in one variable, use that variable in the rule, and then unwrap things. This makes the actual `make` output nicer as it doesn't have line continuations in it anymore. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * powerpc: fix register usage in some inline assembly codeTimur Tabi2010-12-17-11/+19
| | | | | | | | | | | | | | In some usages of inline assembly, hard-coded registers were specified when a scratch register should have been used instead. Signed-off-by: Timur Tabi <timur@freescale.com>
| * hashtable: drop all non-reentrant versionsMike Frysinger2010-12-17-77/+35
| | | | | | | | | | | | | | | | | | | | | | The non-reentrant versions of the hashtable functions operate on a single shared hashtable. So if two different people try using these funcs for two different purposes, they'll cause problems for the other. Avoid this by converting all existing hashtable consumers over to the reentrant versions and then punting the non-reentrant ones. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * 74xx_7xx/mpc86xx/ppmc7xx: Fix do_reset() declarationPeter Tyser2010-12-17-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following commit: commit 882b7d726febe65579d6502c271412ecb05821d7 Author: Mike Frysinger <vapier@gentoo.org> Date: Wed Oct 20 03:41:17 2010 -0400 do_reset: unify duplicate prototypes missed the 74xx_7xx and mpc86xx arches and the ppmc7xx board do_reset() functions which resulted in build errors such as: cpu.c:128: error: conflicting types for 'do_reset' include/command.h:102: error: previous declaration of 'do_reset' was here Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * PowerPC, nand_spl: Add relocation support for -fpicJoakim Tjernlund2010-12-17-3/+9
| | | | | | | | | | | | | | | | | | | | | | By rearranging the linker script we get support for relocation of -fpic for free. Move __got2_entries outside _GOT2_TABLE_ defining scope matching the rest of PowerPC Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: Scott Wood <scottwood@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
| * PowerPC: Add relocation support for -fpicJoakim Tjernlund2010-12-17-22/+33
| | | | | | | | | | | | | | | | | | By rearranging the linker script we get support for relocation of -fpic for free. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: Scott Wood <scottwood@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
| * RTC driver for PT7C4338 chip.Priyanka Jain2010-12-17-0/+145
| | | | | | | | | | | | | | | | | | | | | | PT7C4338 chip is being manufactured by Pericom Technology Inc. It is a serial real-time clock which provides: 1)Low-power clock/calendar. 2)Programmable square-wave output. It has 56 bytes of nonvolatile RAM. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Acked-by: Timur Tabi <timur@freescale.com>
| * mpc52xx, charon: change mtd default partitionsHeiko Schocher2010-12-17-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | New default partitions on nor flash: 640k (firmware) 1408k (kernel) 2m (initrd) 4m (small-fs) 24320k (big-fs) 256k (dts) Signed-off-by: Heiko Schocher <hs@denx.de>
| * mpc5200, tqm5200: correct MTDIDS_DEFAULT to fit with name linux assignsHeiko Schocher2010-12-17-6/+6
| | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de>
| * Merge branch 'next' of git://www.denx.de/git/u-boot-cfi-flash into nextWolfgang Denk2010-12-17-3/+60
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| | * cfi_flash: Add optional config register write to cfi-detectionStefan Roese2010-12-17-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the possibility to (optinally) write to the flash configuration register. The Intel style CFI chips support such a register that can be used to configure the operation mode to a non-default value. This method will be used by the t3corp board, which needs to configure the DS617 Xilinx flash for async read mode. Signed-off-by: Stefan Roese <sr@denx.de>
| | * cfi_flash: Use flash_read32() in sector_erased()Stefan Roese2010-12-17-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function sector_erased() is modified to not use pointer access, but to use the correct accessor functions. This fixes a problem on the t3corp board with the Xilinx DS617 flash chips. Here a board specific accessor function is needed to read from flash in 32bit mode. This patch enables such an operation mode. Signed-off-by: Stefan Roese <sr@denx.de>
| | * cfi_flash: Fix problems with status/id read modeStefan Roese2010-12-17-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds some calls to set the flash chip in the read-status- register- or read-id-mode before the corresponding register is read back. This problem was detected while porting the common CFI driver to support the Xilinx DS617 flash chips. Signed-off-by: Stefan Roese <sr@denx.de>
| * | Merge branch 'next' of git://www.denx.de/git/u-boot-ppc4xx into nextWolfgang Denk2010-12-17-604/+142
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| | * | xilinx-ppc4xx-generic: Use common u-boot.ldsRicardo Ribalda Delgado2010-12-17-559/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use common ppc4xx linker script for xilinx ppc440 and ppc405 related boards. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| | * | ppc4xx/POST: Change ethernet test loop count to a default of 10Stefan Roese2010-12-17-15/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the PPC4xx ethernet POST loop test count from currently 192 (256 - 64) to a default of 10. While doing this the max frame size is increased. Each loop run uses a different frame size, starting with a max of 1514 bytes, down to 64. The default loop count of 10 can be overriden using CONFIG_SYS_POST_ETH_LOOPS in the board config header. The TEST_NUM loop has been removed as it was never used. The main reason for this change is to reduce the boot time on boards using this POST test, like the lwmon5 board. This change reduces the boot time by about 600ms on the lwmon5 board. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
| | * | ppc4xx: Update lwmon5 board supportStefan Roese2010-12-17-12/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch includes the following changes for the lwmon5 board support: - Enable cache in SDRAM - Use common EHCI driver instead of the PPC4xx specific OHCI driver This can be done since only high-speed devices are connected. - Remove cached TLB entry again after ECC setup - Use correct define for cache enabling (CONFIG_4xx_DCACHE instead of CONFIG_SYS_ENABLE_SDRAM_CACHE) - Enable FIT image support Signed-off-by: Stefan Roese <sr@denx.de>
| | * | ppc4xx: Clarify comment about boot chip-select in start.SStefan Roese2010-12-17-12/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Ths old comment was quite screwed up. Replace it with a new version that should be a bit more descriptive. Signed-off-by: Stefan Roese <sr@denx.de>
| | * | ppc4xx: t3corp: Add support for the Xilinx DS617 flash chipStefan Roese2010-12-17-6/+50
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The t3corp board has an Xilinx DS617 flash chip connected to the onboard FPGA. This patch adds support for these chips. Board specific flash accessor functions are needed, since the chips can only be read correctly in 16bit mode. Additionally the FPGA chip-selects are configured for device-paced transfers (ready is enabled). Signed-off-by: Stefan Roese <sr@denx.de>
| * | sf: winbond: add support for W25Q16/32/128 partsWojtek Skulski2010-12-17-10/+29
| | | | | | | | | | | | | | | | | | | | | While we're here, cut out the useless id defines too. Signed-off-by: Wojtek Skulski <skulski@pas.rochester.edu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | sf: new driver for EON devicesChong Huang2010-12-17-0/+280
| |/ | | | | | | | | | | Signed-off-by: Chong Huang <chuang@ucrobotics.com> Signed-off-by: Haitao Zhang <minipanda@linuxrobot.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * powerpc/nand spl: link libgccScott Wood2010-12-16-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent GCC (4.4+) performs out-of-line epilogues in some cases, when optimizing for size. It causes a link error for _restgpr_30_x (and similar) if libgcc is not linked. It actually increases size with very small binaries, due to the fixed size of the out-of-line code, and not having any functions that actually need to restore more than 2 or 3 registers. But I don't see a way to turn it off, other than asking GCC to optimize for speed -- which may also increase size for some boards. Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Wolfgang Denk <wd@denx.de>
| * MAINTAINERS: Transfer openrd_base maintainership to Prafulla WadaskarSimon Kagstrom2010-12-16-4/+1
| | | | | | | | Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
| * Armada100: Add Board Support for Marvell Aspenite-DBPrafulla Wadaskar2010-12-16-0/+171
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Aspenite is a Development Board for ASPEN/ARMADA168(88AP168) with * Processor upto 1.2GHz * Parallel 1Gb x8 DDR2-1066 MHz * 16 Mb x16 NOR, 4Gb x8 SLC NAND, footprint for SPI NOR * Footprints for eMMC/eSD NAND & MMC x8 card * 4-in-1 card reader (xD, MMC/SD/MS Pro), CF True IDE socket * SEAF memory board, subset of PISMO2 With Peripherals: * 4.3” WVGA 24-bit LCD * Audio codecs (AC97 & I2S), TSI * VGA camera * Video in via 3 RCA jacks, and HDMI type C out * Marvell 88W8688 802.11bg/BT module * GPS RF IC * Dual analog mics & speakers, headset jack, LED, ambient light sensor * USB2.0 HS host (A), OTG (micro AB) * FE PHY, PCIE Mini Card slot * GPIO, GPIO expander with DIP switches for easier selection UART serial over USB, CIR This patch adds basic board support with DRAM and UART functionality The patch is tested for boot from DRAM using XDB Signed-off-by: Mahavir Jain <mjain@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * mv-common.h: Add support for ARMADA100 PlatformsPrafulla Wadaskar2010-12-16-16/+50
| | | | | | | | | | | | | | This patch adds commonly used macros for ARMADA100 based baords, Also some code reshuffled and updated for typos and comments Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * Serial: Add UART support for Marvell ARMADA 100 SoCs.Prafulla Wadaskar2010-12-16-2/+3
| | | | | | | | | | | | | | | | ARMADA 100 SoCs has NS16550 compatible UART peripheral This patch enables the same for ARMADA100 platforms Signed-off-by: Mahavir Jain <mjain@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * Serial: ns16550: Add support for CONFIG_SYS_NS16550_IER macroPrafulla Wadaskar2010-12-16-2/+6
| | | | | | | | | | | | | | | | | | | | On some processors this ier register configuration is different for ex. Marvell Armada100 This patch introduce CONFIG_SYS_NS16550_IER macro support to unconditionally initialize this register. Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * add Multi Function Pin configuration support for ARMADA100Prafulla Wadaskar2010-12-16-0/+67
| | | | | | | | | | | | This patch adds the support MFP support for Marvell ARMADA100 SoCs Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * gpio: Add Multi-Function-Pin configuration driver for Marvell SoCsPrafulla Wadaskar2010-12-16-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the Marvell SoCs has Multi Function Pin (MFP) configuration registers For ex. ARMADA100. These registers are programmed to expose the specific functionality associated with respective SoC Pins This driver provides configuration APIs, using them, configuration need to be done in board specific code for ex- following code configures MFPs 107 and 108 for UART_TX/RX functionality int board_early_init_f(void) { u32 mfp_cfg[] = { /* Console on UART1 */ MFP107_UART1_RXD, MFP108_UART1_TXD, MFP_EOC /*End of configureation*/ }; /* configure MFP's */ mfp_config(mfp_cfg); return 0; } Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * arm: Add Support for Marvell ARMADA 100 Familiy SoCsPrafulla Wadaskar2010-12-16-0/+650
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARMADA 100 Family processors are highly integrated SoCs based on Sheeva_88SV331x-v5 PJ1 cpu core. Ref: http://www.marvell.com/products/processors/applications/armada_100 SoC versions Supported: 1) ARMADA168/88AP168 (Aspen P) 2) ARMADA166/88AP166 (Aspen M) 3) ARMADA162/88AP162 (Aspen L) Contributors: Eric Miao <eric.y.miao@gmail.com> Lei Wen <leiwen@marvell.com> Mahavir Jain <mjain@marvell.com> Signed-off-by: Mahavir Jain <mjain@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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