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* dreamplug: switch to GENERIC_BOARDIan Campbell2015-03-05-0/+1
| | | | | | | | | Built and booted to a Linux prompt with no issues discovered. network and usb access to the external mmc are ok. (my internal mmc is knackered at the h/w level). Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
* kwbimage: align v1 binary header to 4BChris Packham2015-03-05-0/+1
| | | | | | | | | According to the Armada-XP documentation the binary header format requires the header length to be aligned to 4B. Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* arm: aspenite: convert to generic boardAjay Bhargav2015-03-05-0/+5
| | | | | | | | Enable CONFIG_SYS_GENERIC_BOARD for Marvell Aspenite. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Luka Perkov <luka.perkov@sartura.hr>
* arm: gplugd: convert to generic boardAjay Bhargav2015-03-05-0/+5
| | | | | | | | Enable CONFIG_SYS_GENERIC_BOARD for Marvell gplugD. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Luka Perkov <luka.perkov@sartura.hr>
* arm, da8xx: convert ipam390 board to generic board supportHeiko Schocher2015-03-05-0/+1
| | | | | | enable generic board support for the ipam390 board. Signed-off-by: Heiko Schocher <hs@denx.de>
* travis.yml: some adaptionsHeiko Schocher2015-03-05-26/+89
| | | | | | | | | | | | | | | - adapt to build with eldk-5.4 - add more targets for building with buildman: - freescale -x arm,m68k,aarch64 - arm1136 - arm1176 - arm720t - arm920t - davinci - kirkwood Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Roger Meier <r.meier@siemens.com>
* arm: pxa: introducing cpuinfo display for marvell pxa270mMarcel Ziswiler2015-03-05-2/+15
| | | | | | | | | | | | | | | According to table 2-3 on page 87 of Marvell's latest PXA270 Specification Update Rev. I from 2010.04.19 [1] there exists a breed of chips with a new CPU ID for PXA270M A1 stepping which our latest Colibri PXA270 V2.4A modules actually have assembled. This patch helps in correctly identifying those chips upon boot as well which then looks as follows: CPU: Marvell PXA27xM rev. A1 [1] http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_spec_update.pdf Acked-by: Marek Vasut <marex@denx.de>
* kconfig: common: Fix memtest bool nameNikolaos Pasaloukos2015-03-05-1/+1
| | | | | | | Fix the name appearing in menuconfig for memtest command Signed-off-by: Nikolaos Pasaloukos <Nikolaos.Pasaloukos@imgtec.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com
* woodburn: Convert to generic boardStefano Babic2015-03-05-0/+1
| | | | | | | Boards need to select CONFIG_SYS_GENERIC_BOARD in order to prevent removal from the project. Signed-off-by: Stefano Babic <sbabic@denx.de>
* mx35pdk: Convert to generic boardStefano Babic2015-03-05-0/+1
| | | | | | | Boards need to select CONFIG_SYS_GENERIC_BOARD in order to prevent removal from the project. Signed-off-by: Stefano Babic <sbabic@denx.de>
* flea3: Convert to generic boardStefano Babic2015-03-05-0/+1
| | | | | | | Boards need to select CONFIG_SYS_GENERIC_BOARD in order to prevent removal from the project. Signed-off-by: Stefano Babic <sbabic@denx.de>
* fsl_sec.h: Fix thinkoTom Rini2015-03-05-1/+1
| | | | | | | | In 0200020 we added a number of tests for 'if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_MX6)' and accidentally did one as 'ifdef defined...' Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-03-05-52/+1196
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| * mx5: fix get_reset_causeStefano Babic2015-03-05-17/+2
| | | | | | | | | | | | | | | | | | | | | | | | commit d9f43c8f5c1d7ed27c99a06be85a4bb64b2c73fb sets get_reset_cause() as static, but this conflicts with mx5 where its prototype is in sys_proto.h. Drop it from sys_proto.h and drop print_cpuinfo from mx53_loco, factorizing the call for this board. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Jason Liu <jason.hui@linaro.org>
| * warp: Select BOUNCE_BUFFER and CMD_EXT optionsFabio Estevam2015-03-02-0/+4
| | | | | | | | | | | | | | Add EXT2/EXT4 and BOUNCE_BUFFER support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * warp: Add USB Mass Storage supportFabio Estevam2015-03-02-0/+32
| | | | | | | | | | | | | | | | | | | | With UMS support we are able to flash the eMMC from U-boot, which is very convenient. Add UMS support to make the eMMC flashing process easier. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * mx6slevk: Provide a proper pad configuration for OTG1_ID pinFabio Estevam2015-03-02-1/+6
| | | | | | | | | | | | | | Pass the same pad configuration as done in the kernel so that OTG1_ID pin can properly work in device mode. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * imx6: Added DEK blob generator commandRaul Cardenas2015-03-02-10/+492
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale's SEC block has built-in Data Encryption Key(DEK) Blob Protocol which provides a method for protecting a DEK for non-secure memory storage. SEC block protects data in a data structure called a Secret Key Blob, which provides both confidentiality and integrity protection. Every time the blob encapsulation is executed, a AES-256 key is randomly generated to encrypt the DEK. This key is encrypted with the OTP Secret key from SoC. The resulting blob consists of the encrypted AES-256 key, the encrypted DEK, and a 16-bit MAC. During decapsulation, the reverse process is performed to get back the original DEK. A caveat to the blob decapsulation process, is that the DEK is decrypted in secure-memory and can only be read by FSL SEC HW. The DEK is used to decrypt data during encrypted boot. Commands added -------------- dek_blob - encapsulating DEK as a cryptgraphic blob Commands Syntax --------------- dek_blob src dst len Encapsulate and create blob of a len-bits DEK at address src and store the result at address dst. Signed-off-by: Raul Cardenas <Ulises.Cardenas@freescale.com> Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Ulises Cardenas <ulises.cardenas@freescale.com> Signed-off-by: Ulises Cardenas-B45798 <Ulises.Cardenas@freescale.com>
| * mx6sabre: Select CMD_EXT4 optionsFabio Estevam2015-03-02-0/+2
| | | | | | | | | | | | | | Add EXT4 support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * mx6sabre: Enable User Mass StorageFabio Estevam2015-03-02-0/+14
| | | | | | | | | | | | | | | | | | User Mass Storage is very useful for flashing the on-board eMMC. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * board: tbs2910: Enable USB Mass Storage supportSoeren Moch2015-03-02-0/+13
| | | | | | | | | | | | | | Add USB Mass Storage support. This is useful for flashing the on-board eMMC. Signed-off-by: Soeren Moch <smoch@web.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx35: Fix boot hang by avoiding vector relocationFabio Estevam2015-03-02-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 3ff46cc42b9d73d0 ("arm: relocate the exception vectors") mx35 does not boot anymore. Add a specific relocate_vectors macro that skips the vector relocation, as the i.MX35 SoC does not provide RAM at the high vectors address (0xFFFF0000), and (0x00000000) maps to ROM. This allows mx35 to boot again. Cc: Sebastian Priebe <sebastian.priebe@cadcon.de> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de>
| * mx31: Fix boot hang by avoiding vector relocationFabio Estevam2015-03-02-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 3ff46cc42b9d73d0 ("arm: relocate the exception vectors") mx31 does not boot anymore. Add a specific relocate_vectors macro that skips the vector relocation, as the i.MX31 SoC does not provide RAM at the high vectors address (0xFFFF0000), and (0x00000000) maps to ROM. This allows mx31 to boot again. Cc: Anatolij Gustschin <agust@denx.de> Cc: Magnus Lilja <lilja.magnus@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mx25pdk: Turn on the LCD supplyFabio Estevam2015-03-02-2/+2
| | | | | | | | | | | | | | | | | | Currently there is no support for MC34704 PMIC in the mainline kernel. Turn on the LCD supply via bootloader for the time being, so that we could use the LCD in the kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * mc34704: Add the definition of ONOFFA bitFabio Estevam2015-03-02-0/+1
| | | | | | | | | | | | | | | | ONOFFA is the bit 3 of the GENERAL2 register. Add its definition. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2015-03-02-10781/+9833
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| * | warp: Add initial WaRP Board supportOtavio Salvador2015-02-23-0/+345
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The WaRP Board is a Wearable Reference Plaform. The board features: - Freescale i.MX6 SoloLite processor with 512MB of RAM - Freescale FXOS8700CQ 6-axis Xtrinsic sensor - Freescale Kinetis KL16 MCU - Freescale Xtrinsic MMA955xL intelligent motion sensing platform The board implements a hybrid architecture to address the evolving needs of the wearables market. The platform consists of a main board and an example daughtercard with the ability to add additional daughtercards for different usage models. For more information about the project, visit: http://www.warpboard.org/ Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * | imx: mx6sl: Extend USDHC SD2 pins to support 8-wire useOtavio Salvador2015-02-23-0/+5
| | | | | | | | | | | | | | | | | | This adds the DATA[4-7] and RST pin definitions. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * | mmc: fsl_esdhc: Add support to force VSELECT setOtavio Salvador2015-02-23-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards cannot do voltage negotiation but need to set the VSELECT bit forcely to ensure it to work at 1.8V. This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * | mmc: fsl_esdhc: Add CMD11 support to switch to 1.8VOtavio Salvador2015-02-23-7/+25
| | | | | | | | | | | | | | | | | | | | | This adds support to switch to 1.8V in case CMD11 succeeds. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Marek Vasut <marex@denx.de>
| * | imx:mx6slevk implement power init boardPeng Fan2015-02-23-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement power_init_board and related I2C interface configuration. After adding this, uboot can successfully detect and configure pmic. " U-Boot 2015.01-00281-ge29eddf (Feb 12 2015 - 09:24:01) CPU: Freescale i.MX6SL rev1.0 at 396 MHz Reset cause: POR Board: MX6SLEVK I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 " Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * | imx:mx6slevk add pmic and i2c configurationPeng Fan2015-02-23-0/+12
| | | | | | | | | | | | | | | | | | Add pmic and i2c configuration in board header file. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * | imx:mx6sl add I2c pad settingsPeng Fan2015-02-23-0/+5
| | | | | | | | | | | | | | | | | | A few pad settings are I2C1 Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * | board: tbs2910: Gate clock when switching async clock muxesSoeren Moch2015-02-23-12/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the i.MX6Q Reference Manual, clocks must be gated when switching input clocks of async clock muxes. So use clock gates. Avoid ldb_di0_ipu clock, because there is no clock gate for this signal. There have never been any complaints about problems with the old code, but the new approach is in line with the recommendations in the manual. Signed-off-by: Soeren Moch <smoch@web.de>
| * | nitrogen6x: set environment variable reset_causeEric Nelson2015-02-17-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | ARM: i.MX: provide access to reset cause through get_imx_reset_cause()Eric Nelson2015-02-17-1/+11
| | | | | | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| * | ot1200: add eeprom command to non-SPL buildChristian Gmeiner2015-02-17-0/+10
| | | | | | | | | | | | | | | Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | cmd_eeprom: make it possible to define the used i2c busChristian Gmeiner2015-02-17-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A SoC like the i.MX6 supports more then one i2c bus. In oder to be able to use the eeprom command add a new define to specify the i2c bus to use. If CONFIG_SYS_I2C_EEPROM_BUS is not defined there is no functional change, else a call to i2c_set_bus_num(..) is done before calling i2c_read(..) and i2c_write(..). Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | ARM: imx6 Add WDOG3 for i.MX6SXPeng Fan2015-02-17-0/+5
| | | | | | | | | | | | | | | | | | | | | There are three wdogs for i.MX 6SoloX. Add wdog3 support in function imx_set_wdog_powerdown. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
| * | ARM: imx6: disable bandgap self-bias after bootPeng Fan2015-02-17-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The self-bias circuit is used by the bandgap during startup. Once the bandgap has stabilized, the self-bias circuit should be disabled for best noise performance of analog blocks. Also this bit should be disabled before the chip enters STOP mode or when ever the regular bandgap is disabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
| * | Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2015-02-13-24918/+48479
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| * | | imx:mx6 set normal APS and standby PFM modePeng Fan2015-02-11-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To normal mode, use APS switching mode. To standy mode, use PFM switching mode. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
| * | | pmic: fix missing SWITCH_SIZEStefano Babic2015-02-11-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Applying ccbb18713b279f1326479cc10664d247206e9e76, the define disappeared. Fix it. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | | pmic:pfuze implement pmic_mode_initPeng Fan2015-02-11-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to implement pmic_mode_init function, and add prototype in header file. This function is to set switching mode for pmic buck regulators to improve system efficiency. Mode: OFF: The regulator is switched off and the output voltage is discharged. PFM: In this mode, the regulator is always in PFM mode, which is useful at light loads for optimized efficiency. PWM: In this mode, the regulator is always in PWM mode operation regardless of load conditions. APS: In this mode, the regulator moves automatically between pulse skipping mode and PWM mode depending on load conditions. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
* | | | ti: armv7: Move SPL SDRAM init to the right place, drop unused CONFIG_SPL_STACKSimon Glass2015-03-04-25/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently in some cases SDRAM init requires global_data to be available and soon this will not be available prior to board_init_f(). Adjust the code paths in these cases to be correct. In some cases we had the SPL stack be in DDR as we might have large stacks (due to Falcon Mode + Environment). In these cases switch to CONFIG_SPL_STACK_R. In other cases we had simply been setting CONFIG_SPL_STACK into SRAM. In these cases we no longer need to (CONFIG_SYS_INIT_SP_ADDR is used and is also in SRAM) so drop those lines. Signed-off-by: Simon Glass <sjg@chromium.org> Tested on Beagleboard, Beagleboard xM Tested-by: Matt Porter <mporter@konsulko.com> Tested on Beaglebone Black, AM43xx GP EVM, OMAP5 uEVM, OMAP4 Pandaboard Tested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | | Make export interface support CONFIG_SYS_MALLOC_SIMPLESimon Glass2015-03-04-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_SYS_MALLOC_SIMPLE is defined, free() is a static inline. Make sure that the export interface still builds in this case. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | arm: spl: Allow board_init_r() to run with a larger stackSimon Glass2015-03-04-3/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present SPL uses a single stack, either CONFIG_SPL_STACK or CONFIG_SYS_INIT_SP_ADDR. Since some SPL features (such as MMC and environment) require a lot of stack, some boards set CONFIG_SPL_STACK to point into SDRAM. They then set up SDRAM very early, before board_init_f(), so that the larger stack can be used. This is an abuse of lowlevel_init(). That function should only be used for essential start-up code which cannot be delayed. An example of a valid use is when only part of the SPL code is visible/executable, and the SoC must be set up so that board_init_f() can be reached. It should not be used for SDRAM init, console init, etc. Add a CONFIG_SPL_STACK_R option, which allows the stack to be moved to a new address before board_init_r() is called in SPL. The expected SPL flow (for CONFIG_SPL_FRAMEWORK) is documented in the README. Signed-off-by: Simon Glass <sjg@chromium.org> For version 1: Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Bo Shen <voice.shen@atmel.com> Acked-by: Bo Shen <voice.shen@atmel.com> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* | | | dm: tegra: Enable driver model in SPL and adjust the GPIO driverSimon Glass2015-03-04-25/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the full driver model GPIO and serial drivers in SPL now that these are supported. Since device tree is not available they will use platform data. Remove the special SPL GPIO function as it is no longer needed. This is all in one commit to maintain bisectability. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | arm: spl: Avoid setting up a duplicate global data structureSimon Glass2015-03-04-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is already set up in crt0.S. We don't need a new structure and don't really want one in the 'data' section of the image, since it will be empty and crt0.S's changes will be ignored. As an interim measure, remove it only if CONFIG_DM is not defined. This allows us to press ahead with driver model in SPL and allow the stragglers to catch up. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | arm: Reduce the scope of lowlevel_init()Simon Glass2015-03-04-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function has grown into something of a monster. Some boards are setting up a console and DRAM here in SPL. This requires global_data which should be set up in one place (crt0.S). There is no need for SPL to use s_init() for anything since board_init_f() is called immediately afterwards. Signed-off-by: Simon Glass <sjg@chromium.org>
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