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* arm: pxa: Add support for ICP DAS LP-8x4xSergey Yanovich2013-06-12-0/+455
| | | | | | | | | | | | | | | LP-8x4x is a programmable automation controller by ICP DAS. It is shipped with outdated U-Boot v1.3.0 This patch adds enough supports to boot the board: - 128M of 128M SDRAM - 32M of 48M NOR Flash memory - 1 of 4 Serial consoles (PXA FFUART) - 2 of 2 Ethernet controllers (DM9000) Signed-off-by: Sergey Yanovich <ynvich@gmail.com> Series-to: u-boot Series-cc: marex
* cosmetic: arm: fix comments in arch/arm/lib/crt0.SMasahiro Yamada2013-06-10-2/+2
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-10-3726/+1679
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| * arm: da830: moved pinmux configurations to the arch treeVishwanathrao Badarkhe, Manish2013-06-10-132/+181
| | | | | | | | | | | | | | | | | | | | Move pinmux configurations for the DA830 SoCs from board file to the arch tree so that it can be used for all da830 based devices. Also, avoids duplicate pinmuxing in case of NAND. Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
| * ARM: DRA7: Add MaintainerLokesh Vutla2013-06-10-0/+4
| | | | | | | | | | | | Adding Maintainer for DRA7xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * OMAP5: Enable access to auxclk registersLubomir Popov2013-06-10-0/+30
| | | | | | | | | | | | | | | | | | | | auxclk0 and auxclk1 are utilized on some OMAP5 boards. Define the infrastructure needed for accessing them without using magic numbers. Also remove unrelated TPS62361 defines from clocks.h Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
| * ARM: OMAP: I2C: New read, write and probe functionsLubomir Popov2013-06-10-191/+299
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4 (4430/60/70), OMAP5 (5430) and AM335X (3359); should work on older OMAPs and derivatives as well. The only anticipated exception would be the OMAP2420, which shall require driver modification. - Rewritten i2c_read to operate correctly with all types of chips (old function could not read consistent data from some I2C slaves). - Optimised i2c_write. - New i2c_probe, performs write access vs read. The old probe could hang the system under certain conditions (e.g. unconfigured pads). - The read/write/probe functions try to identify unconfigured bus. - Status functions now read irqstatus_raw as per TRM guidelines (except for OMAP243X and OMAP34XX). - Driver now supports up to I2C5 (OMAP5). Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Heiko Schocher <hs@denx.de>
| * arm: Remove OMAP2420H4 and all omap24xx supportTom Rini2013-06-10-3104/+2
| | | | | | | | | | | | | | | | | | The omap2420H4 was the only mainline omap24xx board. Prior to being fixed by Jon Hunter in time for v2013.04 it had been functionally broken for a very long time. Remove this board as there's not been interest in it in U-Boot for quite a long time. Signed-off-by: Tom Rini <trini@ti.com>
| * da830: add MMC supportVishwanathrao Badarkhe, Manish2013-06-10-2/+70
| | | | | | | | | | | | | | Add MMC support for da830 boards in order to perform mmc operations(read,write and erase). Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
| * ARM: OMAP5: Power: Add more functionality to Palmas driverLubomir Popov2013-06-10-19/+204
| | | | | | | | | | | | | | | | | | | | Add some useful functions, and the corresponding definitions. Add support for powering on the dra7xx_evm SD/MMC LDO (courtesy Lokesh Vutla <lokeshvutla@ti.com>). Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Reviewed-by: Tom Rini <trini@ti.com>
| * ARM: DRA7xx: EMIF: Change settings required for EVM boardSricharan R2013-06-10-31/+220
| | | | | | | | | | | | | | | | | | | | | | DRA7 EVM board has the below configuration. Adding the settings for the same here. 2Gb_1_35V_DDR3L part * 2 on EMIF1 2Gb_1_35V_DDR3L part * 4 on EMIF2 Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: DRA7xx: clocks: Update PLL valuesLokesh Vutla2013-06-10-46/+73
| | | | | | | | | | | | | | | | | | | | | | Update PLL values. SYS_CLKSEL value for 20MHz is changed to 2. In other platforms SYS_CLKSEL value 2 represents reserved. But in sys_clk array ind 1 is used for 13Mhz. Since other platforms are not using 13Mhz, reusing index 1 for 20MHz. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * ARM: DRA7xx: Update pinmux dataLokesh Vutla2013-06-10-16/+29
| | | | | | | | | | | | | | Updating pinmux data as specified in the latest DM Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Balaji T K <balajitk@ti.com>
| * mmc: omap_hsmmc: Update pbias programmingBalaji T K2013-06-10-17/+14
| | | | | | | | | | | | | | Update pbias programming sequence for OMAP5 ES2.0/DRA7 Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: DRA7xx: Correct SRAM END addressSricharan R2013-06-10-5/+6
| | | | | | | | | | | | | | | | NON SECURE SRAM is 512KB in DRA7xx devices. So fixing it here. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: DRA7xx: Correct the SYS_CLK to 20MHZSricharan R2013-06-10-8/+13
| | | | | | | | | | | | | | | | | | | | The sys_clk on the dra evm board is 20MHZ. Changing the configuration for the same. And also moving V_SCLK, V_OSCK defines to arch/clock.h for OMAP4+ boards. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: DRA7xx: Change the Debug UART to UART1Sricharan R2013-06-10-4/+7
| | | | | | | | | | | | | | Serial UART is connected to UART1. So add the change for the same. Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * ARM: DRA7xx: Do not enable srcomp for DRA7xx Soc'sLokesh Vutla2013-06-10-0/+11
| | | | | | | | | | | | | | | | Slew rate compensation cells are not present for DRA7xx Soc's. So return from function srcomp_enable() if soc is not OMAP54xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: OMAP5: DRA7xx: support class 0 optimized voltagesNishanth Menon2013-06-10-12/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | DRA752 now uses AVS Class 0 voltages which are voltages in efuse. This means that we can now use the optimized voltages which are stored as mV values in efuse and program PMIC accordingly. This allows us to go with higher OPP as needed in the system without the need for implementing complex AVS logic. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: DRA7xx: clocks: Fixing i2c_init for PMICLokesh Vutla2013-06-10-2/+1
| | | | | | | | | | | | | | | | In DRA7xx Soc's voltage scaling is done using GPI2C. So i2c_init should happen before scaling. I2C driver uses __udelay which needs timer to be initialized. So moving timer_init just before voltage scaling. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: DRA7xx: power Add support for tps659038 PMICLokesh Vutla2013-06-10-1/+80
| | | | | | | | | | | | | | | | TPS659038 is the power IC used in DRA7XX boards. Adding support for this and also adding pmic data for DRA7XX boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: DRA7xx: Add control id code for DRA7xxLokesh Vutla2013-06-10-3/+11
| | | | | | | | | | | | | | | | The registers that are used for device identification are changed from OMAP5 to DRA7xx. Using the correct registers for DRA7xx. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: OMAP4+: pmic: Make generic bus init and write functionsLokesh Vutla2013-06-10-8/+33
| | | | | | | | | | | | | | | | | | | | Voltage scaling can be done in two ways: -> Using SR I2C -> Using GP I2C In order to support both, have a function pointer in pmic_data so that we can call as per our requirement. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: OMAP2+: Rename asm/arch/clocks.h asm/arch/clock.hLokesh Vutla2013-06-10-14/+14
| | | | | | | | | | | | | | To be consistent with other ARM platforms, renaming asm/arch-omap*/clocks.h to asm/arch-omap*/clock.h Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: OMAP5: clocks: Do not enable sgx clocksSricharan R2013-06-10-6/+0
| | | | | | | | | | | | | | | | SGX clocks should be enabled only for OMAP5 ES1.0. So this can be removed. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * ARM: OMAP4+: Cleanup header filesLokesh Vutla2013-06-10-140/+40
| | | | | | | | | | | | | | After having the u-boot clean up series, there are many definitions that are unused in header files. Removing all those unused ones. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * OMAP5: Fix bug in omap5_es1_prcm structLubomir Popov2013-06-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The newly introduced function setup_warmreset_time(), called from within prcm_init(), tries to write to the prm_rsttime OMAP5 register. The struct member holding this register's address is however initialized for OMAP5 ES2.0 only. On ES1.0 devices this uninitialized value causes a second (warm) reset at startup. Add .prm_rsttime address init to the ES1.0 struct. Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Acked-by: Tom Rini <trini@ti.com>
| * OMAP5: add ABB setup for MPU voltage domainAndrii Tseglytskyi2013-06-10-0/+16
| | | | | | | | | | | | | | | | Patch adds a call of abb_setup() function, and proper registers definitions needed for ABB setup sequence. ABB is initialized for MPU voltage domain. Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
| * OMAP3+: introduce generic ABB supportAndrii Tseglytskyi2013-06-10-0/+256
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adaptive Body Biasing (ABB) modulates transistor bias voltages dynamically in order to optimize switching speed versus leakage. Adaptive Body-Bias ldos are present for some voltage domains starting with OMAP3630. There are three modes of operation: * Bypass - the default, it just follows the vdd voltage * Foward Body-Bias - applies voltage bias to increase transistor performance at the cost of power. Used to operate safely at high OPPs. * Reverse Body-Bias - applies voltage bias to decrease leakage and save power. Used to save power at lower OPPs. Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com> Acked-by: Nishanth Menon <nm@ti.com>
| * am33xx: Board: Make CPSW section of ethernet initialization depend on CPSW ↵Joel A Fernandes2013-06-10-0/+2
| | | | | | | | | | | | | | | | driver Not doing so breaks cases where CPSW is not required such as for USB RNDIS network boot. Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
* | arm/km: make local functions staticHolger Brunck2013-06-10-2/+2
|/ | | | Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
* Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-06-08-44/+2818
|\ | | | | | | | | Conflicts: drivers/serial/Makefile
| * vf610twr: Drop unneeded 'status' variableFabio Estevam2013-06-06-4/+1
| | | | | | | | | | | | | | No need to use the 'status' variable, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
| * ARM: imx: Fix incorrect usage of CONFIG_SYS_MMC_ENV_PARTFabio Estevam2013-06-06-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running the "save" command several times on a mx6qsabresd we see: U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed This issue is caused by the incorrect usage of CONFIG_SYS_MMC_ENV_PART. CONFIG_SYS_MMC_ENV_PART should be used to specify the mmc partition that stores the environment variables. On some imx boards it is been incorrectly used to pass the partition of kernel and dtb files for the 'mmcpart' script variable. Remove the CONFIG_SYS_MMC_ENV_PART usage and configure the 'mmcpart' variable directly. Reported-by: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
| * Add support for Congatec Conga-QEVAl boardSARTRE Leo2013-06-04-0/+437
| | | | | | | | | | | | | | | | | | | | Add minimal support (only boot from mmc device) for the Congatec Conga-QEVAl Evaluation Carrier Board with conga-Qmx6q (i.MX6 Quad processor) module. Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * wandboard: Add Boot Splash image with Wandboard logoOtavio Salvador2013-06-03-0/+2
| | | | | | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| * wandboard: Enable HDMI splashscreenFabio Estevam2013-06-03-1/+112
| | | | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * build: Use generic boot logo matchingOtavio Salvador2013-06-03-17/+10
| | | | | | | | | | | | | | | | | | | | | | | | The boot logo matching is now done in following way: - use LOGO_BMP if it is set, or - use $(BOARD).bmp if it exists in tools/logos, or - use $(VENDOR).bmp if it exists in tools/logos, or - use denx.bmp otherwise. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Wolfgang Denk <wd@denx.de>
| * mx6: mx6qsabrelite/nitrogen6x: Remove incorrect setting of gpio CS signalAndrew Gabbasov2013-06-03-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number of gpio signal is packed inside CONFIG_SF_DEFAULT_CS macro (shifted and or'ed with chip select), so it's incorrect to pass that macro directly as an argument to gpio_direction_output() call. Also, SPI driver sets the direction and initial value of a gpio, used as a chip select signal, before any actual activity happens on the bus. So, it is safe to just remove the gpio_direction_output call, that works incorrectly, thus making no effect, anyway. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Tested-by: Robert Winkler <robert.winkler@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
| * mx6qsabreauto: Add Port Expander resetRenato Frias2013-06-03-0/+7
| | | | | | | | | | | | | | | | There are 3 IO expanders on the mx6qsabreauto all reset by the same GPIO, just set it to high to use the IO. Signed-off-by: Renato Frias <b13784@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * mx6qsabreauto: Add i2c to mx6qsabreauto boardRenato Frias2013-06-03-0/+56
| | | | | | | | | | | | | | | | | | | | Add i2c2 and 3 to mx6qsabreauto board, i2c3 is multiplexed use gpio to set steering. Signed-off-by: Renato Frias <b13784@freescale.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * mx6slevk: Allow booting a device tree kernelFabio Estevam2013-06-03-1/+1
| | | | | | | | | | | | | | | | | | | | | | When the mx6slevk board support was added in U-boot there was no device tree support for mx6sl, so only a FSL 3.0.35 was tested at that time. Now that mx6slevk support is available we can boot a device tree kernel, by adjusting CONFIG_LOADADDR into a proper location, so that a non-dt and a dt kernels can be booted. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * arm: mxs: Fix vectoring table craftingMarek Vasut2013-06-03-3/+22
| | | | | | | | | | | | | | | | | | | | | | | | The vectoring table has to be placed at 0x0, but U-Boot on MX23/MX28 starts from RAM, so the vectoring table at 0x0 is not present. Craft code that will be placed at 0x0 and will redirect interrupt vectoring to proper location of the U-Boot in RAM. Signed-off-by: Marek Vasut <marex@denx.de> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
| * arm: vf610: Add basic support for Vybrid VF610TWR boardAlison Wang2013-06-03-0/+627
| | | | | | | | | | | | | | | | | | | | | | VF610TWR is a board based on Vybrid VF610 SoC. This patch adds basic support for Vybrid VF610TWR board. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * arm: vf610: Add Vybrid VF610 to mxc_ocotp documentAlison Wang2013-06-03-0/+1
| | | | | | | | | | | | | | This patch adds Vybrid VF610 to mxc_ocotp document. Signed-off-by: Alison Wang <b18965@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * arm: vf610: Add uart support for Vybrid VF610Alison Wang2013-06-03-0/+133
| | | | | | | | | | | | | | This patch adds lpuart support for Vybrid VF610 platform. Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Alison Wang <b18965@freescale.com>
| * arm: vf610: Add watchdog support for Vybrid VF610Alison Wang2013-06-03-1/+1
| | | | | | | | | | | | This patch adds watchdog support for Vybrid VF610 platform. Signed-off-by: Alison Wang <b18965@freescale.com>
| * net: fec_mxc: Add support for Vybrid VF610Alison Wang2013-06-03-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds FEC support for Vybrid VF610 platform. In function fec_open(), RCR register is only set as RGMII mode. But RCR register should be set as RMII mode for VF610 platform. This configuration is already done in fec_reg_setup(), so this piece of code could just leave untouched the FEC_RCNTRL_RGMII / FEC_RCNTRL_RMII / FEC_RCNTRL_MII_MODE bits. Signed-off-by: Alison Wang <b18965@freescale.com> Reviewed-by: Benoit Thebaudeau <benoit.thebaudeau@advansee.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * arm: vf610: Add Vybrid VF610 CPU supportAlison Wang2013-06-03-1/+1264
| | | | | | | | | | | | | | | | | | | | | | This patch adds generic codes to support Freescale's Vybrid VF610 CPU. It aligns Vybrid VF610 platform with i.MX platform. As there are some differences between VF610 and i.MX platforms, the specific codes are in the arch/arm/cpu/armv7/vf610 directory. Signed-off-by: Alison Wang <b18965@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * arm: vf610: Add IOMUX support for Vybrid VF610Alison Wang2013-06-03-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the IOMUX support for Vybrid VF610 platform. There is a little difference for IOMUXC module between VF610 and i.MX platform, the muxmode and pad configuration share one 32bit register on VF610, but they are two independent registers on I.MX platform. A CONFIG_IOMUX_SHARE_CONFIG_REG was introduced to fit this difference. Signed-off-by: Alison Wang <b18965@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
generated by cgit v1.1 at 2024-11-19 10:41:57 +0000