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* sf: Add CONFIG_SF_DUAL_FLASHJagannadha Sutradharudu Teki2014-01-12-5/+20
| | | | | | | This config will use for defining greater than single flash support. currently - DUAL_STACKED and DUAL_PARALLEL. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add dual memories support - DUAL_PARALLELJagannadha Sutradharudu Teki2014-01-12-9/+45
| | | | | | | | | This patch added support for accessing dual memories in parallel connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add dual memories support - DUAL_STACKEDJagannadha Sutradharudu Teki2014-01-12-11/+138
| | | | | | | | | This patch added support for accessing dual memories in stacked connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: ops: Unify read_ops bank configurationJagannadha Sutradharudu Teki2014-01-12-8/+5
| | | | | | Unified the bar code from read_ops into a spi_flash_bar() Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Code cleanupsJagannadha Sutradharudu Teki2014-01-12-14/+12
| | | | | | | - comment typo's - func args have a proper names Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Divide flash register ops from QEB codeJagannadha Sutradharudu Teki2014-01-11-53/+77
| | | | | | | QEB code comprises of couple of flash register read/write operations, this patch moved flash register operations on to sf_op Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Enable macronix quad read/write cmds supportJagannadha Sutradharudu Teki2014-01-11-4/+4
| | | | | | | | | Added macronix flash quad read/write commands support and it's up to the respective controller driver usecase to configure the respective commands by defining SPI RX/TX operation modes from include/spi.h on the driver. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add macronix set QEB supportJagannadha Sutradharudu Teki2014-01-11-0/+35
| | | | | | | This patch adds set QEB support for macronix flash devices which are trying to program/read quad operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Discover read dummy_byteJagannadha Sutradharudu Teki2014-01-11-7/+32
| | | | | | | Discovered the read dummy_byte based on the configured read command. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add QUAD_IO_FAST read supportJagannadha Sutradharudu Teki2014-01-11-2/+8
| | | | | | This patch adds support QUAD_IO_FAST read command. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Separate the flash params tableJagannadha Sutradharudu Teki2014-01-11-145/+158
| | | | | | | | Moved the flash params table from sf_probe.c and placed on to sf_params.c, hence flash params file will alter based on new addons. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Enable RD_FULL and WR_QPPJagannadha Sutradharudu Teki2014-01-11-30/+30
| | | | | | | | | This patch enabled RD_FULL and WR_QPP for supported flashes in micron, winbond and spansion. Remaining parts will be add in future patches. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Set quad enable bit supportJagannadha Sutradharudu Teki2014-01-11-2/+62
| | | | | | | | | | | | | This patch provides support to set the quad enable bit on flash. quad enable bit needs to set before performing any quad IO operations on respective SPI flashes. Currently added set quad enable bit for winbond and spansion flash devices. stmicro flash doesn't require to set as qeb is volatile. remaining flash devices support will add in future patches. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: ops: Add configuration register writing supportJagannadha Sutradharudu Teki2014-01-11-0/+24
| | | | | | | | | This patch provides support to program a flash config register. Configuration register contains the control bits used to configure the different configurations and security features of a device. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add quad read/write commands supportJagannadha Sutradharudu Teki2014-01-11-89/+113
| | | | | | | | This patch add quad commands support like - QUAD_PAGE_PROGRAM => for write program - QUAD_OUTPUT_FAST ->> for read program Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add extended read commands supportJagannadha Sutradharudu Teki2014-01-11-86/+126
| | | | | | | | | | | Current sf uses FAST_READ command, this patch adds support to use the different/extended read command. This implementation will determine the fastest command by taking the supported commands from the flash and the controller, controller is always been a priority. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* spi: sh_spi: Use sh_spi_clear_bit() instead of open-codedAxel Lin2014-01-11-8/+2
| | | | | | | | We have a sh_spi_clear_bit() function, there's no reason not to use it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sandbox: spi: Adjust 'sf test' to work on sandboxSimon Glass2014-01-11-5/+9
| | | | | | | | Add map_sysmem() calls so that this test works correctly on sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Hung-ying Tyan <tyanh@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* spi: Add Faraday SPI controller supportKuo-Jung Su2014-01-11-0/+550
| | | | | | | | | | | | | | | | | The Faraday FTSSP010 is a multi-function controller which supports I2S/SPI/SSP/AC97/SPDIF. However This patch implements only the SPI mode. NOTE: The DMA and CS/Clock control logic has been altered since hardware revision 1.19.0. So this patch would first detects the revision id of the underlying chip, and then switch to the corresponding software control routines. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> CC: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-01-10-6629/+14927
|\ | | | | | | | | | | | | | | | | | | Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be added to include/configs/exynos5-dt.h now. Conflicts: include/configs/exynos5250-dt.h Signed-off-by: Tom Rini <trini@ti.com>
| * doc: Update the zynq u-boot statusJagannadha Sutradharudu Teki2014-01-10-8/+21
| | | | | | | | | | | | Updated doc/README.zynq to current status Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Enable CONFIG_DEFAULT_DEVICE_TREEJagannadha Sutradharudu Teki2014-01-10-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Enabled default dts files on respective pre-board config files this is way MAKEALL will works. and it's upto user to build specific dts by specifying at build time. $ make zynq_zc70x_config $ make --> with default dts zynq-zc702.dts or $ make DEVICE_TREE=zynq-zc702 --> Same configuration with zynq-zc706.dts Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * dts: zynq: Add more zynq dts filesJagannadha Sutradharudu Teki2014-01-10-0/+84
| | | | | | | | | | | | | | This patch adds initial dts support for supported zynq boards. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Enable verified boot(RSA)Jagannadha Sutradharudu Teki2014-01-10-0/+4
| | | | | | | | | | | | | | CONFIG_FIT_SIGNATURE - signature node support in FIT image CONFIG_RSA - RSA lib support Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * gpio: zynq: Add dummy gpio routinesJagannadha Sutradharudu Teki2014-01-10-0/+25
| | | | | | | | | | | | | | GPIO dummy routines are required for fdt build, may be removed these dependencies once the u-boot fdt is fully optimized. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * dts: zynq: Add basic fdt supportJagannadha Sutradharudu Teki2014-01-10-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides a basic fdt support for zynq u-boot. zynq-7000.dtsi-> initial arch dts file zynq-zed.dts -> initial zed board dts file more devices should be added in subsequent patches. u-boot build: once configuring of a board done for building dtb with zynq-zed.dts as an input zynq-uboot> make DEVICE_TREE=zynq-zed Enabled CONFIG_OF_SEPARATE for building dtb separately. There is a new binary called u-boot-dtb.bin which is a u-boot with devicetree supported. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Define CONFIG_ENV_OVERWRITEJagannadha Sutradharudu Teki2014-01-10-0/+3
| | | | | | | | | | | | | | Defined CONFIG_ENV_OVERWRITE, which allow to overwrite serial baudrate and ethaddr. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Define flash env. partitionJagannadha Sutradharudu Teki2014-01-10-1/+11
| | | | | | | | | | | | | | Last 128Kb sector of 1Mb flash is defined as u-boot environment partition. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Change Env. Sector size to 128KbJagannadha Sutradharudu Teki2014-01-10-1/+3
| | | | | | | | | | | | Changed Env. Sector size from 0x10000 to 128Kb Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Define default environmentJagannadha Sutradharudu Teki2014-01-10-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Defined default env. for autoboot FIT image from respective boot devices. Default settings: fit_image=fit.itb load_addr=0x2000000 fit_size=0x800000 flash_off=0x100000 nor_flash_off=0xE2100000 Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add support to find bootmodeJagannadha Sutradharudu Teki2014-01-10-2/+56
| | | | | | | | | | | | | | | | | | | | | | Added support to find the bootmodes by reading slcr bootmode register. this can be helpful to autoboot the configurations w.r.t a specified bootmode. Added this functionality on board_late_init as it's not needed for normal initializtion part. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add zynq_zc770 xm012 board supportJagannadha Sutradharudu Teki2014-01-10-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM012: - 1GB DDR3 - 64MiB Numonyx NOR flash - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Stefan Roese <sr@denx.de>
| * zynq: Add zynq_zc770 xm013 board supportJagannadha Sutradharudu Teki2014-01-10-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM013: - 1GB DDR3 - 128 Mb Quad-SPI Flash(dual parallel) - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add zynq_zc770 xm010 board supportJagannadha Sutradharudu Teki2014-01-10-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM010: - 1Gb DDR3 - 1Mb SST SPI flash - 128 Mb Quad-SPI Flash - 8 Mb SST SI flash - Full size SD/MMC card cage - 10/100/1000 Ethernet - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add zynq microzed board supportJagannadha Sutradharudu Teki2014-01-10-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MicroZed is a low-cost development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z010-1CLG400C Memory: - 1 GB of DDR3 SDRAM - 128Mb of QSPI flash(S25FL128SAGBHI200) - Micro SD card interface Communication: - 10/100/1000 Ethernet - USB 2.0 - USB-UART User I/O: - 100 User I/O (50 per connector) - Configurable as up to 48 LVDS pairs or 100 single-ended I/O Misc: - Xilinx PC4 JTAG configuration port - PS JTAG pins accessible via Pmod - 33.33 MHz oscillator - User LED and push switch For more info - http://zedboard.org/product/microzed Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: zc70x: Add Catalyst 24WC08 EEPROM config supportJagannadha Sutradharudu Teki2014-01-10-0/+11
| | | | | | | | | | | | | | | | | | Adds configurations for Catalyst 24WC08 EEPROM, which is present on the zynq boards. Enable EEPROM support for zc70x boards. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Define exact TEXT_BASEJagannadha Sutradharudu Teki2014-01-10-1/+1
| | | | | | | | | | | | | | Defined TEXT_BASE for u-boot starts from 0x4000000 w.r.t zynq memory-map. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Move CONFIG_SYS_SDRAM_SIZE to pre-board configsJagannadha Sutradharudu Teki2014-01-10-1/+4
| | | | | | | | | | | | | | CONFIG_SYS_SDRAM_SIZE is specific to a board hence moved to specific pre-config board files. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add zynq zed board supportJagannadha Sutradharudu Teki2014-01-10-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zed is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z020-CLG484-1 Memory: - 512 MB DDR3 - 256 Mb Quad-SPI Flash( - Full size SD/MMC card cage Connectivity: - 10/100/1000 Ethernet - USB OTG (Device/Host/OTG) - USB-UART Expansion: - FMC (Low Pin Count) - Pmod. headers (2x6) Video/Display: - HDMI output (1080p60 + audio) - VGA connector - 128 x 32 OLED - User LEDs (9) User inputs: - Slide switches (8) - Push button switches (7) Audio: - 24-bit stereo audio CODEC - Stereo line in/out - Headphone - Microphone input Analog: - Xilinx XADC header - Supports 4 analog inputs - 2 Differential / 4 Single-ended Debug: - On-board USB JTAG programming port - ARM Debug Access Port (DAP) For more info - http://zedboard.org/product/zedboard Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add zynq zc70x board supportJagannadha Sutradharudu Teki2014-01-10-9/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded processing includes ASIC and FPGA design. ZC702-: APSOC: - XC7Z020-CLG484-1 Memory: - DDR3 Component Memory 1GB - 16MB Quad SPI Flash - IIC - 1 KB EEPROM Connectivity: - Gigabit Ethernet GMII, RGMII and SGMII. - USB OTG - Host USB - IIC Bus Headers/HUB - 1 CAN with Wake on CAN - USB-UART Video/Display: - HDMI Video OUT - 8X LEDs Control & I/O: - 3 User Push Buttons - 2 User Switches - 8 User LEDs For more info on zc702 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm ZC706-: APSOC: - XC7Z045 FFG900 -2 AP SoC Memory: - DDR3 Component Memory 1GB (PS) - DDR3 SODIM Memory 1GB (PL) - 2X16MB Quad SPI Flash (dual parallel) - IIC - 1 KB EEPROM Connectivity: - PCIe Gen2x4 - SFP+ and SMA Pairs - GigE RGMII Ethernet (PS) - USB OTG 1 (PS) - Host USB - IIC Bus Headers/HUB (PS) - 1 CAN with Wake on CAN (PS) - USB-UART Video/Display: - HDMI 8 color RGB 4.4.4 1080P-60 OUT - HDMI IN 8 color RGB 4.4.4 Control & I/O: - 2 User Push Buttons/Dip Switch, 2 User LEDs - IIC access to GPIO - SDIO (SD Card slot) - 3 User Push Buttons, 2 User Switches, 8 User LEDs For more info on zc706 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * doc: zynq: Add information on zynq u-bootJagannadha Sutradharudu Teki2014-01-10-0/+60
| | | | | | | | | | | | | | | | | | Information on zynq u-boot about - zynq boards - mainline status - TODO Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq-common: Rename zynq with zynq-commonJagannadha Sutradharudu Teki2014-01-10-5/+6
| | | | | | | | | | | | | | | | | | zynq.h -> zynq-common.h, zynq-common is Common configuration options for all Zynq boards. zynq.h is no longer exists hense removed from boards.cfg Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add GEM0, GEM1 configs supportJagannadha Sutradharudu Teki2014-01-10-8/+8
| | | | | | | | | | | | | | | | | | Zynq ethernet controller support two GEM's like CONFIG_ZYNQ_GEM0 and CONFIG_ZYNQ_GEM1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add UART0, UART1 configs supportJagannadha Sutradharudu Teki2014-01-10-4/+16
| | | | | | | | | | | | | | | | | | Zynq uart controller support two serial ports like CONFIG_ZYNQ_SERIAL_UART0 and CONFIG_ZYNQ_SERIAL_UART1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Enable cache optionsJagannadha Sutradharudu Teki2014-01-10-0/+10
| | | | | | | | | | | | | | | | - Enable cache command - Turn-off L2 cache - Turn-on D-cache Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Minor config cleanupJagannadha Sutradharudu Teki2014-01-10-37/+39
| | | | | | | | | | | | | | | | | | Cleanups mostly on: - Add comments - Re-order configs - Remove #define CONFIG_ZYNQ_SDHCI Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Cleanup on memory configsJagannadha Sutradharudu Teki2014-01-10-13/+14
| | | | | | | | | | | | | | | | Cleanup on memory configuration options: - Add comment - Re-order configs Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Cleanup on miscellaneous configsJagannadha Sutradharudu Teki2014-01-10-9/+10
| | | | | | | | | | | | | | | | | | Cleanup on miscellaneous configurable options: - Rename SYS_PROMPT as "zynq-uboot" - Add comment - Re-order configs Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Enable Boot FreeBSD/vxWorksJagannadha Sutradharudu Teki2014-01-10-0/+7
| | | | | | | | | | | | This enabled Boot FreeBSD/vxWorks from an ELF image support Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Enable CONFIG_FIT_VERBOSEJagannadha Sutradharudu Teki2014-01-10-0/+1
| | | | | | | | | | | | Enabled fit_format_{error,warning}() Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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