summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* sunxi: Add support for the Jesurun Q5 boardGábor Nyers2015-03-10-0/+21
| | | | | | | | | | | | | | | | | The Jesurun Q5 has a black plastic casing with the approximate dimensions of 100mm x 100mm x 24mm with rounded edges. In terms of hardware it features an Allwinner A10 SoC with 1GB RAM and 8GB of NAND flash. The storage capacity can be extended up to 32GB with a MicroSD card. The external connectors are: 2x USB-A female supporting USB2.0, 3.5mm female jack for audio, HDMI female, SPDIF, RJ45 LAN and Power. In addition the device has 1x red LED (hard wired to power) and an programmable green led. On the board there is also an unpopulated IR receiver and the UART. The devices is equipped with an AXP209 PMU. For more details see: http://linux-sunxi.org/Jesurun_Q5 Signed-off-by: Gábor Nyers <gnyers@opensuse.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Make CONFIG_DRAM_TPR3 apply to sun[57]iAdam Sampson2015-03-10-1/+1
| | | | | | | | | | | The tpr3 (timing skew) parameter is used in all supported versions of the sunxi DRAM controller, but it was only enabled for sun4i in 47e3501a76894f4ba08bc61f33774bd5d39ff464. Signed-off-by: Adam Sampson <ats@offog.org> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* common: cmd_elf: Add support to disable start of applicationSiva Durga Prasad Paladugu2015-03-09-0/+4
| | | | | | | | Added support to disable the start of application by using a environment variable autostart Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* armv8/vexpress64: make multientry conditionalLinus Walleij2015-03-09-17/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | While the Freescale ARMv8 board LS2085A will enter U-Boot both on a master and a secondary (slave) CPU, this is not the common behaviour on ARMv8 platforms. The norm is that U-Boot is entered from the master CPU only, while the other CPUs are kept in WFI (wait for interrupt) state. The code determining which CPU we are running on is using the MPIDR register, but the definition of that register varies with platform to some extent, and handling multi-cluster platforms (such as the Juno) will become cumbersome. It is better to only enable the multiple entry code on machines that actually need it and disable it by default. Make the single entry default and add a special ARMV8_MULTIENTRY KConfig option to be used by the platforms that need multientry and set it for the LS2085A. Delete all use of the CPU_RELEASE_ADDR from the Vexpress64 boards as it is just totally unused and misleading, and make it conditional in the generic start.S code. This makes the Juno platform start U-Boot properly. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* common/board_r: Restore non-cached memory setupJan Kiszka2015-03-09-0/+11
| | | | | | | This fixes a regression of e310b93ec1, affecting Ethernet on the Jetson TK1, e.g. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
* ARM: PSCI: Rework the DT handler slightlyTom Rini2015-03-09-4/+9
| | | | | | | | | | | | | | | | | | | | | | The way the PSCI DT update happens currently means we pull in <asm/armv7.h> everywhere, including on ARMv8 and that in turn brings in <asm/io.h> for some non-PSCI related things that header needs to deal with. To fix this, we rework the hook slightly. A good portion of arch/arm/cpu/armv7/virt-dt.c is common looking and I hope that when PSCI is needed on ARMv8 we can re-use this by and large. So rename the current hook to psci_update_dt(), move the prototype to <asm/psci.h> and add an #ifdef that will make re-use later easier. Reported-by: York Sun <yorksun@freescale.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: York Sun <yorksun@freescale.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: York Sun <yorksun@freescale.com>
* tegra-common: increase malloc pool len by dfu mmc file buffer sizePrzemyslaw Marczak2015-03-09-0/+5
| | | | | | | | The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Tom Warren <twarren.nvidia@gmail.com>
* ti-armv7-common: increase malloc pool len by dfu mmc file buffer sizePrzemyslaw Marczak2015-03-09-1/+5
| | | | | | | | The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Tom Rini <trini@konsulko.com>
* zynq-common: increase malloc pool len by dfu mmc file buffer sizePrzemyslaw Marczak2015-03-09-1/+1
| | | | | | | | | | The dfu mmc file buffer, which was static, now is allocated by memalign(), so the malloc pool len should be also increased. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Michal Simek <monstr@monstr.eu> Acked-by: Michal Simek <michal.simek@xilinx.com>
* odroid-xu3: defconfig: disable memset at malloc initPrzemyslaw Marczak2015-03-09-0/+2
| | | | | | | Reduce the boot time of Odroid XU3 by disabling the memset at malloc init. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
* odroid: defconfig: disable memset at malloc initPrzemyslaw Marczak2015-03-09-1/+1
| | | | | | | | | | | | | | Reduce the boot time of Odroid X2/U3 by disabling the memset at malloc init. This was tested on Odroid X2. A quick test with checking gpio pin state using the oscilloscope. Boot time from start to bootcmd (change gpio state by memory write command): - ~228ms - before this change (arch memset enabled for .bss clear) - ~100ms - after this change Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* trats2: defconfig: disable memset at malloc initPrzemyslaw Marczak2015-03-09-0/+1
| | | | | | | | | | | | | Reduce the boot time of Trats2 by disabling the memset at malloc init. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~464ms - before this change (arch memset enabled for .bss clear) - ~341ms - after this change Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dlmalloc: do memset in malloc init as new default configPrzemyslaw Marczak2015-03-09-10/+32
| | | | | | | | | | | | | | | | | | | | | | | This commit introduces new config: CONFIG_SYS_MALLOC_CLEAR_ON_INIT. This config is an expert option and is enabled by default. The all amount of memory reserved for the malloc, is by default set to zero in mem_malloc_init(). When the malloc reserved memory exceeds few MiB, then the boot process can slow down. So disabling this config, is an expert option to reduce the boot time, and can be disabled by Kconfig. Note: After disable this option, only calloc() will return the pointer to the zeroed memory area. Previously, without this option, the memory pointed to untouched malloc memory region, was filled with zeros. So it means, that code with malloc() calls should be reexamined. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dfu: mmc: file buffer: remove static allocationPrzemyslaw Marczak2015-03-09-3/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For writing files, DFU implementation requires the file buffer with the len at least of file size. For big files it requires the same big buffer. Previously the file buffer was allocated as a static variable, so it was a part of U-Boot .bss section. For 32MiB len of buffer we have 32MiB of additional space, required for this section. The .bss needs to be cleared after the relocation. This introduces an additional boot delay at every start, but usually the dfu feature is not required at the standard boot, so the buffer should be allocated only if required. This patch removes the static allocation of this buffer, and alloc it with memalign after first call of function: - dfu_fill_entity_mmc() and the buffer is freed on dfu_free_entity() call. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~888ms - before this change (arch memset enabled for .bss clear) - ~464ms - after this change Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> Cc: Marek Vasut <marek.vasut@gmail.com>
* arm: relocation: clear .bss section with arch memset if definedPrzemyslaw Marczak2015-03-09-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | For ARM architecture, enable the CONFIG_USE_ARCH_MEMSET/MEMCPY, will highly increase the memset/memcpy performance. This is able thanks to the ARM multiple register instructions. Unfortunatelly the relocation is done without the cache enabled, so it takes some time, but zeroing the BSS memory takes much more longer, especially for the configs with big static buffers. A quick test confirms, that the boot time improvement after using the arch memcpy for relocation has no significant meaning. The same test confirms that enable the memset for zeroing BSS, reduces the boot time. So this patch enables the arch memset for zeroing the BSS after the relocation process. For ARM boards, this can be enabled in board configs by defining: 'CONFIG_USE_ARCH_MEMSET'. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~1384ms - before this change - ~888ms - after this change Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com>
* exynos: config: enable arch memcpy and arch memsetPrzemyslaw Marczak2015-03-09-0/+3
| | | | | | | | | | | | | | | | | | | | This commit enables the following configs: - CONFIG_USE_ARCH_MEMCPY - CONFIG_USE_ARCH_MEMSET This increases the performance of memcpy/memset and also reduces the boot time. This was tested on Trats2. A quick test with trace. Boot time from start to main_loop() entry: - ~1527ms - before this change (arch memset enabled for .bss clear) - ~1384ms - after this change Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
* Merge branch 'master' of git://git.denx.de/u-boot-dmTom Rini2015-03-08-113/+3
|\
| * README: remove description about driver model configuration optionsMasahiro Yamada2015-03-05-113/+0
| | | | | | | | | | | | | | | | All the DM-related configuration options are described in Kconfig helps. They should not be duplicated in README. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
| * MAINTAINERS: add Driver Model repository informationMasahiro Yamada2015-03-05-0/+1
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: i2c: Add a missing memory allocaton checkSimon Glass2015-03-05-0/+2
| | | | | | | | | | | | | | This strdup() is missing a check. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* | Merge branch 'buildman' of git://git.denx.de/u-boot-x86Tom Rini2015-03-05-5/+9
|\ \
| * | buildman: Add a space before the list of boardsSimon Glass2015-03-05-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tweak the output slightly so we don't get things like: - board1 board2+ board3 board4 There should be a space before the '+'. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | buildman: Correct toolchain download featureSimon Glass2015-03-05-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit d908898 updated the ScanPath() function but not its documentation and not all its callers. This breaks the toolchain check after it is downloaded. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* | | Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-03-05-149/+1371
|\ \ \
| * | | arm: socfpga: Enable DM and DM_SPIMarek Vasut2015-03-05-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable DM and DM_SPI support for both Cyclone 5 and Arria 5 boards, since they use drivers which require those. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | dt: socfpga: Import and enable Arria V DK DTSMarek Vasut2015-03-04-0/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import DTS for Arria V development kit and enable support for DT. The DT is imported from Linux 3.19-rc1 as of commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | dt: socfpga: Import and enable Cyclone V DK DTSMarek Vasut2015-03-04-1/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import DTS for Cyclone V development kit and enable support for DT. The DT is imported from Linux 3.19-rc1 as of commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | arm: socfpga: Add Altera Arria V DK supportMarek Vasut2015-03-04-0/+1043
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Altera Arria V development kit. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | arm: socfpga: Zap board_early_init_f()Marek Vasut2015-03-04-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zap this unused empty function, no point in having it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | arm: socfpga: Zap checkboard()Marek Vasut2015-03-04-10/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since all boards now have a DT, instead of hard-coding the board name into the U-Boot binary, read the board name from DT "model" property. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | arm: socfpga: Drop cyclone5 suffix from board file nameMarek Vasut2015-03-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop the _cyclone5 suffix from socfpga_cyclone5.c since this file will contain Arria 5 support as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | arm: socfpga: Add USB and UDC support for Cyclone V DKMarek Vasut2015-03-04-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for USB host mode and USB device mode for the Cyclone V development kit and enable support for UMS (to export SD card as USB mass storage). The UMS is activated via 'ums 0 mmc 0' command, the system must be connected to a host PC via HPS USB port and SD card must be installed for this to work. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | arm: socfpga: Sync Cyclone V DK PLL configurationMarek Vasut2015-03-04-23/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync SoCFPGA Cyclone V development kit pinmux configuration with Rocketboard U-Boot v2013.01.01-114-g9381569 (ACDS14.1_REL_GSRD_PR). NOTE: This change is useless until we get proper SPL support, at which point this will likely need further rework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | arm: socfpga: Sync Cyclone V DK pinmux configurationMarek Vasut2015-03-04-101/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync SoCFPGA Cyclone V development kit pinmux configuration with Rocketboard U-Boot v2013.01.01-114-g9381569 (ACDS14.1_REL_GSRD_PR). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
| * | | arm: socfpga: Minor coding style fixMarek Vasut2015-03-04-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace multiple spaces with a single tab. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
* | | | Merge git://git.denx.de/u-boot-marvellTom Rini2015-03-05-0/+15
|\ \ \ \
| * | | | dreamplug: set CONFIG_BUILD_TARGET to build u-boot.kwbIan Campbell2015-03-05-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Saves having to remember to ask make for it explicitly. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
| * | | | dreamplug: switch to GENERIC_BOARDIan Campbell2015-03-05-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Built and booted to a Linux prompt with no issues discovered. network and usb access to the external mmc are ok. (my internal mmc is knackered at the h/w level). Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
| * | | | kwbimage: align v1 binary header to 4BChris Packham2015-03-05-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the Armada-XP documentation the binary header format requires the header length to be aligned to 4B. Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
| * | | | arm: aspenite: convert to generic boardAjay Bhargav2015-03-05-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable CONFIG_SYS_GENERIC_BOARD for Marvell Aspenite. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Luka Perkov <luka.perkov@sartura.hr>
| * | | | arm: gplugd: convert to generic boardAjay Bhargav2015-03-05-0/+5
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | Enable CONFIG_SYS_GENERIC_BOARD for Marvell gplugD. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Luka Perkov <luka.perkov@sartura.hr>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-03-05-68/+2008
|\ \ \ \
| * | | | SECURE_BOOT : enable esbc_validate command for powerpc and arm platforms.gaurav rana2015-03-05-1/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | esbc_validate command uses various IP Blocks: Security Monitor, CAAM block and SFP registers. Hence the respective CONFIG's are enabled. Apart from these CONFIG_SHA_PROG_HW_ACCEL and CONFIG_RSA are also enabled. Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | SECURE BOOT: Add command for validation of imagesgaurav rana2015-03-05-0/+1242
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. esbc_validate command is meant for validating header and signature of images (Boot Script and ESBC uboot client). SHA-256 and RSA operations are performed using SEC block in HW. This command works on both PBL based and Non PBL based Freescale platforms. Command usage: esbc_validate img_hdr_addr [pub_key_hash] 2. ESBC uboot client can be linux. Additionally, rootfs and device tree blob can also be signed. 3. In the event of header or signature failure in validation, ITS and ITF bits determine further course of action. 4. In case of soft failure, appropriate error is dumped on console. 5. In case of hard failure, SoC is issued RESET REQUEST after dumping error on the console. 6. KEY REVOCATION Feature: QorIQ platforms like B4/T4 have support of srk key table and key revocation in ISBC code in Silicon. The srk key table allows the user to have a key table with multiple keys and revoke any key in case of particular key gets compromised. In case the ISBC code uses the key revocation and srk key table to verify the u-boot code, the subsequent chain of trust should also use the same. 6. ISBC KEY EXTENSION Feature: This feature allows large number of keys to be used for esbc validation of images. A set of public keys is being signed and validated by ISBC which can be further used for esbc validation of images. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | fsl_sec_mon: Add driver for Security Monitor block of Freescalegaurav rana2015-03-05-0/+213
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Security Monitor is the SOC’s central reporting point for security-relevant events such as the success or failure of boot software validation and the detection of potential security compromises. The API's for transition of Security states have been added which will be used in case of SECURE BOOT. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | fsl_sfp : Move ccsr_sfp_regs definition to common includegaurav rana2015-03-05-15/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale sfp has been used for mpc8xxx. It will be used for ARM-based SoC as well. This patch moves the CCSR defintion of sfp_regs to common include. This patch also defines ccsr_sfp_regs definition for newer versions of SFP. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | rsa : Compile Modular Exponentiation files based on CONFIG_RSA_SOFTWARE_EXPgaurav rana2015-03-05-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove dependency of rsa_mod_exp from CONFIG_FIT_SIGNATURE. As rsa modular exponentiation is an independent module and can be invoked independently. Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | mpc85xx/t104xrdb : remove raw timing parametervijay rai2015-03-05-45/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board uses DDR DIMM. Reading SPD provides more flexibility. Raw timing parameter code should be removed after debugging. Signed-off-by: Vijay Rai <vijay.rai@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | | powerpc: 85xx: Modify CONFIG_USB_MAX_CONTROLLER_COUNT for P1022DSYing Zhang2015-03-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify CONFIG_USB_MAX_CONTROLLER_COUNT value to 1 on P1022DS. As ETSEC2 and USB2 are muxed; thus if ETSEC2 is enabled, the system bus hangs on USB2 if ETSEC2 is enabled but "usb start" command is issued. Hence making default controller count to 1 to avoid system hang. Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: Yusong Sun <yorksun@freescale.com>
| * | | | powerpc/mpc85xx: Add DSP side awareness for Freescale Heterogeneous SoCsShaveta Leekha2015-03-04-3/+393
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code provides framework for heterogeneous multicore chips based on StarCore and Power Architecture which are chasis-2 compliant, like B4860 and B4420 It will make u-boot recognize all non-ppc cores and peripherals like SC3900/DSP CPUs, MAPLE, CPRI and print their configuration in u-boot logs. Example boot logs of B4860QDS: U-Boot 2015.01-00232-geef6e36-dirty (Jan 19 2015 - 11:58:45) CPU0: B4860E, Version: 2.2, (0x86880022) Core: e6500, Version: 2.0, (0x80400120) Clock Configuration: CPU0:1600 MHz, CPU1:1600 MHz, CPU2:1600 MHz, CPU3:1600 MHz, DSP CPU0:1200 MHz, DSP CPU1:1200 MHz, DSP CPU2:1200 MHz, DSP CPU3:1200 MHz, DSP CPU4:1200 MHz, DSP CPU5:1200 MHz, CCB:666.667 MHz, DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:166.667 MHz CPRI:600 MHz MAPLE:600 MHz, MAPLE-ULB:800 MHz, MAPLE-eTVPE:1000 MHz FMAN1: 666.667 MHz QMAN: 333.333 MHz Top level changes include: (1) Top level CONFIG to identify HETEROGENUOUS clusters (2) CONFIGS for SC3900/DSP components (3) Global structures like "cpu_type" and "MPC85xx_SYS_INFO" updated for dsp cores and other components (3) APIs to get DSP num cores and their Mask like: cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC (5) Code to fetch and print SC cores and other heterogenous device's frequencies (6) README added for the same Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
generated by cgit v1.1 at 2024-09-18 07:08:41 +0000