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* MX28: MMC: Avoid DMA DCache race conditionMarek Vasut2012-09-06-0/+4
| | | | | | | | | | | | | | | | This patch prevents dcache-related problem. The problem manifested itself on the SPI driver, this is just a port to the MMC driver. The scenario is the same. In case an "mmc read" is issued to a buffer which was written right before it and data cache is enabled, the cache eviction might happen during the DMA transfer into the buffer, therefore corrupting the buffer. Clear any cache lines that might contain the buffer to prevent such issue. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* MX28: SPI: Fix the DMA chainingMarek Vasut2012-09-06-18/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | It turns out that in order for the SPI DMA to properly support continuous transfers longer than 65280 bytes, there are some very important parts that were left out from the documentation. Firstly, the XFER_SIZE register is not written with the whole length of a transfer, but is written by each and every chained descriptor with the length of the descriptors data buffer. Next, unlike the demo code supplied by FSL, which only writes one PIO word per descriptor, this does not apply if the descriptors are chained, since the XFER_SIZE register must be written. Therefore, it is essential to use four PIO words, CTRL0, CMD0, CMD1, XFER_SIZE. CMD0 and CMD1 are written with zero, since they don't apply. The DMA programs the PIO words in an incrementing order, so four PIO words. Finally, unlike the demo code supplied by FSL, the SSP_CTRL0_IGNORE_CRC must not be set during the whole transfer, but it must be set only on the last descriptor in the chain. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* MX28: SPI: Fix the DMA DCache race conditionMarek Vasut2012-09-06-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes dcache-related problem. The problem manifested when dcache was enabled and the following command issued twice: mw 0x42000000 0 0x4000 ; sf probe ; sf read 0x42000000 0x0 0x10000 ; sha1sum 0x42000000 0x10000 The SHA1 checksum was correct during the first call. Yet with every subsequent call of the above command, it differed and was wrong. It turns out this was because of a race condition. On the first time the command was called, no cacheline contained any data from the destination memory location. The DMA transfered data into the location and the cache above the location was invalidated. Then the checksum was computed, but that meant the data were loaded into data cache. On any subsequent call, the DMA again transfered data into the same destination. Yet during the transfer, some of the DCache lines were evicted and written back into the main memory. Once the DMA transfer completed, the data cache was invalidated over the memory location as usual. But the data that were to be loaded back into the data cache by subsequent SHA1 checksuming were corrupted. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* Fix mx31_decode_pllBenoît Thébaudeau2012-09-06-3/+5
| | | | | | | | The MFN bit-field of the PLL registers represents a signed value. See the reference manual. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* mx35 timer: Switch to 32-kHz sourceBenoît Thébaudeau2012-09-06-17/+27
| | | | | | | | | | Switch the mx35 timer driver to the 32-kHz clock source to avoid calling mxc_get_clock() again and again, and to be consistent with the timer drivers of other i.MX SoCs. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx35: Define default SoC input clock frequenciesBenoît Thébaudeau2012-09-06-30/+31
| | | | | | | | | Define default SoC input clock frequencies for i.MX35 in order to get rid of duplicated definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx25: Define default SoC input clock frequenciesBenoît Thébaudeau2012-09-06-11/+23
| | | | | | | | | | Define default SoC input clock frequencies for i.MX25 in order to get rid of duplicated definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Matthias Weisser <weisserm@arcor.de>
* mx35: Fix clock dividersBenoît Thébaudeau2012-09-06-59/+31
| | | | | | | | | The clock dividers that were used do not match at all the reference manual. They were either completely broken, or came from an early silicon revision incompatible with the current one. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* mx35: Add definitions for clock gate valuesBenoît Thébaudeau2012-09-06-0/+6
| | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* mx35: Fix decode_pllBenoît Thébaudeau2012-09-06-3/+6
| | | | | | | | The MFN bit-field of the PLL registers represents a signed value. See the reference manual. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
* efikamx: refine USB supportMatt Sealey2012-09-04-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | | Because of the way USB pad settings are handled it doesn't make sense to be able to build the Efika MX board support without CONFIG_CMD_USB turned on. So, we change the build to always compile in USB support. We do not need to check for CONFIG_CMD_USB like we do with CONFIG_MXC_SPI since the USB subsystem will error out of the compile for us. Additionally, the following behaviors have changed; * Smartbook "preboot" should not set input and output to USB keyboard as there is no display support * board_eth_init is implemented such that it does not cause U-Boot to report an explicit failure ("CPU Net Initialization Failed"). Since Ethernet is implemented via USB (fixed on Smarttop, pluggable on Smartbook, and handled by "usb start") - the warning that is left ("No ethernet found") is perfectly reasonable at the point it is printed since the USB system hasn't been started and nothing has been probed yet. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de>
* SCSPS1: Enable cachesMarek Vasut2012-09-04-2/+0
| | | | | | | | Enable caches, make it faster! Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* mx28evk: Add USB Ethernet supportFabio Estevam2012-09-04-0/+3
| | | | | | | Add USB Ethernet support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Marek Vasut <marex@denx.de>
* MX28: Fixup the ad-hoc use of DIGCTL_MICROSECONDSMarek Vasut2012-09-04-3/+5
| | | | | | | | | | Use proper struct-based access for this register in the SPL code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* MX28: Cleanup mxsboot within make mrproperMarek Vasut2012-09-04-0/+1
| | | | | | | | | | | Delete the "mxsboot" binary if make mrproper is called. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> CC: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Stefano Babic <sbabic@denx.de>
* M28: Fix the use of gpmi-nand in mtdpartsMarek Vasut2012-09-04-2/+2
| | | | | | | | | | | | The mtd name of the NAND in Linux is "gpmi-nand", not "gpmi-nand.0" as it would be expected, since the controller doesn't support multiple NANDs attached to it as of now. Rectify this flub by adjusting default mtdparts. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
* mx28evk: Convert to mxs_adjust_memory_params()Fabio Estevam2012-09-04-1/+1
| | | | | | | | | | Recent conversion from mx28_adjust_memory_params to mxs_adjust_memory_params missed to update mx28evk, which caused the board not to boot. Apply the conversion so that the board can boot again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* MX28: mx28evk: Enable SPI DMAOtavio Salvador2012-09-04-0/+1
| | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* MX28: mx28evk: Align SSP clock speedOtavio Salvador2012-09-04-2/+2
| | | | | | | | Align the SSP clock speed with oscilator to achieve higher transfer stability. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de>
* lsxl: support power switchMichael Walle2012-09-03-1/+21
| | | | | | | | | | | | This patch restores the Linkstation's original behaviour when powering off. Once the (soft) power switch is turned off, linux will reboot and the bootloader turns off HDD and USB power. Then it loops as long as the switch is in the off position, before continuing the boot process again. Additionally, this patch fixes the board function set_led(LED_OFF). Signed-off-by: Michael Walle <michael@walle.cc> Cc: Prafulla Wadaskar <prafulla@marvell.com>
* cosmetic: Better explain how to use the kirkwood kwbimage.cfg file.Karl O. Pinc2012-09-03-3/+14
| | | | | | | | | | | Hi, This adds to the documenation to explain how to use the kwbimage.cfg file necessary to generate an image with prefixed board setup values necessary for the kirkwood boards. Signed-off-by: Karl O. Pinc <kop@meme.com>
* Cosmetic doc typo fixes to the kwbimage feature docsKarl O. Pinc2012-09-03-3/+3
| | | | Signed-off-by: Karl O. Pinc <kop@meme.com>
* arm/km: remove unused codeHolger Brunck2012-09-03-21/+0
| | | | | | | | | | | | For some reasons we had an own implementaion of dram_init and dram_init_banksize. This is not needed anymore, use the standard kirkwood functions instead. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
* arm/km: fix frequency of the SPI NOR FlashValentin Longchamp2012-09-03-1/+1
| | | | | | | | | According to our last HW measures, this could be raised while still compatible with the potential delays on the lines. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
* km/ivm: fix string len check to support 7 char board namesValentin Longchamp2012-09-03-1/+1
| | | | | | | | | | | | | | | The fanless boards now have a 7-digit (XXXXX-F) board name. This triggers a border condition when reading this string in the IVM although this string is smaller than the currenly read string size, but only by 1 character. This patch corrects this by changing the size check condition for string length. It is the same change that was done in the platform for this same bug. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Stefan Bigler <stefan.bigler@keymile.com>
* kw_spi: fix clock prescaler computationValentin Longchamp2012-09-03-2/+4
| | | | | | | | | | | | | | | | | The computation was not correct with low clock values: setting a 1MHz clock would result in an overlap that would then configure a 25Mhz clock. This patch implements a correct computation method according to the kirkwood functionnal spec. table 600 (Serial Memory Interface Configuration Register). Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* km/arm: set SPI NOR Flash default parametersValentin Longchamp2012-09-03-0/+4
| | | | | | | | | | | | | These parameters are used by the the sf probe command that are used by our update script and they therefore need to be set for all of our boards. The timing is the same as for the ENV SPI NOR Flash (since it's the same physical device) and takes the boco2 delay on the bus into account. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
* edminiv2: orion5x: fix GPIO inits and valuesAlbert ARIBAUD2012-09-03-4/+11
| | | | | | | | | Orion5x did not actually write GPIO output values or input polarities, and ED Mini V2 had bad or missing values for GPIO settings. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
* Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingWolfgang Denk2012-09-02-6/+8
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | * 'agust@denx.de' of git://git.denx.de/u-boot-staging: tx25: Use generic gpio_* calls config: Always use GNU ld tools: add kwboot binary to .gitignore file fdt: Include arch specific gpio.h instead of asm-generic/gpio.h serial: CONSOLE macro is not used Conflicts: board/karo/tx25/tx25.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * tx25: Use generic gpio_* callsVikram Narayanan2012-08-11-16/+9
| | | | | | | | | | | | | | | | | | | | | | | | Instead of manipulating gpio registers directly, use the calls from the gpio library. Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de> Cc: John Rigby <jcrigby@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * config: Always use GNU ldKhem Raj2012-08-10-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes sure that we always use the GNU ld. U-Boot uses certain construct e.g. OVERLAY which are not implemented in gold therefore it always needs GNU ld for linking. It works well if default linker in toolchain is GNU ld but in some cases we can have gold to be the default linker and also ship GNU ld but not as default in such cases its called $(PREFIX)ld.bfd, with this patch we make sure that if $(PREFIX)ld.bfd exists than we use that for our ld. This way it does not matter what the default ld is. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Khem Raj <raj.khem@gmail.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
| * tools: add kwboot binary to .gitignore fileLuka Perkov2012-08-10-0/+1
| | | | | | | | | | | | Signed-off-by: Luka Perkov <uboot@lukaperkov.net> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
| * fdt: Include arch specific gpio.h instead of asm-generic/gpio.hMichal Simek2012-08-10-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Include arch specific gpio.h instead of asm-generic/gpio.h because several architectures (Microblaze, Blackfin, Nios2, OpenRISC) define gpio functions in header file. asm-generic/gpio.h can be included in arch specific gpio.h (For example: ARM) Signed-off-by: Michal Simek <monstr@monstr.eu> CC: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Simon Glass <sjg@chromium.org>
| * serial: CONSOLE macro is not usedMichal Simek2012-08-10-3/+0
| | | | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | at91: 9x5: Enable PMECC for 5series ek board.Wu, Josh2012-09-01-0/+7
| | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | at91: 9x5: change SMC config timing that both works for PMECC & non-PMECC.Wu, Josh2012-09-01-6/+6
| | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Tested-by: voice.shen@atmel.com Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | at91: atmel_nand: Update driver to support Programmable Multibit ECC controllerWu, Josh2012-09-01-1/+836
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Programmable Multibit ECC (PMECC) controller is a programmable binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller can be used to support both SLC and MLC NAND Flash devices. It supports to generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data. To use PMECC in this driver, the user needs to set the PMECC correction capability, the sector size and ROM lookup table offsets in board config file. This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference is in this version it uses registers structure access hardware instead of using macros. It is tested in 9x5 serial boards. Signed-off-by: Josh Wu <josh.wu@atmel.com> [rebase] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | at91: atmel_nand: remove unused variables.Wu, Josh2012-09-01-2/+1
| | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | at91: atmel_nand: extract HWECC initialization code into one function: ↵Wu, Josh2012-09-01-59/+87
| | | | | | | | | | | | | | | | | | | | | | | | atmel_hw_nand_init_param(). This patch 1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support. 2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail(). Signed-off-by: Josh Wu <josh.wu@atmel.com> [fix empty newline at EOF error and move return value check into ifdef] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | atmel: at91sam9x5: add spi flash boot supportBo Shen2012-09-01-4/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | Add at91sam9x5 series spi flash boot support Using at91sam9x5ek_spiflash to configure, then it can boot from at25df321 serial flash SPI mater work in 30Mhz speed, while not 1Mhz speed. This will base on atmel_spi patch, or else, it will occur receive overrun Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm: sam9g10/sam9m10g45: remove CONFIG_ARCH_CPU_INITBo Shen2012-09-01-3/+0
| | | | | | | | | | | | | | | | Remove CONFIG_ARCH_CPU_INIT for at91sam9g10ek and at91sam9m10g45ek Signed-off-by: Bo Shen <voice.shen@atmel.com> [rebase on TOT] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm:at91-boards: remove console_init_f where unnecessaryAndreas Bießmann2012-09-01-22/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A lot of at91 boards have the console_init_f in board_init. This is useless cause it was called before by generic code in lib/board.c. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> cc: Jens Scharsig <esw@bus-elektronik.de> cc: Stelian Pop <stelian@popies.net> cc: Sedji Gaouaou<sedji.gaouaou@atmel.com> cc: Albin Tonnerre <albin.tonnerre@free-electrons.com> cc: Eric Benard <eric@eukrea.com> Tested-by: voice.shen@atmel.com Tested-by: voice.shen@atmel.com Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
* | at91sam9263ek: remove unnecessary console_init_fAndreas Bießmann2012-09-01-3/+0
| | | | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> cc: Stelian Pop <stelian@popies.net>
* | spi: atmel: add WDRBT bit to avoid receive overrunBo Shen2012-09-01-0/+4
| | | | | | | | | | | | | | | | | | | | The atmel at91sam9x5 series spi has feature to avoid receive overren Using the patch to enable it Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | atmel: at91sam9x5: fix name error for spiBo Shen2012-09-01-2/+2
| | | | | | | | | | | | | | Fix the name error Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | Take over the maintainer for sam9g10 and sam9m10g45Bo Shen2012-09-01-1/+1
| | | | | | | | | | | | | | | | | | | | As the maintainer for at91sam9g10ek and at91sam9m10g45ek can not reach any more. So I wish to take over the maintainer for sam9g10 and sam9m10g45 Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm : at91sam9x5 : fix a small bug for NANDBo Shen2012-09-01-0/+2
| | | | | | | | | | | | | | | | | | fix a bug: when not boot from NAND, the NAND flash can not be detected. Using this to fix it Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | AT91: Small fix on AT91 USART initialization codeXu, Hong2012-09-01-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | Before reset dbgu transmitter, we just wait TXEMPTY to drain the transmitter register(Just in case). If not doing this, we may sometimes see several weird characters from DBGU. A short delay is also added to make sure the new serial settings are settled. Signed-off-by: Hong Xu <hong.xu@atmel.com> [cherry-picked from u-boot-atmel/old-next] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | at91sam9263ek: fix 'update' scriptAndreas Bießmann2012-09-01-1/+1
| | | | | | | | | | | | | | | | The old update script uses 'load_addr' which is never set. Use 'fileaddr' instead which is automagically set by e.g. dhcp. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> cc: Stelian Pop <stelian@popies.net>
* | ARM : at91sam9x5 : Remove CONFIG_ARCH_CPU_INITBo Shen2012-09-01-2/+0
| | | | | | | | | | | | | | Remove CONFIG_ARCH_CPU_INIT, no need it anymore Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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