| Commit message (Collapse) | Author | Age | Lines |
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Add compulab logo and display it on boot.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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Add support for hdmi console.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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Increase size of malloc area to make room for framebuffer
and other such big allocations.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
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Obtain 2nd NIC MAC address from baseboard EEPROM and pass it to Linux.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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Implement the option to select the eeprom i2c bus when reading mac
address.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Ilya Ledvich <ilya@compulab.co.il>
Cc: Dmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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When passing eth address to Linux via dtb, the "local-mac-address"
property should be set for "/soc/aips-bus@02100000/ethernet@02188000",
not "/fec".
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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Expand boot sequence to the following order:
1) mmc boot: mmc boot script, then mmc bootm, then mmc bootz.
2) usb boot: usb boot script.
3) sata boot: sata boot script, sata bootm, sata bootz.
4) nand boot: nand bootm, then nand bootz.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>#
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Currently we only support the Micron MT41K128M16JT-125 ddr3 chip.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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We will only support loading u-boot.img from SPI flash stored
at the offset of 64k.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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We need this way for SPL boot.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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To support different ddr3 memory sizes we should start using
imx_ddr_size(..) instead of the define PHYS_SDRAM_SIZE.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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Fix warning due to missing prototype for writel
Signed-off-by: Stefano Babic <sbabic@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
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To align with other mx6 boards, change ENV offset from 384KB to
512KB position to fit a larger u-boot image.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add board level spl support for mx6sxsabresd board.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Since mx6sx's memory space is different to mx6dq, redefine the SPL
related macro for mx6sx chip.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Define two structure mx6sx_iomux_ddr_regs and mx6sx_iomux_grp_regs.
Add a new function mx6sx_dram_iocfg to configure dram io.
Since mx6sx only have one channel mmdc0, define a new empty macro MMDC1
to replace mmdc1->entry=value for mx6sx. And to other mx6 soc, MMDC1
effects as "mmdc1->entry=value".
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add SPL support in mx6sxsabresd header file.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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select SUPPORT_SPL for mx6sxsabresd.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add a SPL default configuration file for mx6sxsabresd board.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add support for the NAND Flash chip with page size of 4096+224-bytes OOB area length
For example Micron MT29F4G08 NAND flash device defines a OOB area which is
224 bytes long (oobsize).
Signed-off-by: Alexandre Coffignal <acoffignal@geral.com>
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This patch adds the new Barco platinum platform. It currently
includes those two boards:
platinum-titanium
-----------------
This is the same board as the titanium that is already supported in
mainline U-Boot. But its now moved to this new platform to support
multiple "flavors" of imx6 boards in one directory. Its also moved
to support SPL booting. And with this we use the run-time DDR
configuration of this SPL support. The board is equipped with the
Micron MT41J128M16JT-125 DDR chips. We now can remove the DDR
related registers tuples from the imximage.cfg file. As all this
is done in the SPL at run-time.
platinum-picon
--------------
This board is new and based on the MX6DL with 1GiB DDR using the
Micron MT41K256M16HA DDR3 chips. Its also equipped with 2 NAND
chips (each 512MiB).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Pieter Ronsijn <pieter.ronsijn@barco.com>
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Since commit 1f98e31bc0b2c37a ("imx: mx6sxsabresd: Use the pfuze common init
function") board_late_init() became empty, so we can safely remove this unneeded
function.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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The Fusion LCD needs the 32bit color depth to properly work; the
default is different on the 3.10.17 kernels and it is better to ensure
it work out of box using proper default color setting.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
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* Add netargs and netboot option.
* This enables tftp and nfs booting
* This puts omap5 devices inline with other devices such as am335x and am437x
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
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Signed-off-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
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This patch adds boot script support to pcm051
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
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AM43xx Industrial Development Kit is a new board
based on AM437x line of SoCs. Targetted at Industrial
Automation applications, it comes with EtherCAT, motor
control and other goodies.
Thanks to James Doublesin for all the help.
Cc: James Doublesin <doublesin@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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This regulator is used with AM437x IDK to feed
VDD_MPU, without means to scale VDD_MPU we can't
support higher frequencies.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Make sure that all OPPs are checked on
scale_vcores(). While at that also fix 600MHz
VDD_MPU voltage according to AM437x Data Manual
available at [1].
Table 5-3 on that document, lists all valid
voltages per frequency.
[1] http://www.ti.com/lit/ds/symlink/am4379.pdf
Signed-off-by: Felipe Balbi <balbi@ti.com>
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DCDC1 is used as VDD_MPU in all known boards,
let's define all other valid voltages for that
rail so it can be used by our boards.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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A switch statement fits better in this case,
specially considering we have a few extra
frequencies to use.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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The frequencies for 25MHz in dpll_per were out of spec for 25MHz,
correct.
Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Switch to using hardware leveling for certain parameters on the EMIF
rather than using precalculated values. Doing this also means we have a
common place now between am437x and am335x for setting
emif_sdram_ref_ctrl with a value for the correct delay length.
Tested-by: Felipe Balbi <balbi@ti.com>
Tested-by: Tom Rini <trini@ti.com>
Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Need to provide PLL values for all possible input frequencies (19.2, 24,
25, 26MHz). Values provide are also optimized for jitter (needed
especially for PER PLL and DDR PLL).
Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
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Enable GPMC's prefetch feature for NAND access. This speeds up NAND read
access a lot by pre-fetching contents in the background and reading them
through the FIFO address.
The current implementation has two limitations:
a) it only works in 8-bit mode
b) it only supports read access
Both is easily fixable by someone who has hardware to implement it.
Note that U-Boot code uses non word-aligned buffers to read data into, and
request read lengths that are not multiples of 4, so both partial buffers
(head and tail) have to be addressed.
Tested on AM335x hardware.
Tested-by: Guido Martínez <guido@vanguardiasur.com.ar>
Reviewed-by: Guido Martínez <guido@vanguardiasur.com.ar>
Signed-off-by: Daniel Mack <zonque@gmail.com>
[trini: Make apply again, use 'cs' fix pointed out by Guido]
Signed-off-by: Tom Rini <trini@ti.com>
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All the 74xx_7xx boards are still non-generic boards:
P3G4, ZUMA, ppmc7xx, ELPPC, mpc7448hpc2
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Nye Liu <nyet@zumanetworks.com>
Cc: Roy Zang <tie-fei.zang@freescale.com>
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Now TQM8xx is the only remaining board family of mpc8xx.
It uses its own linker script, board/tqc/tqm8xx/u-boot.lds.
arch/powerpc/cpu/mpc8xx/u-boot.lds is not used by any boards.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
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Since commit 843125daebd7 (ppc4xx: remove HH405 board), CONFIG_HH405
is not defined.
Since commit d52633047913 (ppc4xx: remove PMC405), CONFIG_PMC405
is not defined.
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
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Normally buildman runs with 'make -s' meaning that only errors and warnings
appear in the log file. Add a -V option to run make in verbose mode, and
with V=1, causing a full build log to be created.
Signed-off-by: Simon Glass <sjg@chromium.org>
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The site at https://www.kernel.org/pub/tools/crosstool/ is a convenient
repository of toolchains which can be used for U-Boot. Add a feature to
download and install a toolchain for a selected architecture automatically.
It isn't clear how long this site will stay in the current place and
format, but we should be able to rely on bug reports if it changes.
Suggested-by: Marek Vašut <marex@denx.de>
Suggested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
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Some archs have need than one alias, so support a list of alises in the
..buildman file.
Signed-off-by: Simon Glass <sjg@chromium.org>
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We should create a test setting file when running testes, not use whatever
happens to be on the local machine.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Silently ignore this since it is valid to have missing sections.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This file is only partially documented. Add some more details.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Wolfgang Denk <wd@denx.de>
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