summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* tegra: put eMMC environment into the boot sectorsStephen Warren2012-09-07-4/+8
| | | | | | | | | | | | | | | | | When I set up Tegra's config files to put the environment into eMMC, I assumed that CONFIG_ENV_OFFSET was a linearized address relative to the start of the eMMC device, and spanning HW partitions boot0, boot1, general* and the user area in order. However, it turns out that the offset is actually relative to the beginning of the user area. Hence, the environment block ended up in a different location to expected and documented. Set CONFIG_SYS_MMC_ENV_PART=2 (boot1) to solve this, and adjust CONFIG_ENV_OFFSET to be relative to the start of boot1, not the entire eMMC. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* env_mmc: allow environment to be in an eMMC partitionStephen Warren2012-09-07-8/+56
| | | | | | | | | | | | | eMMC devices may have hardware-level partitions: 2 boot partitions, up to 4 general partitions, plus the user area. This change introduces optional config variable CONFIG_SYS_MMC_ENV_PART to indicate which partition the environment should be stored in: 0=user, 1=boot0, 2=boot1, 4..7=general0..3. This allows the environment to be kept out of the user area, which simplifies the management of OS-/user-level (MBR/GPT) partitions within the user area. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* mmc: detect boot sectors using EXT_CSD_BOOT_MULT tooStephen Warren2012-09-07-1/+3
| | | | | | | | | | | | | | | | | Some eMMC devices contain boot partitions, but do not set the PART_SUPPORT bit in EXT_CSD_PARTITIONING_SUPPORT. Allow partition selection on such devices, by enabling partition switching when EXT_CSD_BOOT_MULT is set. Note that the Linux kernel enables access to boot partitions solely based on the value of EXT_CSD_BOOT_MULT; EXT_CSD_PARTITIONING_SUPPORT only influences access to "general" partitions. eMMC devices affected by this issue exist on various NVIDIA Tegra platforms (and presumably many others too), such as Harmony (plug-in eMMC), Seaboard, Springbank, and Whistler (plug-in eMMC). Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Enable NAND on TECThierry Reding2012-09-07-2/+21
| | | | | | | | | This commit enables NAND support on the Tamonten Evaluation Carrier and adds the corresponding device tree nodes. Furthermore, the U-Boot environment can now be stored in NAND. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* cmd_nand: dump: Align data and OOB buffersThierry Reding2012-09-07-2/+2
| | | | | | | | | In order for cache invalidation and flushing to work properly, the data and OOB buffers must be aligned to full cache lines. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: enable NAND on HarmonyStephen Warren2012-09-07-2/+19
| | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Enable NAND on SeaboardSimon Glass2012-09-07-0/+11
| | | | | | | This enables NAND support for the Seaboard. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: nand: Add Tegra NAND driverJim Lin2012-09-07-0/+1287
| | | | | | | | | | | | A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add NAND definitions to fdtSimon Glass2012-09-07-0/+10
| | | | | | | | Add a flash node to handle the NAND, including memory timings and page / block size information. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add NAND controller binding and definitionsSimon Glass2012-09-07-0/+60
| | | | | | | Add a NAND controller along with a bindings file for review. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add NAND support to funcmuxSimon Glass2012-09-07-0/+10
| | | | | | | | Add selection of NAND flash pins to the funcmux. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* nand: Try to align the default buffersSimon Glass2012-09-07-4/+6
| | | | | | | | | | The NAND layer needs to use cache-aligned buffers by default. Towards this goal. align the default buffers and their members according to the minimum DMA alignment defined for the architecture. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Scott Wood <scottwood@freescale.com>
* Merge remote-tracking branch 'u-boot-ti/master' into mAlbert ARIBAUD2012-09-05-69/+256
|\
| * am33xx: Remove redundant timer configTom Rini2012-09-04-20/+0
| | | | | | | | | | | | | | | | | | | | We have the timer code in arch/arm/cpu/armv7/omap-common/timer.c that has been configuring and enabling the timer, so remove our code that does the same thing by different methods. Tested on EVM GP, SK-EVM and Beaglebone. Signed-off-by: Tom Rini <trini@ti.com>
| * OMAP3: mt_ventoux: added video supportStefano Babic2012-09-04-1/+100
| | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * OMAP3: video: add macros to set display parametersStefano Babic2012-09-04-0/+10
| | | | | | | | | | | | | | Add a common macros to set the registers for horizontal and vertical timing. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * video: drop duplicate set of DISPC_CONFIG registerStefano Babic2012-09-04-3/+1
| | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * OMAP3: mt_ventoux: disable the buzzer at start-upStefano Babic2012-09-04-4/+14
| | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * OMAP3: mt_ventoux: read MAC address from EEPROMStefano Babic2012-09-04-0/+16
| | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * OMAP3: mt_ventoux: activate GPIO4Stefano Babic2012-09-04-0/+1
| | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * OMAP3: mt_ventoux: Correct board pinmuxStefano Babic2012-09-04-41/+33
| | | | | | | | | | | | Fix some issues (some pins were not set as GPIOs) Signed-off-by: Stefano Babic <sbabic@denx.de>
| * OMAP3: twister : get MAC address from EEPROMStefano Babic2012-09-04-0/+10
| | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * OMAP3: tam3517: add function to read MAC from EEPROMStefano Babic2012-09-04-0/+66
| | | | | | | | | | | | | | | | The manufacturer delivers the TAM3517 SOM with 4 MAC address. They are stored on the EEPROM of the SOM. The patch adds a function to get their values and set the ethaddr variables. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * OMAP3: add definition of CTRL_WKUP_CTRL registerArnout Vandecappelle (Essensium/Mind)2012-09-04-0/+5
| | | | | | | | | | | | | | | | | | AM/DM37x SoCs add the CTRL_WKUP_CTRL register. It contains the GPIO_IO_PWRDNZ bit, which is required to be set to enable the I/O pads of gpio_126, gpio_127 and gpio_129. Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be> Cc: Tom Rini <trini@ti.com>
* | Merge remote-tracking branch 'u-boot-atmel/master' into mAlbert ARIBAUD2012-09-04-9/+32
|\ \ | |/ |/|
| * Fixes the crippled console output on PortuxG20.Markus Hubig2012-09-04-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to use the serial interface on the PortuxG20 we need to enable the level converter first by setting the PC9 pin to high. The level converter needs some time to settle so we have to use the mdelay() function to wait for some time. Unfortunately we have no timers available at board_early_init_f() so we enable the serial output early within board_postclk_init(). Now the U-Boot output looks fine: | U-Boot 2012.07-00132-gaf1a3b0-dirty (Aug 16 2012 - 18:21:32) | | CPU: AT91SAM9G20 | Crystal frequency: 18.432 MHz | CPU clock : 396.288 MHz | Master clock : 132.096 MHz | DRAM: 64 MiB | WARNING: Caches not enabled | NAND: 128 MiB | In: serial | Out: serial | Err: serial | Net: macb0 | Hit any key to stop autoboot: 0 Signed-off-by: Markus Hubig <mhubig@imko.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * arm: Adds board_postclk_init to the init_sequence.Markus Hubig2012-09-04-0/+3
| | | | | | | | | | | | | | | | | | The board_postclk_init() function can be used to perform operations that requires a working timer early within the U-Boot init_sequence. Signed-off-by: Markus Hubig <mhubig@imko.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * atmel: eb_cpux9k2: add ram target configurationJens Scharsig2012-09-04-2/+8
| | | | | | | | | | | | | | | | * add ram target for EB+CPUx9k2 board (eb_cpux9k2_ram_config) Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * eb_cpux9k2: fix chip selectJens Scharsig2012-09-03-3/+3
| | | | | | | | | | | | | | | | * fix chip select initialization for frame buffer, this will be increase frame buffer access speed Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | integrator: break out common configLinus Walleij2012-09-04-156/+111
|/ | | | | | | | The configuration that is common for all Integrator boards may just as well be stored in a common include file as per pattern from other boards. This eases maintenance quite a bit. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* lsxl: support power switchMichael Walle2012-09-03-1/+21
| | | | | | | | | | | | This patch restores the Linkstation's original behaviour when powering off. Once the (soft) power switch is turned off, linux will reboot and the bootloader turns off HDD and USB power. Then it loops as long as the switch is in the off position, before continuing the boot process again. Additionally, this patch fixes the board function set_led(LED_OFF). Signed-off-by: Michael Walle <michael@walle.cc> Cc: Prafulla Wadaskar <prafulla@marvell.com>
* cosmetic: Better explain how to use the kirkwood kwbimage.cfg file.Karl O. Pinc2012-09-03-3/+14
| | | | | | | | | | | Hi, This adds to the documenation to explain how to use the kwbimage.cfg file necessary to generate an image with prefixed board setup values necessary for the kirkwood boards. Signed-off-by: Karl O. Pinc <kop@meme.com>
* Cosmetic doc typo fixes to the kwbimage feature docsKarl O. Pinc2012-09-03-3/+3
| | | | Signed-off-by: Karl O. Pinc <kop@meme.com>
* arm/km: remove unused codeHolger Brunck2012-09-03-21/+0
| | | | | | | | | | | | For some reasons we had an own implementaion of dram_init and dram_init_banksize. This is not needed anymore, use the standard kirkwood functions instead. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
* arm/km: fix frequency of the SPI NOR FlashValentin Longchamp2012-09-03-1/+1
| | | | | | | | | According to our last HW measures, this could be raised while still compatible with the potential delays on the lines. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
* km/ivm: fix string len check to support 7 char board namesValentin Longchamp2012-09-03-1/+1
| | | | | | | | | | | | | | | The fanless boards now have a 7-digit (XXXXX-F) board name. This triggers a border condition when reading this string in the IVM although this string is smaller than the currenly read string size, but only by 1 character. This patch corrects this by changing the size check condition for string length. It is the same change that was done in the platform for this same bug. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Stefan Bigler <stefan.bigler@keymile.com>
* kw_spi: fix clock prescaler computationValentin Longchamp2012-09-03-2/+4
| | | | | | | | | | | | | | | | | The computation was not correct with low clock values: setting a 1MHz clock would result in an overlap that would then configure a 25Mhz clock. This patch implements a correct computation method according to the kirkwood functionnal spec. table 600 (Serial Memory Interface Configuration Register). Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* km/arm: set SPI NOR Flash default parametersValentin Longchamp2012-09-03-0/+4
| | | | | | | | | | | | | These parameters are used by the the sf probe command that are used by our update script and they therefore need to be set for all of our boards. The timing is the same as for the ENV SPI NOR Flash (since it's the same physical device) and takes the boco2 delay on the bus into account. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
* edminiv2: orion5x: fix GPIO inits and valuesAlbert ARIBAUD2012-09-03-4/+11
| | | | | | | | | Orion5x did not actually write GPIO output values or input polarities, and ED Mini V2 had bad or missing values for GPIO settings. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-By: Prafulla Wadaskar <prafulla@marvell.com>
* Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingWolfgang Denk2012-09-02-6/+8
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | * 'agust@denx.de' of git://git.denx.de/u-boot-staging: tx25: Use generic gpio_* calls config: Always use GNU ld tools: add kwboot binary to .gitignore file fdt: Include arch specific gpio.h instead of asm-generic/gpio.h serial: CONSOLE macro is not used Conflicts: board/karo/tx25/tx25.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * tx25: Use generic gpio_* callsVikram Narayanan2012-08-11-16/+9
| | | | | | | | | | | | | | | | | | | | | | | | Instead of manipulating gpio registers directly, use the calls from the gpio library. Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de> Cc: John Rigby <jcrigby@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * config: Always use GNU ldKhem Raj2012-08-10-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes sure that we always use the GNU ld. U-Boot uses certain construct e.g. OVERLAY which are not implemented in gold therefore it always needs GNU ld for linking. It works well if default linker in toolchain is GNU ld but in some cases we can have gold to be the default linker and also ship GNU ld but not as default in such cases its called $(PREFIX)ld.bfd, with this patch we make sure that if $(PREFIX)ld.bfd exists than we use that for our ld. This way it does not matter what the default ld is. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Khem Raj <raj.khem@gmail.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
| * tools: add kwboot binary to .gitignore fileLuka Perkov2012-08-10-0/+1
| | | | | | | | | | | | Signed-off-by: Luka Perkov <uboot@lukaperkov.net> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
| * fdt: Include arch specific gpio.h instead of asm-generic/gpio.hMichal Simek2012-08-10-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Include arch specific gpio.h instead of asm-generic/gpio.h because several architectures (Microblaze, Blackfin, Nios2, OpenRISC) define gpio functions in header file. asm-generic/gpio.h can be included in arch specific gpio.h (For example: ARM) Signed-off-by: Michal Simek <monstr@monstr.eu> CC: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Simon Glass <sjg@chromium.org>
| * serial: CONSOLE macro is not usedMichal Simek2012-08-10-3/+0
| | | | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | at91: 9x5: Enable PMECC for 5series ek board.Wu, Josh2012-09-01-0/+7
| | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | at91: 9x5: change SMC config timing that both works for PMECC & non-PMECC.Wu, Josh2012-09-01-6/+6
| | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Tested-by: voice.shen@atmel.com Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | at91: atmel_nand: Update driver to support Programmable Multibit ECC controllerWu, Josh2012-09-01-1/+836
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Programmable Multibit ECC (PMECC) controller is a programmable binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller can be used to support both SLC and MLC NAND Flash devices. It supports to generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data. To use PMECC in this driver, the user needs to set the PMECC correction capability, the sector size and ROM lookup table offsets in board config file. This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference is in this version it uses registers structure access hardware instead of using macros. It is tested in 9x5 serial boards. Signed-off-by: Josh Wu <josh.wu@atmel.com> [rebase] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | at91: atmel_nand: remove unused variables.Wu, Josh2012-09-01-2/+1
| | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | at91: atmel_nand: extract HWECC initialization code into one function: ↵Wu, Josh2012-09-01-59/+87
| | | | | | | | | | | | | | | | | | | | | | | | atmel_hw_nand_init_param(). This patch 1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support. 2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail(). Signed-off-by: Josh Wu <josh.wu@atmel.com> [fix empty newline at EOF error and move return value check into ifdef] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
generated by cgit v1.1 at 2024-11-06 12:51:25 +0000