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* arm, davinci: add workaround for not resetting DMA bus and VPSS modulesHeiko Schocher2012-02-12-4/+61
| | | | | | | | | | The Buffer Logic of VPSS is Not Reset by System Reset Pin, see http://www.ti.com/lit/er/sprz316b/sprz316b.pdf chapter Advisory 1.2.1 on page 9. Add workaroundcode proposed in the errata. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com>
* OMAP SPL: Fix missing timer_init() call in OMAP4 s_init()Dechesne, Nicolas2012-02-12-0/+2
| | | | | | | | | | | | In 8775471bb, the call to timer_init() was removed from common code and put in OMAP3 s_init() function. As a result the boot was broken on OMAP4. This patch adds timer_init() in OMAP4 s_init(), that fix boot on all OMAP4 boards. Signed-off-by: Nicolas Dechesne <n-dechesne@ti.com> Tested-by: Robert P. J. Day <rpjday@crashcourse.ca> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <trini@ti.com>
* OMAP3: Add Corscience Tricorder boardThomas Weber2012-02-12-0/+848
| | | | | | | | | Tricorder is a board which is very similar to the Devkit8000. It is designed as a base platform for further medical devices. www.corscience.de/en/medical-engineering/products/multiparameter/mp10-board.html Signed-off-by: Thomas Weber <weber@corscience.de>
* OMAP3: Correct get_sdr_cs_offset maskTom Rini2012-02-12-1/+1
| | | | | | | | | | | | The function get_sdr_cs_offset reads the CS_CFG register in the SDRC to determine where CS1 is mapped to. make_cs1_contiguous() will set CS1 to follow after CS0. The CS_CFG register has values in bits 9:8 and 3:0 but we had erroneously been testing 5:4 and 3:0 resulting in incorrect offsets on platforms with less than 128MB as 3:0 describe 128MB hunks and 9:8 describe 32MB offsets after the 128MB hunk. Tested-by: Grant Erickson <marathon96@gmail.com> Signed-off-by: Tom Rini <trini@ti.com>
* Beagleboard: Correct memory size on rev C4robertcnelson@gmail.com2012-02-12-0/+7
| | | | | | | The logic for the rev C4 boards was missing one of the cases (variant with Micron NAND and 2x128MB). Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
* am3517evm: remove rootfstype kernel parameter for MMC boot deviceYegor Yefremov2012-02-12-2/+1
| | | | | | | it is not necessary to define rootfstype for mass storage devices. Kernel detects it automatically. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
* arm: omap3: Define save_boot_params in lowlevel_init.S for SPL onlyPali Rohár2012-02-12-2/+2
| | | | | | | | Wrap the function save_boot_params with CONFIG_SPL_BUILD. This will allow non-SPL boards to define their own save_boot_params functions in U-Boot itself. Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
* arm, davinci: add PLL0 prediv to da850 lowlevel setupBen Gardiner2012-02-12-1/+9
| | | | | | | | | | | | | | | | The OMAP-L138 has a pre-divider available on PLL0. Add support to da850_lowlevel.c for configuring PLL0's pre-divider. This is to achieve certain OPP's -- e.g. the 372MHz OPP used also by Linux. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Cc: Christian Riesch <christian.riesch@omicron.at> CC: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Christian Riesch <christian.riesch@omicron.at>
* tegra2: Enable data cacheSimon Glass2012-02-12-0/+8
| | | | | | | | | | | | This enables the data cache on Tegra2 boards. As discussed on the list, this is better off in the Tegra2 cpu code than in a particular vendor directory. We should be safe turning on the cache for all Tegra2 boards. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: mmc: Support operation with dcache enabledSimon Glass2012-02-12-0/+16
| | | | | | | | | | | When the data cache is enabled we must flush on write and invalidate on read. We also check that buffers are aligned to data cache lines boundaries. With recent work in U-Boot this should generally be the case but the warnings will catch problems. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Use funcmux for MMC on seaboardSimon Glass2012-02-12-17/+4
| | | | | | | Use the new funcmux_select() feature to set up the MMC pin mux. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Use funcmux for MMC on harmonySimon Glass2012-02-12-15/+4
| | | | | | | Use the new funcmux_select() feature to set up the MMC pin mux. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Use funcmux for MMC on tamontenSimon Glass2012-02-12-8/+2
| | | | | | | Use the new funcmux_select() feature to set up the MMC pin mux. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add SDMMC support to funcmuxSimon Glass2012-02-12-0/+71
| | | | | | | | | This adds support for SDMMC ports to the funcmux. Only one option is supported: FUNCMUXO_SDMMC_8BIT which selects an 8-bit wide SDIO interface where available. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add I2C support to funcmuxSimon Glass2012-02-12-0/+47
| | | | | | | | Add support to funcmux for selecting I2C functions and programming the pinmux appropriately. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add enum to select from available funcmux configsSimon Glass2012-02-12-6/+17
| | | | | | | | | We want to give a name to each available funcmux config. For now we just use the pin group names (even through it is verbose) since there seems to be nothing better. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Adjust funcmux config test to permit expansionSimon Glass2012-02-12-25/+38
| | | | | | | | We want to support config options other than zero, so move the test to the end to allow intermediate code to OK such a config. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add support for Compal Paz00 (Toshiba AC100)Stephen Warren2012-02-12-0/+175
| | | | | | | | | | | | | | | | | | | | The Toshiba AC100 (Compal code-name Paz00, aka Dynabook AZ) is a netbook derived from the NVIDIA Tegra Harmony reference board. It ships with Android, but is often repurposed to run Linux. This patch adds just enough support to get a U-Boot serial console, and the ability access built-in eMMC and the external SD slot. v2: * Rebased on latest HEAD, incorporated changes made to other board files. * Moved board files from board/nvidia to board/compal. * Switched to correct odmdata value. This required add the previous patch to fix U-Boot's interpretation of the odmdata RAM size field. * Removed nvmem= from default Linux kernel command-line; no drivers use the reserved memory yet, so there's no point reserving it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Fix default RAM size selection in odmdataStephen Warren2012-02-12-1/+1
| | | | | | | | | | | | | | | | | A value of 0 in the odmdata RAM size field means default, which is 512MB not 1GB. Fix this. For reference, see: http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=blob;\ f=arch/arm/mach-tegra/odm_kit/query/harmony/tegra_devkit_custopt.h;\ h=1ec7010911454f19a5018952fd245785a62c59ad;\ hb=0e52d7fe25b11a656c376a37890be219470661fb v2: New patch Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Fix conflicting pinmux for UARTAStephen Warren2012-02-12-0/+12
| | | | | | | | | | | | | | | Tegra appears to boot with function UARTA pre-selected on mux group SDB. If two mux groups are both set to the same function, it's unclear which group's pins drive the RX signals into the HW module. For UARTA, SDB certainly overrides group IRTX in practice. To solve this, configure some alternative function on SDB to avoid the conflict. Also, tri-state the group to avoid driving any signal onto it until we know what's connected. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* fw_env.h: fix commentFrans Meulenbroeks2012-02-11-2/+2
| | | | | | | made description according to implementation (where the config file is the default). Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
* Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2012-02-11-0/+23
|\ | | | | | | | | | | * 'master' of /home/wd/git/u-boot/custodians: add STM29F400BB to table of supported legacy flashs * Fix: watchdog timed out, if flash blank (0xFF) blocks
| * Merge branch 'master' of git://git.denx.de/u-boot-cfi-flashWolfgang Denk2012-02-11-0/+23
| |\ | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-cfi-flash: add STM29F400BB to table of supported legacy flashs * Fix: watchdog timed out, if flash blank (0xFF) blocks
| | * add STM29F400BB to table of supported legacy flashsDavid Müller (ELSOFT AG)2012-02-09-0/+20
| | | | | | | | | | | | | | | Signed-off-by: David Mueller <d.mueller@elsoft.ch> Signed-off-by: Stefan Roese <sr@denx.de>
| | * * Fix: watchdog timed out, if flash blank (0xFF) blocksJens Scharsig (BuS Elektronik)2012-02-09-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of cfi_flash uses udelay to reset watchdog. If several blocks are blank (0xff filled) the watchdog timed out. The reason is, udelay is never called, if flash device is ready to fast. e.g. mw.w $(copy_addr) FFFF 10000;cp.b $(copy_addr) 10880000 20000 -> watchdog timed out mw.w $(copy_addr) 0000 10000;cp.b $(copy_addr) 10880000 20000 -> watchdog not timed out This patch adds an extra watchdog reset in front of flash ready check. Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2012-02-11-693/+3085
|\ \ \ | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of /home/wd/git/u-boot/custodians: nand/fsl_elbc: Convert to self-init nand: Introduce CONFIG_SYS_NAND_SELF_INIT nand_spl: store ecc data on the stack mtd/nand: Add ONFI support for FSL NAND controller nand: make 1-bit software ECC configurable nand: Sanitize ONFI strings. nand: Merge changes to BBT from Linux nand driver nand: Merge changes from Linux nand driver nand: cleanup whitespace nand: Add more NAND types from Linux nand driver nand: Merge BCH code from Linux nand driver NAND: Remove additional (CONFIG_SYS)_NAND_MAX_CHIPS NAND: remove NAND_MAX_CHIPS definitions nand_spl_simple: store ecc data on the stack
| * | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2012-02-11-693/+3085
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nand-flash: nand/fsl_elbc: Convert to self-init nand: Introduce CONFIG_SYS_NAND_SELF_INIT nand_spl: store ecc data on the stack mtd/nand: Add ONFI support for FSL NAND controller nand: make 1-bit software ECC configurable nand: Sanitize ONFI strings. nand: Merge changes to BBT from Linux nand driver nand: Merge changes from Linux nand driver nand: cleanup whitespace nand: Add more NAND types from Linux nand driver nand: Merge BCH code from Linux nand driver NAND: Remove additional (CONFIG_SYS)_NAND_MAX_CHIPS NAND: remove NAND_MAX_CHIPS definitions nand_spl_simple: store ecc data on the stack
| | * | nand/fsl_elbc: Convert to self-initScott Wood2012-01-26-5/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver doesn't yet make use of the added flexibility (not that that should stop anyone from converting...), but it will with the in-progress hack to support 4k-page NAND. Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * | nand: Introduce CONFIG_SYS_NAND_SELF_INITScott Wood2012-01-26-37/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows a driver to run code between nand_scan_ident() and nand_scan_tail(), among other things. See the additions to doc/README.nand for details. To allow a gradual transition, Boards that don't set CONFIG_SYS_NAND_SELF_INIT will still be initialized the old way, but new drivers should not require this, and existing drivers should be converted when convenient. Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * | nand_spl: store ecc data on the stackScott Wood2012-01-26-54/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adapt the following patch from spl to nand_spl: Author: Stefano Babic <sbabic@denx.de> Date: Thu Dec 15 10:55:37 2011 +0100 nand_spl_simple: store ecc data on the stack Currently nand_spl_simple puts it's temp data at 0x10000 offset in SDRAM which is likely to contain already loaded data. The patch saves the oob data and the ecc on the stack replacing the fixed address in RAM. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Ilya Yanok <yanok@emcraft.com> CC: Scott Wood <scottwood@freescale.com> CC: Tom Rini <tom.rini@gmail.com> CC: Simon Schwarz <simonschwarzcor@googlemail.com> CC: Wolfgang Denk <wd@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com> While nand_spl is on its way out, in favor of spl, there are still many boards using it, and conversions are gradual. This allows us to get rid of CONFIG_SYS_NAND_ECCSTEPS and CONFIG_SYS_NAND_ECCTOTAL now, which would otherwise be likely to linger unreferenced after a conversion. It also eliminates a temporary error in the hawkboard_nand build, since the spl version of the patch removed ECCSTEPS/TOTAL from hawkboard.h, but the spl conversion is pending (and may be merged via a different tree). Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * | mtd/nand: Add ONFI support for FSL NAND controllerShengzhou Liu2012-01-26-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - fix NAND_CMD_READID command for ONFI detect. - add NAND_CMD_PARAM command to read the ONFI parameter page. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * | nand: make 1-bit software ECC configurableChristian Hitz2012-01-26-1/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The software ECC algorithm is not necessary when hardware ECC is available and can be left out for a smaller image size. Enable with CONFIG_MTD_ECC_SOFT. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * | nand: Sanitize ONFI strings.Christian Hitz2012-01-26-1/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe] This is part of the synchronization with the nand driver to the Linux 3.0 state. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * | nand: Merge changes to BBT from Linux nand driverChristian Hitz2012-01-26-99/+330
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe] This patch synchronizes the nand driver with the Linux 3.0 state. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * | nand: Merge changes from Linux nand driverChristian Hitz2012-01-26-315/+541
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe] This patch synchronizes the nand driver with the Linux 3.0 state. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> [scottwood@freescale.com: minor fixes] Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * | nand: cleanup whitespaceChristian Hitz2012-01-26-74/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bring up to date with corresponding file from linux. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * | nand: Add more NAND types from Linux nand driverChristian Hitz2012-01-26-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe] This patch merges the additional NAND flash types from the 3.0 Linux kernel. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * | nand: Merge BCH code from Linux nand driverChristian Hitz2012-01-26-8/+1788
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [backport from linux commit 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe] This patch merges the BCH ECC algorithm from the 3.0 Linux kernel. This enables U-Boot to support modern NAND flash chips that require more than 1-bit of ECC in software. Signed-off-by: Christian Hitz <christian.hitz@aizo.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * | NAND: Remove additional (CONFIG_SYS)_NAND_MAX_CHIPSScott Wood2012-01-26-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | NAND_MAX_CHIPS has been replaced by CONFIG_SYS_NAND_MAX_CHIPS, and the latter defaults to 1. Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * | NAND: remove NAND_MAX_CHIPS definitionsVladimir Zapolskiy2012-01-26-31/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change follows the change by Wolfgang Grandegger (commit 6c869637fef), which allows to remove useless NAND_MAX_CHIPS definitions in board config files. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Wolfgang Grandegger <wg@grandegger.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| | * | nand_spl_simple: store ecc data on the stackStefano Babic2012-01-26-55/+17
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently nand_spl_simple puts it's temp data at 0x10000 offset in SDRAM which is likely to contain already loaded data. The patch saves the oob data and the ecc on the stack replacing the fixed address in RAM. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Ilya Yanok <yanok@emcraft.com> CC: Scott Wood <scottwood@freescale.com> CC: Tom Rini <tom.rini@gmail.com> CC: Simon Schwarz <simonschwarzcor@googlemail.com> CC: Wolfgang Denk <wd@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2012-02-11-175/+421
|\ \ \ | |/ / | | | | | | | | | | | | | | | * 'master' of /home/wd/git/u-boot/custodians: ARM: AM33XX: Add i2c support ARM: AM33XX: Add AM33XX I2C driver support ARM: I2C: I2C Multi byte address support
| * | ARM: AM33XX: Add i2c supportPatil, Rachna2012-01-23-1/+118
| | | | | | | | | | | | | | | | | | | | | Add i2c driver board hookup for AM335X EVM Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Patil, Rachna <rachna@ti.com>
| * | ARM: AM33XX: Add AM33XX I2C driver supportPatil, Rachna2012-01-23-7/+13
| | | | | | | | | | | | | | | | | | | | | | | | 1. Compliant with Philips I2C specification version 2.1 2. Supports upto 100Kbps in standard mode Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Patil, Rachna <rachna@ti.com>
| * | ARM: I2C: I2C Multi byte address supportPatil, Rachna2012-01-23-173/+296
| |/ | | | | | | | | | | | | | | | | | | Existing OMAP I2C driver does not support address length greater than one. Hence this patch is to add support for 2 byte address read/write. Signed-off-by: Philip, Avinash <avinashphilip@ti.com> Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com> Signed-off-by: Patil, Rachna <rachna@ti.com>
* | README: update (C) entryWolfgang Denk2012-01-19-1/+1
|/ | | | | | | There are tools that automatically extract this information, so better make it up to date. Signed-off-by: Wolfgang Denk <wd@denx.de>
* overo: add SPL supportAndreas Müller2012-01-16-29/+147
| | | | | | | | | | * implementation based on ti beagleboard/omap3evm * timing data and i2c workaround for revision 0 boards taken from x-loader * run-tested with overo revision 0 and 1 / boot from NAND and SDcard * run-tested with x-loader Signed-off-by: Andreas Müller <schnitzeltony@gmx.de> Signed-off-by: Tom Rini <trini@ti.com>
* omap_rev_string: output to stdoutAndreas Müller2012-01-16-17/+11
| | | | | | | | * avoid potential buffer overflows * allow SPL-build not to output "Texas Instruments Revision detection unimplemented" Signed-off-by: Andreas Müller <schnitzeltony@gmx.de> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP SPL: call timer_init in s_init to make udelay work earlierAndreas Müller2012-01-16-2/+2
| | | | Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
* drivers/i2c/omap24xx_i2c.c: move all local variables to SRAMAndreas Müller2012-01-16-4/+9
| | | | | | | | | | | | | At old overo boards TWL4030 RTC irq is connected to gpio112. Unfortunately this pin is also used for revision detection. Therefore we need to send shut-up to TWL4030 to avoid reading wrong revision. In SPL this must be done before SDRAM is set up because the type of SDRAM is revision dependent. By this patch it is ensured that all variables used by omap24xx_i2c.c are located in SRAM. Signed-off-by: Andreas Müller <schnitzeltony@gmx.de> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
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