| Commit message (Collapse) | Author | Age | Lines |
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this enables libfdt code by default for the
freescale mpc8313erdb, mpc832xemds, mpc8349emds,
mpc8349itx and gp boards.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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this adds libfdt support code for the freescale
mpc8313erdb, mpc832xemds, mpc8349emds, mpc8349itx,
and gp boards.
Boards remain compatible with OF_FLAT_TREE.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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also adds common prototypes to include/common.h.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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PCI clocks and QE frequencies weren't being updated, and the core clock
was being updated incorrectly. This patch also adds a /memory node if
it doesn't already exist prior to update.
plus some cosmetic trimming to single line comments.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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and reorder the existing 83xx maintainers alpha.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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Minor path corrections needed to ensure buildability.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Remove a leftover in net/tftp.c while we're at it.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Remove a leftover in net/tftp.c while we're at it.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Commit 073e1b509980cefe6f53c2d7fbbcd135df1e3924 "Fix initrd/dtb
interaction" put the new code outside of the #if defined(CONFIG_OF_LIBFDT)
when it should have gone inside of the conditional. As a result, it
broke non-LIBFDT board builds.
Also added a missing "not." to the comment.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
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Typically this causes scsi init to corrupt the
devlist and break the coninfo command.
Fix a compiler size warning.
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
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Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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When CFG_POST_ETHER_EXT_LOOPBACK is defined, the ethernet POST
is not done using an internal loopback connection, but by assuming
that an external loopback connector is plugged into the board.
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: John Otken <john@softadvances.com>
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This patch was originall provided by David Mitchell <dmitchell@amcc.com>
and fixes a bug in the PLL clock calculation.
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
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Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
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Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
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Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
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Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
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Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
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Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
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This series of patches adds support for 2 boards from Netstal Maschinen.
The HCU4 has a PPC405Gpr and
the HCU5 has a PPC440EPX.
The HCU4 has a somehow complicated flash setup, as the booteprom is
only 8 bits and the CFI 16 bits wide, which makes it impossible to use a more
elegant solution.
The HCU5 has only a booteprom as the whole code will be downloaded from a
different board which has HD, CD-ROM, etc and where all code is stored.
This is my third try. I incorporated all suggestions made by Wolfgang and Stefan.
Thanks them a lot.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
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Signed-off-by: Stefan Roese <sr@denx.de>
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The patch adds support for UART POST on ppc44x-based boards with no
external serial clocks installed.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Acked-by: Stefan Roese <sr@denx.de>
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As suggested by Eugene O'Brien <Eugene.O'Brien@advantechamt.com>,
here an updated Bamboo README.
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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During config transactions on the PCIe bus an attempt to scan for a
non-existent device can lead to a machine check exception with certain
peripheral devices. In order to avoid crashing in such scenarios the
instrumented versions of the config cycle read routines are introduced, so
the exceptions fixups framework can gracefully recover.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
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This brings back separate settings for PCIe bus numbers depending on chip
revision, which got eliminated in 2b393b0f0af8402ef43b25c1968bfd29714ddffa
commit. 440SPe rev. A does NOT work properly with the same settings as for
the rev. B (no devices are seen on the bus during enumeration).
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
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Changed storage type of cfg_simulate_spd_eeprom to const
Changed storage type of gpio_tab to stack storage
(Cannot access global data declarations in .bss until afer code relocation)
Improved SDRAM tests to catch problems where data is not uniquely addressable
(e.g. incorrectly programmed SDRAM row or columns)
Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules
Fixed AM29LV320DT (OpCode Flash) sector map
Signed-off-by: Eugene OBrien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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- Clear ECC status regs after ECC POST test
- Set dcbz for ECC generation with caches enabled as default
- Code cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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new FPGA image for PLU405 board with improved CompactFlash timing
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
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Change Lime SDRAM initialization to now support 100MHz and
133MHz (if enabled). Also the framebuffer is initialized to
display a blue rectangle with a white border.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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The used Intel NOR FLASH chips have internally two dies, and are now
treated as two seperate chips.
Signed-off-by: Stefan Roese <sr@denx.de>
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As suggested by Hakan Eryigit, here an updated setup for the lwmon5
interrupt controller.
Signed-off-by: Stefan Roese <sr@denx.de>
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As spotted by Matthias Fuchs, the default output values for all GPIO1
outputs were not setup correctly. This patch fixes this issue.
Signed-off-by: Stefan Roese <sr@denx.de>
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This patch adds ECC Post test for the Lwmon5 board based
on PPC440EPx to U-Boot.
Signed-off-by: Pavel Kolesnikov <concord@emcraft.com>
Acked-by: Yuri Tikhonov <yur@emcraft.com>
Acked-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Stefan Roese <sr@denx.de>
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