| Commit message (Collapse) | Author | Age | Lines |
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Conflicts:
boards.cfg
Conflict was trivial between goni maintainer change and
lager_nor removal.
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Robert Baldyga will now take care of this board.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Robert Baldyga <r.baldyga@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Since p->bus is unsigned checking for negative values
is optimized away. Since bus is already used as an argument
use tmp. While at it, don't declare variables in the middle
of a function.
cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Since snow has a different memory configuration than peach, split the
configuration between the 5250 and 5420. Exynos 5420 supports runtime
memory configuration detection, and can make the determination between 4
and 7 banks at runtime.
Include the bank size with the number of banks for context to make the
number of banks meaningful.
Signed-off-by: Michael Pratt <mpratt@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Right now USB booting is enabled for Exynos5250 only. Moving all the
configs for USB boot mode from exynos5250-dt.h to exynos5-dt.h in order
to enableUSB booting for all Exynos5 SoCs.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Max footprint for SPL in both Exynos 5250 and 5420 is limited to 14 KB.
For Exynos5250 we need to keep it 14 KB because BL1 supports only fixed
size SPL downloading. But in case of Exynos5420 we need not restrict it
to 14 KB. And also, the SPL size for Exynos5420 is expected to increase
with the upcoming patches and the patches under review right now.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Currently environment resides at the location where BL2 ends.
This may hold good in case there is an empty space at this
position. But what if this place already has a binary or is
expected to have one. To avoid such scenarios it is better
to save environment at the end of the flash.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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While the Exynos5420 chip is used in both Smdk5420 and in the Peach-Pit
line of devices, there could be other boards using the same chip, so a
common configuration file is being added (exynos5420.h) as well
as two common device tree files (exynos54xx.dtsi & exynos5420.dtsi).
The peach board as declared in boards.cfg is a copy of smdk5420
declaration. The configuration files are similar, but define different
default device trees, console serial ports and prompts.
The device tree files for smdk5420 and peach-pit inherit from the same
common file.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Macros defined in exynos5_setup.h specific to SMDK5420
are required for Peach-Pit too. Hence, replacing
CONFIG_SMDK5420 with CONFIG_EXYNOS5420 to enable these
macros for all the boards based on Exynos5420.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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SPI recieve and transfer code in exynos_spi driver has a logical bug.
We read data in a variable which can hold an integer. Then we assign
this integer 32 bit value to another variable which has data type uchar.
Latter represents a unit of our recieve buffer. Everytime when we write
a value to our recieve buffer we step ahead by 4 units when actually we
wrote to one unit. This results in the loss of 3 bytes out of every 4
bytes recieved. This patch intends to fix this bug.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Generic board support is now enabled for Exynos 4, and if any
init function returns an error then the init process is stopped.
This makes a boot issue on the Trats and Trats2 devices. If the device
is supplied by USB cable or an external power supply then it can't boot
because function exynos_power_init returns an error. Now this function
returns 0 if battery is not connected.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Piotr Wilczek <p.wilczek@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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We need to run 'usb start' as preboot command so that ethernet comes up
during u-boot prompt.
Signed-off-by: Tushar Behera <tushar.b@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Up till now goni's configuration has been stored at OneNAND. Since u-boot
itself is now stored at eMMC it is more handy to store envs there as well.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Modify GONI's configuration to utilize THOR downloader.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Sometimes Read DQ and DQS are not in phase. Since, this
phase shift differs from board to board, we need to
calibrate it at DRAM init phase, that's read DQ calibration.
This patch adds SW Read DQ calibration routine to compensate
this skew.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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when CLKM is running. If we stop CLKM when sampling it the glitches
all go away, so we'll do that as per Samsung suggestion.
We also check the "is it locked" bits of PHY_CON13 and loop until they
show the the value sampled actually represents a locked value. It
doesn't appear that the glitching and "is it locked" are related, but
it seems wise to wait until the PHY tells us the value is good before
we use it. In practice we will not loop more than a couple times (and
usually won't loop at all).
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This patch intends to remove all code which enables hardware read
leveling. All characterization environments may not cope up with
h/w read leveling enabled, so we must disable this.
Also, disabling h/w read leveling improves the MIF LVcc value
(LVcc value is the value at which DDR will fail to work properly).
Improving LVcc means we have enough voltage margin for MIF.
When h/w leveling is enabled, we have almost zero volatge margin.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Passing fewer arguments is better and mem_iv_size is never
used. Let's keep only one argument and make it cleaner.
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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This reverts commit eb0dd9986c3883820ff888c3738b013c0a7d918c.
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During bootm/z, U-Boot relocates the DTB and initrd to high memory so
they are out of the way of the kernel. On ARM at least, some parts of
high memory are "highmem" and can't be accessed at early boot. To solve
this, we need to restrict this relocation process to use lower parts of
RAM that area accessible.
For the DTB, an earlier patch of mine set CONFIG_SYS_BOOTMAPSZ. However,
since some platforms have different restrictions on DTB and initrd
location, that config option doesn't affect the initrd. We need to set
the initrd_high environment variable to control the initrd relocation.
Since we have carefully chosen the load addresses for the DTB and
initrd (see comments in include/configs/tegraNNN-common.h re: values in
MEM_LAYOUT_ENV_SETTINGS), we don't actually need any DTB or initrd
relocation at all. Skipping relocation removes some redundant work.
Hence, set both fdt_high and initrd_high to ffffffff which completely
disables relocation.
If the user does something unusual, such as using custom locations for
the DTB/initrd load address or wanting to use DTB/initrd relocation for
some reason, they can simply set these variables to custom values to
override these environment defaults.
With this change, cmd_sysboot works correctly for a filesystem created
by the Fedora installer.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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extlinux.conf is stored in /boot/extlinux/extlinux.conf rather than
/boot/extlinux.conf. Adjust Tegra's default boot scripts to use the
correct location. This change aligns Tegra's boot scripts with rpi_b.h
and also the location that the Fedora installer actually puts the file.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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cc: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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The calling code seems a bit in doubt about the return
value of fdtdec_lookup_phandle. Since it returns a negative
value on error (and fdt_node_offset_by_phandle as well),
check for that.
cc: Wei Ni <wni@nvidia.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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The u-boot Overo board actually supports both Overo (OMAP35xx)
and Overo Storm (AM/DM37xx) COMs with a range of different expansion
boards. This provides a mechanism to select the an appropriate device
tree file based on the processor version and, if available, the
expansion board ID written on the expansion board EEPROM. To match the
3.15+ kernels, fdtfile names have this format:
"omap3-overo[-storm]-<expansion board name>.dtb"
By default, we use "omap3-overo-storm-tobi.dtb".
Signed-off-by: Ash Charles <ashcharles@gmail.com>
Conflicts:
include/configs/omap3_overo.h
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Fix a trivial copy-paste bug.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
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gpmc timeout is disabled and the reset counter
is set to 0. However, if later a driver activates
the timeout setting the reset to a valid value,
the old reset value with zero is still valid
for the first access. In fact, the timeout block
loads the reset counter after a successful access.
Found on a am335x board with a FPGA connected
to the GPMC bus together with the NAND.
When the FPGA driver in kernel activates
the timeout, the system hangs at the first access
by the NAND driver.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
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AM437x Starter Kit has a qspi flash and gbit ethernet
support. By muxing those signals, we can use those
interfaces from u-boot.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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pass correct PHY Address when running on SK
so that we have working ethernet with this board
too.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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AM43xx Starter Kit is a new board based on
AM437x line of SoCs. Being a low-cost EVM and
small size EVM are intended to provide an entry
level development platform on a full fledged
Hardware System.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Signed-off-by: Felipe Balbi <balbi@ti.com>
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when porting u-boot to a new am43xx board, it
helps to know the name of the current unsupported
board so we don't have to hunt for design documents
to figure out what's written in the EEPROM.
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Move AEMIF driver to drivers/memory/ti-aemif.c along with AEMIF
definitions collected in arch/arm/include/asm/ti-common/ti-aemif.h
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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The definitions inside emif_defs.h concern davinci nand driver and
should be in it's header. So create header file for davinci nand
driver and move definitions from emif_defs.h and nand_defs.h to it.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
[trini: Fixup more davinci breakage]
Signed-off-by: Tom Rini <trini@ti.com>
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Signed-off-by: Ash Charles <ashcharles@gmail.com>
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If CONFIG_(NAND|NOR|ONENAND) is not defined, no configuration is set
for GPMC on chip select #0---size is 0. In this case, the GPMC
configuration should be reset but not enabled. Enabling causes the
Gumstix DuoVero board to hang when entering Linux.
Signed-off-by: Ash Charles <ashcharles@gmail.com>
[trini: Switch to testing base as GPMC_SIZE_256M is 0x0]
Signed-off-by: Tom Rini <trini@ti.com>
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With CONFIG_SYS_GENERIC_BOARD the board hangs after issuing a 'save' command.
Remove CONFIG_SYS_GENERIC_BOARD until this issue can be fixed properly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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commit 67a04ab3ab8522a3a34491853e46105317580df5
fix the build for MX25. The same error
happens for VF610 SOC.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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According to:
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/log/?h=imx_v2009.08_3.0.35_4.1.0
ENGR00287268 mx6: fix the secure boot issue on the new tapout chip
commit 424cb1a79e9f5ae4ede9350dfb5e10dc9680e90b
newer i.MX6 silicon revisions have an updated ROM and HAB API table.
Please see also:
i.MX Applications Processors Documentation
Engineering Bulletins
EB803, i.MX 6Dual/6Quad Applications Processor Silicon Revsion 1.2 to 1.3 Comparison
With this change the secure boot status is correctly displayed
Signed-off-by: Stefano Babic <sbabic@denx.de>
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Explain the necessary steps in order to boot from SPI NOR.
Based on a earlier submission from Mårten Wikman.
Signed-off-by: Mårten Wikman <marten.wikman@novia.fi>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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Introduce 'mx28evk_spi' target which will store the environment variables
into SPI NOR, which is useful when booting from SPI NOR.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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When building a target with CONFIG_ENV_IS_IN_SPI_FLASH the following
warning is seen:
include/configs/mx28evk.h:73:0: warning: "CONFIG_ENV_SIZE" redefined [enabled by default]
Protect the definition of CONFIG_ENV_SIZE to avoid the warning.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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The name of the dtb file used in the kernel is 'imx6dl-riotboard.dtb', so fix
it accordingly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Iain Paton <ipaton0@gmail.com>
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mars and riot boards use UART2 as console, so CONFIG_CONSOLE_DEV should point
to 'ttymxc1' instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Iain Paton <ipaton0@gmail.com>
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Commit e9fd66defd7e (ARM: mx6: define CONFIG_ARM_ERRATA_742230) enables
errata 742230 for imx6, because it helps remove one reboot issue.
However, this errata does not really apply on imx6, because Cortex-A9
on imx6 is r2p10 while the errata only applies to revisions r1p0..r2p2.
At a later time, commit f71cbfe3ca5d (ARM: Add workaround for Cortex-A9
errata 794072) adds support of errata 794072, which applies to all
Cortex-A9 revisions. As the workaround for both errata are exactly
same, it makes a lot more sense to select 794072 instead of 742230 for
imx6. Since we already enable 794072 for imx6, it's time to drop
errata 742230 to avoid confusion.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Nitin Garg <nitin.garg@freescale.com>
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Signed-off-by: Marek Vasut <marex@denx.de>
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mx6 reference manual incorrectly states that the DEVICE_TYPE field of
IOMUXC_GPR12 register should be configured as '0010' for setting the PCI
controller in RC mode. The correct value should be '0100' instead.
This also aligns with the same value used in the mx6 pci kernel driver.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
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