| Commit message (Collapse) | Author | Age | Lines |
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Since the mx6ul 9x9 evk has different DDR size with 14x14 evk, change
to use the half of PHYS_SDRAM_SIZE for mtest end.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 59e52b92b38a6d387477595eb049aae30328cbce)
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MMDC auto power saving timer can NOT be too small,
as enter/exit auto self-refresh mode too frequently
may introduce too many latency for MMDC access,
set it to 0x10, same as previous value on i.MX6.
Signed-off-by: Anson Huang <b20788@freescale.com>
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We meet reset failure on mx6ul 9x9 evk. The internal reset logic between MMDC and
functional modules seems relate with the issue.
Turn off the LCDIF to stop DDR access before reset to avoid this possible internal
reset problem.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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The lpddr2 memsize of mx6ul_9x9_evk is 256MB, not 512M, so
the CS0_END should be 0x47, but not 0x4F.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 70ba74f0e7ab55f1e17370a5ace81f59d3520949)
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Disable PFuze3000 low power mode during standby mode, otherwise,
if the power consumption exceed the threshold, PFuze will reboot.
Signed-off-by: Anson Huang <b20788@freescale.com>
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Add new build target: mx6ul_9x9_evk_qspi1_config
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 48ca4c49de6d2519e023e99d1d18e7b731a73324)
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i.MX6UL-9x9-EVK board has PFUZE3000, so enable LDO
bypass support for this board.
Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit f432dfdaeb80ecb2a78805422baef64493f63060)
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Since the i.MX6ul 9x9 evk board only has 256MB LPDDR2, while the
CMA size used in kernel configuration is 320MB, so we have to set
another value for the 9x9 evk board.
This patch sets the cma=96M bootargs to in uboot. So the kernel will
overwrite to use the new value.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 6b7a3a917e1d231eecf55226922373ce038255ff)
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The i.mx6ul 9x9 EVK shares the same base board with 6ul 14x14 EVK
with two main changes on CPU board:
1. Change to use pfuze 3000.
2. Use 256MB LPDDR2 memory.
This patch uses a macro CONFIG_6UL_9X9_LPDDR2 to distinguish the changes above,
basing on 14x14 EVK board level codes.
The new build target for the 9x9 EVK: mx6ul_9x9_evk_config
Signed-off-by: Ye.Li <B37916@freescale.com>
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This pin is missed to change in patch:
"MLK-11230 imx6: USB: Modify OTG ID pin pad setting to pull up"
Should set it to pull down at default.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit ccef4600bf6dab04ee778c457f4d59c2a750cad9)
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For USB boot, eg, mfgtool programming case, some laptops/pcs
may not work properly if the board do not disconnect until
linux kernel usb driver initialization process, finishes the
ROM code connection at u-boot can fix this problem, and this
was the original work flow when mfgtool flow was introduced at
u-boot.
Tested-by: Spring Zhang <b17931@freescale.com>
Tested-by: Zhang Sanshan <b51434@freescale.com>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add disconnect_from_pc API which is used to disconnect the connection
with PC which is established at rom code.
Tested-by: Spring Zhang <b17931@freescale.com>
Tested-by: Zhang Sanshan <b51434@freescale.com>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add disconnect_from_pc API which is used to disconnect the connection
with PC which is established at rom code.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Set the ID pin pad to pull up not the pull down at default, otherwise
we can't enter the device mode, but always detect as host.
After this change we have to use portA cable to play as host,
and use portB cable for device.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 1f0cbe2b52b1ed7832a2f9c48950522f7b0fb6e8)
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1. Add weimnor boot defconfig
2. move CONFIG_FSL_USDHC and CONFIG_VIDEO to board header
3. Add CONFIG_SYS_FLASH_PROTECTION for mx6ul 14x14 lpddr2 arm2
4. correct CONFIG_SYS_FLASH_SECT_SIZE and CONFIG_SYS_MAX_FLASH_SECT
5. Add comments for setup_eimnor, since ENET2_RXER pin conflicts
with ENET2. Also eimnor support will disable SD1/SD2, need ENET
to boot kernel and nfs using enet. So setup_eimnor should be
invoked after setup_fec
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit b8760a10e7f55d50572fbb07ecc2608074a0051d)
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The current pad DSE for QSPI is 60ohm. Per hardware team measurement,
this setting cause too strong drive to clock and data signals. Need
to change the DSE to 120ohm for better signal quality.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 60586dcec668e5b863a21d7ca69a0325f405d6da)
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Add MX6UL LPDDR2 ARM2 board BSP codes, supported peripherals:
SD1, eMMC(USDHC2), USB OTG1, I2C, ENET2, PMIC.
Due to a board issue, the SD1 only supports 1 bit bus width.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit c0fc92d28b133ddf053f39635cc9f745224f8111)
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Create a new head file mx6ul_arm2.h, and move the common settings of
MX6UL ARM2 boards to this file.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit d307893d5c62ba6f4172e526d4193c4c97b3fba6)
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Abstracted the CSF size in imximage from a hardcoded value to a config
setting CONFIG_CSF_SIZE. This configuration is only enabled for secure
boot.
Increased the size of the CSF default allocation to 0x4000. This size
covers the event the worst case of 4906-bits keys.
(cherry picked from commit 50198ddbb3f8b34f9d4fc881a34dcd1715b1d61d)
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From temp sensor guys:
"
I confirmed the math with him(had do the accuracy study) today.
The new, final equation is:
Tmeas = (Nmeas - n1) / slope + t1 + offset
n1= fused room count
t1= 25
offset=3.580661
slope= 0.4148468 – 0.0015423*n1
"
87723f903454aaf17336e0fe9098ea7911c19f3c update the thermal with not
accurate slope parameters. This patch fix it.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 0d4904f5929cecd66f0b60cf8ebdcb0e6a2f733e)
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The SW1AB on PMIC is used for ARM_SOC_IN supply, set the standby voltage to
0.975V to save power when system is in DSM mode.
Signed-off-by: Bai Ping <b51503@freescale.com>
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Enable fastboot command "fastboot flash data"
Custom may need to update data partition in fastboot mode.
This patch enable flash data partition in emmc\sd.
Signed-off-by: Zhang Sanshan <b51434@freescale.com>
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enable fastboot command: "fastboot reboot-bootloader"
After type this command, the board will reboot to bootloader mode.
Set ANDROID_FASTBOOT_BOOT flag in SNVS_LPGPR before reboot.
Signed-off-by: Zhang Sanshan <b51434@freescale.com>
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Remove epdc qos settings from plugin.S, since set_epdc_qos does same thing.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 4f6bc939db723669d1f897f8abca5277b5f674b7)
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Add missed Kconfig files for mx7d_12x12_ddr3_arm2 board.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 681f076d7b19a2c7e133910719c6d5437351ea76)
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Fix build warning:
common/lcd.c: In function 'lcd_clear':
common/lcd.c:166:6: warning: variable 'bg_color' set but not used [-Wunused-but-set-variable]
int bg_color;
^
common/lcd.c: In function 'lcd_setmem':
common/lcd.c:296:2: warning: format '%d' expects argument of type 'int', but argument 2 has type 'u_long' [-Wformat=]
debug("LCD panel info: %d x %d, %d bit/pix\n", panel_info.vl_col,
^
common/lcd.c:296:2: warning: format '%d' expects argument of type 'int', but argument 3 has type 'u_long' [-Wformat=]
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit a6fe3f84dbc5fa2ced362bbaa32bae1ac9934207)
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We should divide the 1000MHz ENET PLL clock by 10 in order to achieve
100MHz, so fix the divider accordingly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
(cherry picked from commit f75fba3a63f23ef980a98c4072f38d71fbd6fdba)
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Add aboot.o based on CONFIG_FASTBOOT
Add partition index for fastboot ptn table
Add return value for write_sparse_image to know the sparse write status
Add path to write_sparse_image based on the image received and partition to be flashed
Signed-off-by: guoyin.chen <guoyin.chen@freescale.com>
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We should use board_spi_cs_gpio and remove the GPIO from
CONFIG_SF_DEFAULT_CS.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 4209e0a4d324a99511a85dfe1fb3107518ff02c4)
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We should not put the GPIO in CONFIG_SF_DEFAULT_CS
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 2accd8a3cd743ae033528ae30a65f742447583c3)
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Since the 6ul does not enable the CONFIG_LDO_BYPASS_CHECK, but have
to use the set_wdog_reset function. Need to move the funciton out of
CONFIG_LDO_BYPASS_CHECK to resolve build issue.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 9ea395d7ea6b8ed65d7d68a92d9832264872b447)
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When using watchdog timeout in kernel, the reset does not output the
WDOG_B signal, so the power supply won't be reset. To solve the problem,
we enable it in u-boot.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit d9a363da27c2fe7999ec4de869c81e357f67fa33)
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The mx6ul ddr3 arm2 board needs rework to enable the emmc. Since the pin
used by emmc are multiplexed with SD1 and QSPI, the SD1 and QSPI can't work.
The u-boot build target for emmc is: mx6ul_14x14_ddr3_arm2_emmc_config
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 4b27bdc4a8311f3234e1e91e3858e8a1c19d1cf2)
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For nand boot, the mtdpart info are needs to load kernel and rootfs.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit b2702aaec81b26ca947533b48ddbbeaca5ce7c35)
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Configure the PMIC_STBY_REQ pin as open drain 100K according to
the design team's requirement for the PMIC_STBY_REQ pin.
Signed-off-by: Bai Ping <b51503@freescale.com>
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Update the DDR script for i.MX7D 12x12 LPDDR3 ARM2 board and
i.MX7D 19x19 LPDDR3 ARM2 board to file "7D_lpddr3_0_3.ds5"
Updated items:
Changes DRAMTMG2 WR2RD from 7 to 8.
Compass link for this script:
http://compass.freescale.net/livelink/livelink?func=ll
&objid=233861153&objAction=browse&sort=name
Test results:
Passed overnight test on two MX7D 12x12 LPDDR3 ARM2 board
Passed overnight test on one MX7D 19x19 LPDDR3 ARM2 board
Signed-off-by: Ye.Li <B37916@freescale.com>
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Since directory name changed, need to change it in imximage.cfg, or
we will get "Can't stat board/freescale/mx6ulevk/plugin.bin".
Since this commit 7331a4cc0853722b4c3addf1927a2797f39f5de2
missed to update ddr, here update the plugin code.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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updated DDR Script of 6UL EVK Board to avoid a calibration error
when using “DDR_Stress_Tester_V1.04.exe”.
Updated items:
[Modified] setmem /32 0x020E027C = 0x00000008
[Modified] setmem /32 0x020E0280 = 0x00000038
[Modified] setmem /32 0x021B080C = 0x00070007
[Added ] setmem /32 0x021B0858 = 0x00000F00
The script versions of EVK board and Validation Board from the following link:
http://compass.freescale.net/livelink/livelink?func=ll&objId=234191407&obj
Action=browse&viewType=1
Test Results:
Tested on two boards, both passed overnight memtester stress test.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Since the flash blocks are locked at default , need to set
"CONFIG_SYS_FLASH_PROTECTION" to unlock them before write/erase.
The patch also add the pinmux for LBA (ADV) pin and set eimnor enabled at
default.
Signed-off-by: Ye.Li <B37916@freescale.com>
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1. There is conflict when building secure boot, because some common
codes for MPC are included by using same configuration. So modify the
makefile to get rid of them.
2. The 6UL arch config is missed in hab.h. Fix this issue by using
the CONFIG_ROM_UNIFIED_SECTIONS.
Signed-off-by: Ye.Li <B37916@freescale.com>
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There is a hole in shadow registers address map of size 0x100
between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL.
Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses,
we should account for this hole in address space.
Similar hole exists between bank 14 and bank 15 of size
0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX.
Note: iMX6SL has only 0-7 banks and there is no hole.
Note: iMX6UL doesn't have this one.
When reading, we use register offset, so need to account for holes
to get the correct address.
When writing, we use bank/word index, there is no need to account
for holes, always use bank/word index from fuse map.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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i2c_pad_info3's i2c index should 2, but not 1. Correct it.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add SION bit for all i2c pin mux settings.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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This patch is to support Bus Encryption Engine(BEE) for i.MX 6UL.
Supported feature:
1. SNVS key and soft key
2. CTR and ECB mode
3. Specify address region to bee.
Two commands are included:
bee init [key] [mode] [start] [end] - BEE block initial
"Example: bee init 1 1 0x80000000 0x80010000\n"
bee test [region]
"Example: bee test 1\n"
Mapping:
[0x10000000 - (0x10000000 + size - 1)] : [start - (start + size - 1)]
[0x30000000 - (0x30000000 + IRAM_SIZE - 1)] : [IRAM_BASE_ADDR -
(IRAM_BASE_ADDR + IRAM_SIZE - 1)]
Whatever start is, start - (start + size -1) will be fixed mapping to
0x10000000 - (0x10000000 + size - 1)
Since default AES region's protected size is SZ_512M, so
on mx6ul evk board, you can not simply run 'bee init', it will
overlap with uboot execution environment, you can use
'bee init 0 0 0x80000000 0x81000000'.
If want to use bee, Need to define CONFIG_CMD_BEE in board configuration
header file, since CONFIG_CMD_BEE default is not enabled.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Since there is another 9x9 package for mx6ul, modify the BSP names
of ddr3 arm2 board and evk board to add 14x14 package info.
Also modify the loaded dtb file to align with kernel.
After the change, the build target for mx6ul ddr3 arm2 board is:
mx6ul_14x14_ddr3_arm2_config
and the build target for mx6ul evk board is:
mx6ul_14x14_evk_config
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add the default TSOP NAND support and build target.
New build target for nand boot: mx7d_19x19_lpddr3_arm2_nand_config
Signed-off-by: Ye.Li <B37916@freescale.com>
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On mx7d 12x12 lpddr3 arm2 board, POR_B reset in uboot will fail stress
reset test, and hangs in rom code. Rom log buffer show thats wrong
hab_image_entry and runs into serial download mode. Also there is no
time delay reset circuit for this board.
We found when disable CONFIG_VIDEO, all seems fine. Actually,
only the following piece of code can make stress reset ok,
"
writel(LCDIF_CTRL1_VSYNC_EDGE_IRQ, ®s->hw_lcdif_ctrl1_clr);
while (--timeout) {
if (readl(®s->hw_lcdif_ctrl1) & LCDIF_CTRL1_VSYNC_EDGE_IRQ)
break;
udelay(1);
}
"
Here we use lcdif_power_down API which is better to shutdown lcdif same as
the way used in arch_preboot_os.
Implement reset_misc for mx7, since it does not hurt for others boards.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Include fb.h in mxsfb.h.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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On MX7D, boot rom can provide some boot information such as boot device,
arm freq, axi freq, etc. (see the structure below)
Offset Byte4 | Byte3 | Byte2 | Byte1
0x0 Reserved | Boot Device Type | Boot Device Instance | Reserved
0x4 ARM core frequency(in Hz)
0x8 AXI bus frequency(in Hz)
0x0C DDR frequency(in Hz)
0x10 GPT1 input clock frequency(in Hz)
0x14 Reserved
0x18
0x1C
The boot information can be accessed by get the pointer at 0x1E8. This patch
changes the u-boot to use the new approach. When manufacture boot, the info
recorded is the actual SD port, not the failed device.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Set wdog WCR register SRS bit to turn off internal reset signal WDOG_RESET_B_DEB
for mx7d. So that the warm reset is disabled.
Signed-off-by: Ye.Li <B37916@freescale.com>
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