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* tegra: Remove unnecessary CONFIG_SYS_NAND_BASESimon Glass2012-11-19-5/+0
| | | | | | | | Now that we are using the new CONFIG_SYS_NAND_SELF_INIT setup, we don't need CONFIG_SYS_NAND_BASE. Punt it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: enable 8-bit SD slots in board filesStephen Warren2012-11-19-9/+6
| | | | | | | | | | | | | | | | | | | | Harmony contains an SD slot with all 8 bits routed. This allows plugging in an eMMC-chip-in-SD-form-factor. Seaboard/Springbank/Ventana/AC100 all have an eMMC chip with all 8 bits hooked up. Now that the U-Boot eMMC code fully supports 8-bit operation, initialize those ports as 8-bit instead of 4-bit to improve performance. Whistler was already registering its ports as 8-bit. TrimSlice doesn't have any 8-bit ports. I don't have any Avionic Design boards nor the Colibri board to test with. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* mmc: tegra: support 4-bit operation too on 8-bit slotsStephen Warren2012-11-19-3/+4
| | | | | | | | | If a board has all 8 data lines routed, the SD/MMC controller can still operate in 4-bit (or presumably even 1-bit) mode. Adjust Tegra's MMC driver to report the 4-bit capability even for 8-bit slots. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: add CONSOLE_MUX support to tegra-kbcAllen Martin2012-11-19-1/+17
| | | | | | | | | | | Add support for CONSOLE_MUX to tegra-kbc driver. This requires adding a flag to struct keyb to know the driver has already been initialized so if we try to initialize it again we can just return success. Also call into iomux_doenv() from drv_keyboard_init to re-evaluate the stdin string. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: TrimSlice: add support for USB1 portStephen Warren2012-11-19-1/+11
| | | | | | | | | | | | TrimSlice's USB1 port has two purposes; it either acts as a device port hosting Tegra's USB recovery protocol, or acts as a host port connected to the internal USB->SATA bridge chip, which may in turn be connected to an SSD or HDD. Add the appropriate device tree and board configuration options to enable this port as a host port, and route the port to the SATA bridge using the VBUS GPIO. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Enable display/lcd support on SeaboardMayuresh Kulkarni2012-11-19-2/+11
| | | | | | | | Enable the Seaboard's 16-bit LCD and use it as the console. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* lcd: Add CONFIG_CONSOLE_SCROLL_LINES option to speed consoleSimon Glass2012-11-19-5/+23
| | | | | | | | | | | | When the cursor position gets to the end of the LCD console we normally scroll by one line. This adds an option to increase that value. Console scrolling is often slow, and if a large amount of output is being sent, increasing this option to 10 or so will speed things up considerably. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add LCD definitions for SeaboardSimon Glass2012-11-19-0/+33
| | | | | | | | The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled by one of the PWMs. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Support control of cache settings for LCDSimon Glass2012-11-19-0/+11
| | | | | | | | Add support for selecting the required cache mode for the LCD: off, write-through or write-back. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Align LCD frame buffer to section boundarySimon Glass2012-11-19-0/+3
| | | | | | | | | For tegra we want to enable the cache for the LCD. This is easier if we can avoid using L2 page tages, so align the LCD to a section boundary. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* lcd: Add support for flushing LCD fb from dcache after updateSimon Glass2012-11-19-9/+57
| | | | | | | | This provides an option for the LCD to flush the dcache after each update (puts, scroll or clear). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* lcd: Add CONFIG_LCD_ALIGNMENT to select frame buffer alignmentSimon Glass2012-11-19-5/+29
| | | | | | | | | | | | The normal alignment is PAGE_SIZE, but if this is defined, we can support other alignments. The motivation for this change is to make the display section-aligned on ARM so that we can easily turn off data caching for the frame buffer region without resorting to level 2 page tables. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* arm: Add control over cachability of memory regionsSimon Glass2012-11-19-11/+82
| | | | | | | | | | | | | | Add support for adjusting the L1 cache behavior by updating the MMU configuration. The mmu_set_region_dcache_behaviour() function allows drivers to make these changes after the MMU is set up. It is implemented only for ARMv7 at present. This is needed for LCD support, where we want to make the LCD frame buffer write-through (or off) rather than write-back. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add LCD support to Nvidia boardsSimon Glass2012-11-19-0/+19
| | | | | | | Add calls to the LCD driver from Nvidia board code. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add LCD driverSimon Glass2012-11-19-0/+369
| | | | | | | | This driver supports driving a single LCD and providing a U-Boot console on it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add SOC support for display/lcdWei Ni2012-11-19-0/+1109
| | | | | | | | | | | | | | Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add support for PWMSimon Glass2012-11-19-0/+184
| | | | | | | | The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add LCD definitions for TegraSimon Glass2012-11-19-0/+225
| | | | | | | | | | | | | | | | | | Add LCD definitions and also a proposed binding for LCD displays. The PWM is as per what will likely be committed to linux-next soon. The displaymode binding comes from a proposal here: http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html The panel binding is new, and fills a need to specify the panel timings and other tegra-specific information. Should a binding appear that allows the pwm to handle this automatically, we can revisit this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fdt: Add pwm binding and nodeSimon Glass2012-11-19-0/+25
| | | | | | | | | This binding will apparently soon be in linux-next. Bring it in now since we need to do something, and may as well try to target what Linux will have. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add display support to funcmuxSimon Glass2012-11-19-0/+37
| | | | | | | Add support for a default pin mapping for display1. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Use const for pinmux_config_pingroup/table()Simon Glass2012-11-19-4/+4
| | | | | | | | | These two functions don't actually modify their arguments so add a const keyword. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* pxa: Disable dcache on palmld, palmtc, zipitz2Simon Glass2012-11-19-0/+9
| | | | | | | | | These platforms don't include dcache support. Define CONFIG_SYS_DCACHE_OFF so that functions don't try to call non-existent routines like flush_dcache_range(). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* EXYNOS5: Enable SPI booting.Rajeshwari Shinde2012-11-15-3/+35
| | | | | | | This patch enables SPI Booting for EXYNOS5 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: Enable SPIHatim RV2012-11-15-1/+25
| | | | | | | | | This patch enables SPI driver for EXYNOS5. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SPI: Add SPI Driver for EXYNOS.Rajeshwari Shinde2012-11-15-0/+446
| | | | | | | | | | | | | | This patch adds SPI driver for EXYNOS. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: jy0922.shim@samsung.com Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: Add base address for SPIHatim RV2012-11-15-0/+6
| | | | | | | | | Add base address definition for SPI device on Exynos. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: Add clock for SPIHatim RV2012-11-15-0/+126
| | | | | | | | | | | Add api to calculate and set the clock for SPI channels Signed-off-by: James Miller <jamesmiller@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: Add pinmux support for SPIRajeshwari Shinde2012-11-15-0/+56
| | | | | | | | | This patch adds pinmux support for SPI channels Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK5250: Enable SoundRajeshwari Shinde2012-11-15-0/+8
| | | | | | | | | This patch enables sound support for EXYNOS5 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: Add clock for I2SRajeshwari Shinde2012-11-15-0/+153
| | | | | | | | | This patch adds clock support for I2S Signed-off-by: R. Chandrasekar <rcsekar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: Add I2S base addressRajeshwari Shinde2012-11-15-0/+3
| | | | | | | | | This patch adds base address for I2S Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Chander Kashyap <chander.kashyap@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: Add pinmux for I2SRajeshwari Shinde2012-11-15-0/+14
| | | | | | | | This patch adds pinmux support for I2S1 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: Add parameters required by I2SRajeshwari Shinde2012-11-15-0/+44
| | | | | | | | | This patch adds the audio parameters required by the I2S to play the predefined audio data. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: Add I2S registersRajeshwari Shinde2012-11-15-0/+66
| | | | | | | | | This patch add I2S registers Signed-off-by: R. Chandrasekar <rcsekar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Sound: Add command for audio playbackRajeshwari Shinde2012-11-15-0/+97
| | | | | | | | | | | This patch adds command to test audio playback. sound init - Initialises the audio subsystem (i2s and wm8994 codec) sound play - Plays predefined the audio data when specified length and frequency. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SOUND: Add WM8994 codecRajeshwari Shinde2012-11-15-0/+1179
| | | | | | | | | This patch adds driver for audio codec WM8994 Signed-off-by: R. Chandrasekar <rcsekar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SOUND: SAMSUNG: Add I2S driverRajeshwari Shinde2012-11-15-0/+823
| | | | | | | | | This patch adds driver for I2S interface specific to samsung. Signed-off-by: R. Chandrasekar <rcsekar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* exynos4: universal_C210: add display supportPiotr Wilczek2012-11-15-0/+179
| | | | | | | | | | | This patch add support for display on Universal C210 board. Width of displyed logo must be not bigger than 480 pixel and is limited by width of the screen. Tizen logo size is 520x120 pixels and should be resized. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* drivers: video: fix image positionPiotr Wilczek2012-11-15-2/+13
| | | | | | | | | This patch fixes image position on screen when images's height or width is biger then the lcd's. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* drivers: video: Add ld9040 video driverPiotr Wilczek2012-11-15-0/+177
| | | | | | | Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* misc:max8998 Add LDO macrosPiotr Wilczek2012-11-15-0/+2
| | | | | | | | Add LDO7 and LDO17 macros to max8998_pmic.h necessary to power on the LCD. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* exynos4: universal_C210: use software SPIPiotr Wilczek2012-11-15-18/+90
| | | | | | | | This patch use software spi on Samsung Universal C210 board. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* s3c64xx: fix the compiler error and warningMinkyu Kang2012-11-15-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is fixing the following errors s3c64xx.c:175: error: variable 's3c64xx_serial_drv' has initializer but incomplete type s3c64xx.c:176: error: unknown field 'name' specified in initializer s3c64xx.c:176: warning: excess elements in struct initializer s3c64xx.c:176: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:177: error: unknown field 'start' specified in initializer s3c64xx.c:177: warning: excess elements in struct initializer s3c64xx.c:177: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:178: error: unknown field 'stop' specified in initializer s3c64xx.c:178: warning: excess elements in struct initializer s3c64xx.c:178: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:179: error: unknown field 'setbrg' specified in initializer s3c64xx.c:179: warning: excess elements in struct initializer s3c64xx.c:179: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:180: error: unknown field 'putc' specified in initializer s3c64xx.c:180: warning: excess elements in struct initializer s3c64xx.c:180: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:181: error: unknown field 'puts' specified in initializer s3c64xx.c:181: warning: excess elements in struct initializer s3c64xx.c:181: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:182: error: unknown field 'getc' specified in initializer s3c64xx.c:182: warning: excess elements in struct initializer s3c64xx.c:182: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c:183: error: unknown field 'tstc' specified in initializer s3c64xx.c:183: warning: excess elements in struct initializer s3c64xx.c:183: warning: (near initialization for 's3c64xx_serial_drv') s3c64xx.c: In function 's3c64xx_serial_initialize': s3c64xx.c:188: warning: implicit declaration of function 'serial_register' s3c64xx.c: At top level: s3c64xx.c:191: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'struct' Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Marek Vasut <marex@denx.de>
* ARM: arm1176: Define arch_cpu_init() for s3c64xxAshok Kumar Reddy2012-11-15-1/+27
| | | | | | | | arch_cpu_init() is removed from cpu level to SOC level for arm1176 in commit 4ea6d6b,the same is done for s3c64xx Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK5250: Config: Enable MAX77686 pmic chipRajeshwari Shinde2012-11-15-0/+9
| | | | | | | This patch enables MAX77686 pmic chip for SMDK5250. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* PMIC: MAX77686: Add support for MAX77686Rajeshwari Shinde2012-11-15-0/+201
| | | | | | | | | | This patch adds driver and register definitions for PMIC chip MAX77686. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* dm: wdt: Move s5p watchdog timer to drivers/watchdog/Marek Vasut2012-11-15-1/+1
| | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: David Müller <d.mueller@elsoft.ch> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: Clock: Add common function for pll rate calculationMinkyu Kang2012-11-15-64/+38
| | | | | | | | Moved the common code to calculate pll clock rate to new function exynos_get_pll_clk(). Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
* ARCH: EXYNOS: add support to match product idMinkyu Kang2012-11-15-0/+9
| | | | | | | | Based upon single SoC there can be multiple variants. This patch add support to match the complete product ID. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
* arm: trats: Power down core 1Piotr Wilczek2012-11-15-0/+4
| | | | | | | | This patch turns power down for unused core 1 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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