summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* ARMV7: OMAP: Add board revision detection for OveroSteve Sakoman2010-09-08-3/+35
| | | | | | | | | | | The latest Overo COM modules encode their revision number on GPIOs 115, 113, and 112. All boards to date have no pullups on these pins and hence appear as revision 0. This patch reads and prints the revision information. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP: Add mpurate boot arg for Overo and BeagleSteve Sakoman2010-09-08-0/+6
| | | | | | | | | Allows one to set the processor clock rate via "setenv mpurate 720" for example Default is set to a "safe" 500 Mhz. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP: Enable input driver on Overo's MMC1_CLK and MMC3_CLK pinmux setupSteve Sakoman2010-09-08-2/+2
| | | | | | | | This patch modifies the pinmux setup for MMC1_CLK and MMC3_CLK to enable the input driver. MMC2_CLK was already properly configured. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP: add convenience function to set TWL4030 regulator voltagesSteve Sakoman2010-09-08-39/+44
| | | | | | | | | | | This patch adds a function to allow one to easily set the target voltage for the TWL4030 regulators. It also modifies the existing code to use this new function. Applicable definitions are moved out of the driver file and into the header file so that they are generally accessible Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP: Move syslib.c to omap-common since it can be shared by OMAP3 ↵Steve Sakoman2010-09-08-3/+5
| | | | | | | | | | and OMAP4 The functions in syslib.c can be shared, so this patch moves it from cpu/omap3 to cpu/omap-common Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2010-09-07-7/+7
|\
| * MIPS: update the MIPS u-boot.ldsXiangfu Liu2010-09-04-7/+7
| | | | | | | | | | | | | | | | | | | | From the document, if set all arguments in "OUTPUT_FORMAT" to "tradbigmips", then even add "-EL" to gcc we still get EB format. pb1x00 is only used in Little-endian, so its default endian should be set to LE. Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-09-07-9/+25
|\ \
| * | ppc4xx: Invalidate d-cache when used as init-ramStefan Roese2010-09-03-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | We need to invalidate the data cache after it has been used as init-ram. This problem was detected on the lwmon5 update. Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Fix 440EPx bug in reconfigure_pll()Stefan Roese2010-09-03-9/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a bug in reconfigure_pll(), where the detection of the current bootstrap option is wrong. The ICS bits where incorrectly shifted. This bug was found on the lwmon5 board, which uses bootstrap option H (I2C bootstrap EEPROM). Additionally a bit of code was moved into the if statement, since its only used after later on. No need to run this code all the time. Also, a few empty lines are added to make the code better readable. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Rupjyoti Sarmah <rsarmah@amcc.com> Cc: Victor Gallardo <vgallardo@appliedmicro.com>
| * | ppc4xx: Fix APC405 board supportMatthias Fuchs2010-09-03-0/+1
| |/ | | | | | | | | | | | | | | Opps, after a long time I tested recent u-boot on our APC405 board. This simple fix makes networking work again. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk2010-09-07-123/+162
|\ \
| * | sh: Update lowlevel_init.S of mpr2Nobuhiro Iwamatsu2010-08-30-4/+4
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of ms7750seNobuhiro Iwamatsu2010-08-30-7/+12
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of ms7720seNobuhiro Iwamatsu2010-08-30-14/+16
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Add support do_bdinfo functionNobuhiro Iwamatsu2010-08-30-0/+19
| | | | | | | | | | | | | | | | | | | | | SH did not support do_bdinfo fuction. This code based avr32 stuff. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of ap325rxaNobuhiro Iwamatsu2010-08-30-0/+1
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of r2dplusNobuhiro Iwamatsu2010-08-30-3/+6
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of espt-gigaNobuhiro Iwamatsu2010-08-30-20/+26
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of sh7763rdpNobuhiro Iwamatsu2010-08-30-2/+2
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of MigoRNobuhiro Iwamatsu2010-08-30-5/+5
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of sh7785lcrNobuhiro Iwamatsu2010-08-30-31/+23
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of rsk7203Nobuhiro Iwamatsu2010-08-30-37/+48
| |/ | | | | | | | | | | Update data address size and fix typo of register. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | Merge branch 'next' of git://git.denx.de/u-boot-niosWolfgang Denk2010-09-07-7/+11
|\ \
| * | nios2: fix out of reach case for do_resetThomas Chou2010-08-19-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a limitation (or bug?) of nios2 toolchain. The nios2 gcc didn't generate correct code when the reset vector is passed as a constant. It just generated a direct "call", which was wrong when the reset vector was not located in the same 256MB span as u-boot. The "Nios II Processor Reference Handbook" said, "call can transfer execution anywhere within the 256 MByte range determined by PC31..28. The Nios II GNU linker does not automatically handle cases in which the address is out of this range." So we have to use registered "callr" instruction to do the job. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | nios2: fix bootm error on fdt argsThomas Chou2010-08-19-1/+1
| |/ | | | | | | | | | | | | | | We should check argv[3] only if there are enough args. Otherwise, it might cause invalid memory access fault. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2010-09-07-624/+452
|\ \
| * | edminiv2: add I2C support using mvtwsi driverAlbert Aribaud2010-08-30-0/+11
| | | | | | | | | | | | | | | | | | Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar<prafulla@marvell.com> Acked-by: Heiko Schocher<hs@denx.de>
| * | i2c: rewrite mvtwsi, support orion5x and kirkwoodAlbert Aribaud2010-08-30-409/+341
| | | | | | | | | | | | | | | | | | | | | | | | | | | This rewrite of the mvtwsi driver is 25% smaller and much faster and simpler than the previous code. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar<prafulla@marvell.com> Acked-by: Heiko Schocher<hs@denx.de>
| * | i2c: rename kirkwood_i2c to mvtwsiAlbert Aribaud2010-08-30-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This driver is not kirkwood-specific and can also be used e.g. by orion5x. Rename to a SoC-neutral name. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar<prafulla@marvell.com> Acked-by: Heiko Schocher<hs@denx.de>
| * | suen3: remove CONFIG_HARD_I2C and related definesAlbert Aribaud2010-08-30-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | These are not used on this board, which uses soft I2C instead. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar<prafulla@marvell.com> Acked-by: Heiko Schocher<hs@denx.de>
| * | CMD_I2C: make alen=0 workReinhard Meyer2010-08-26-10/+7
| | | | | | | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * | omap2: i2c: remove redundant header definitionsNishanth Menon2010-08-23-106/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the register offset and common defines which are already present in drivers/i2c/omap24xx.h. All of these defines carry the same value even. Cc: Steve Sakoman <steve@sakoman.com> Cc: Heiko <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Wolfang Denk <wd@denx.de> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Steve Sakoman <steve@sakoman.com>
| * | omap2: i2c: add syss offsetNishanth Menon2010-08-23-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP2420 ES2.3 trm defines syss register offset as 0x10. Add it. Cc: Steve Sakoman <steve@sakoman.com> Cc: Heiko <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Wolfang Denk <wd@denx.de> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Steve Sakoman <steve@sakoman.com>
| * | i2c: omap2+: change header guard to be genericNishanth Menon2010-08-23-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Make the header guard to be generic to stop conflicting with omap2 i2c header file arch/arm/include/asm/arch-omap24xx/i2c.h Cc: Steve Sakoman <steve@sakoman.com> Cc: Heiko <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Wolfang Denk <wd@denx.de> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Steve Sakoman <steve@sakoman.com>
* | powerpc/8xxx: Fix dma for 36bit addressingYork Sun2010-08-31-2/+6
| | | | | | | | | | | | | | Use more bits to support 36-bit addressing Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Fix parameters to support RDIMM for P2020DSYork Sun2010-08-31-2/+3
| | | | | | | | | | Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | fdt: call fdt_parent_offset fewer times while translating addressesScott Wood2010-08-19-37/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fdt_parent_offset() is an expensive operation, so we'd like to reduce unnecessary calls to it. Further, the practice of iterating up to the root if address/size cells aren't found was apparently done for Linux for compatibility with certain buggy Open Firmware implementations, and U-Boot inherited the code. The compliant behavior is to treat a missing #address-cells as 2, and a missing #size-cells as 1 -- never looking anywhere but the immediate parent of the node of interest. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpx85xx/fdt: Add cpu-release-addr for all coresMatthew McClintock2010-08-19-7/+8
| | | | | | | | | | | | | | | | We currently do not add a cpu-release-addr for core 0, this is needed when we want to reset core 0 and later restart it from Linux Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/83xx: Fix build issue with ve8313 board due to lbus changesKumar Gala2010-08-19-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We get two build errors: fsl_elbc_nand.c: In function 'fsl_elbc_run_command': fsl_elbc_nand.c:231: error: 'fsl_lbc_t' has no member named 'lsor' make[1]: *** [/work/wd/tmp-ppc/drivers/mtd/nand/fsl_elbc_nand.o] Error 1 and ve8313.c: In function 'initdram': ve8313.c:104: error: expected '=', ',', ';', 'asm' or '__attribute__' before '*' token ve8313.c:104: error: 'lbc' undeclared (first use in this function) ve8313.c:104: error: (Each undeclared identifier is reported only once ve8313.c:104: error: for each function it appears in.) ve8313.c:104: error: 'immap_t' has no member named 'lbus' make[1]: *** [ve8313.o] Error 1 make: *** [board/ve8313/libve8313.a] Error 2 Due to changes to unifiy local bus struct definitions. Reported-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Fix SRIO LAW setup on corenet_ds boardsLian Minghuan2010-08-19-22/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | In function board_early_init_r(), serdes will not be initialize yet. Thus sRIO was always considered disabled. Move the check for sRIO into misc_init_r() which is called after fsl_serdes_init(). Also, fixed warning associated with gur variable possibly not being used. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Lian Minghuan <B31939@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/8xxx: Fix quad-rank DIMMs support on corenet_ds board.york2010-08-19-2/+18
| | | | | | | | | | | | | | | | | | The board specific parameters associated with quad rank dimms where missing. This fixes it so the board will function if quad rank dimms are placed in it. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/85xx: Rename Security Engine Job Queue to Job Ring to match docsKumar Gala2010-08-19-11/+11
| | | | | | | | | | | | | | | | Official docs call it the Job Ring not Job Queue for the p4080 security block. Match the docs to reduce confusion. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/8xxx: share PIC defines among 85xx and 86xxKim Phillips2010-08-19-16/+19
|/ | | | | | | | | | fixes breakeage introduced by commit a37c36f4e70bada297f281b0e542539ad43e50f6 "powerpc/8xxx: query feature reporting register for num cores on unknown cpus" Reported-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/masterWolfgang Denk2010-08-18-24/+1116
|\
| * ARM: Update ARM mach-typesSandeep Paulraj2010-08-18-24/+1116
| | | | | | | | | | | | This patch updates the mach-types.h based on the latest linux kernel Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips.Philippe De Muyter2010-08-18-8/+25
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I have "ported" U-boot to a in house made board with Numonyx Axcell P33/P30 256-Mbit 65nm flash chips. After some time :( searching for bugs in our board or soft, we have discovered that those chips have a small but annoying bug, documented in "Numonyx Axcell P33/P30 256-Mbit Specification Update" It states : When customer uses [...] block unlock, the block lock status might be altered inadvertently. Lock status might be set to either 01h or 03h unexpectedly (00h as expected data), which leads to program/erase failure on certain blocks. A working workaround is given, which I have applied and tested with success : Workaround: If the interval between 60h and its subsequent command can be guaranteed within 20us, Option I is recommended, otherwise Option II (involves hardware) should be selected. Option I: The table below lists the detail command sequences: Command Data bus Address bus Remarks Sequence 1 90h Block Address Read Lock Status 2 Read Block Address + 02h (2)(3) (1) 3 60h Block Address (2)(3) (1) Lock/Unlock/RCR Configuration 4 D0h/01h/03h Block Address Notes: (1) Block Address refers to RCR configuration data only when the 60h command sequence is used to set RCR register combined with 03h subsequent command. (2) For the third and fourth command sequences, the Block Address must be the same. (3) The interval between 60h command and its subsequent D0h/01h/2Fh/03h commands should be less than 20us. And here is a log comparison of a simple (destructive) flash test without and with the workaround. diff without-numonyx-workaround.log with-numonyx-workaround.log -U-Boot 2010.06-00696-g22b002c-dirty (Aug 16 2010 - 15:07:47) +U-Boot 2010.06-00696-g22b002c-dirty (Aug 16 2010 - 15:25:19) CPU: Freescale MCF5484 CPU CLK 200 MHz BUS CLK 100 MHz Board: Macq Electronique ME2060 I2C: ready DRAM: 64 MiB FLASH: 32 MiB In: serial Out: serial Err: serial Net: FEC0, FEC1 -> flinfo Bank # 1: CFI conformant FLASH (16 x 16) Size: 32 MB in 259 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x8922 Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 5 ms, buffer size: 1024 bytes Sector Start Addresses: FE000000 RO FE008000 RO FE010000 RO FE018000 RO FE020000 RO FE040000 RO FE060000 RO FE080000 RO FE0A0000 RO FE0C0000 RO ... FFF80000 RO FFFA0000 RO FFFC0000 RO FFFE0000 RO -> protect off all Un-Protect Flash Bank # 1 ................... done -> erase all Erase Flash Bank # 1 ................... done -> cp.b 1000000 fe000000 2000000 -Copy to Flash... Flash not Erased +Copy to Flash... done -> Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: Cleanup flash_print_info()Stefan Roese2010-08-18-24/+27
| | | | | | | | | | | | | | | | | | | | | | | | | This patch does the following: - Extract code to detect if sector is erased into function sector_erased(). - Because of this, we don't have variable declarations inside the sector loop in flash_print_info() - Change "return" to "break" in the "if (ctrlc()) statement: This fixes a problem with the resulting output. Before this patch the output was: Sector Start Addresses: FC000000 FC020000 FC040000 => With this patch it is now: Sector Start Addresses: FC000000 FC020000 FC040000 => Signed-off-by: Stefan Roese <sr@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Wolfgang Denk <wd@denx.de>
* Fix printing & reading of 16-bit CFI device identifiersPhilippe De Muyter2010-08-18-4/+7
| | | | | | | | | | | | | | Fix reading and printing of CFI flashes 16-bit devices identifiers Nowadays CFI flashes have a 16-bit device identifier. U-boot still print them and read them as if they were only 8-bit wide. Fix that. Before: Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x1B After: Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x881B Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: flinfo: allow user interrupt in flash print info fnKim Phillips2010-08-18-0/+2
| | | | | | | flashes getting larger, users more impatient. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Stefan Roese <sr@denx.de>
generated by cgit v1.1 at 2024-11-04 18:05:57 +0000