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* powerpc/p3041: Add various p3041 related definesKumar Gala2010-07-20-1/+9
| | | | | | | | | | | There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added p3041 to cpu_type_list and SVR list * Added number of LAWs for p3041 * Set CONFIG_MAX_CPUS to 4 for p3041 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p5020: Add various p5020 related defines (and p5010)Kumar Gala2010-07-20-1/+12
| | | | | | | | | | | There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added p5020 & p5010 to cpu_type_list and SVR list * Added number of LAWs for p5020 * Set CONFIG_MAX_CPUS to 2 for p5020 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/mpc85xx: Report FMAN # to match user manualEmil Medve2010-07-20-1/+1
| | | | | | | The user manual refers to FMAN1 and FMAN2 not 0 and 1. Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p4080: Add setting of clock-frequency for clockgen nodeKumar Gala2010-07-20-0/+5
| | | | | | | | On QorIQ CoreNet based devices we have a global clocking block. We want to keep track of SYSCLK frequency as it is what is used to derive all other frequencies in the SoC Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Use fdt_node_offset_by_compat_reg for clock-frequency updatesKumar Gala2010-07-20-8/+11
| | | | | | | Move to using fdt_node_offset_by_compat_reg to find the node offsets we want to update instead of using aliases. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliasesKumar Gala2010-07-20-162/+121
| | | | | | | | | | | Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fdt: Add fdt_node_offset_by_compat_reg helperKumar Gala2010-07-20-0/+29
| | | | | | | | | | | Given a compatible string and physical address try and find a node that matches. This is useful when we want to find a specific device node to update (for example if we have multiple PCI nodes we can use the physical address to distinguish them when trying to update the device tree). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
* fdt: Add fdt_translate_address to convert reg node to cpu phys addrKumar Gala2010-07-20-0/+265
| | | | | | | | | | | | | This code is extracted out of the Linux Kernel code from arch/powerpc/kernel/prom_parse.c. We maintain some of the same structure to support multiple bus types even though we only have one in the current code. In the future we might want to translate across a PCI bus and thus it will be easier to add that functionality back in. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
* powerpc/86xx: Rename PCI1/2 to PCIE1/2 on MPC8641HPCN & SBC8641Kumar Gala2010-07-20-138/+136
| | | | | | | | The MPC8641 boards actually only have PCIE not PCI. Rename so we are uniform with regards to names so we can replace this code with templated code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/86xx: Move PCI/PCIe address defines into common immap_86xx.hKumar Gala2010-07-20-16/+21
| | | | | | | | Remove dupliacted setting of PCI/PCIe address and offsets in board config.h. Renamed CONFIG_SYS_PCI1/2_ADDR to CONFIG_SYS_PCI1/2ADDR on MPC8641 boards since its really PCIE controllers and not PCI. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Move PCI/PCIe address defines into common immap_85xx.hKumar Gala2010-07-20-49/+20
| | | | | | | Remove dupliacted setting of PCI/PCIe address and offsets in board config.h. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-videoWolfgang Denk2010-07-17-4/+4
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| * video: cleanup comments in cfb_console.c and video_fb.hAnatolij Gustschin2010-07-17-4/+4
| | | | | | | | Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | Drop support for GTH boardWolfgang Denk2010-07-17-2432/+2
|/ | | | | | | | | | | | | | | The board maintainer states: The GTH board is obsolete and has not been manufactured for several years. To my knowledge, no recent U-Boot build has been tested on that card. So drop support for this board. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Thomas Lange <thomas@corelatus.se> Acked-by: Thomas Lange<thomas@corelatus.se>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-07-16-1355/+2370
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| * powerpc/85xx: Move p1022ds slot code into board fileKumar Gala2010-07-16-70/+69
| | | | | | | | | | | | | | | | The code to map SERDES configs to slot names is board specific and not chip specific. Thus it should live in board/freescale/p1022ds/ and not in arch/powerpc/cpu/. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * ppc/85xx: Convert MPC8536DS to using board common ICS307 codeKumar Gala2010-07-16-157/+6
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * ppc/85xx: Convert MPC8572DS to using board common ICS307 codeKumar Gala2010-07-16-153/+7
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add command to report errata workaroundsKumar Gala2010-07-16-3/+55
| | | | | | | | | | | | | | | | | | Add 'errata' command to report what errata we workaround. Report workaround for erratum SATA-A001 on P1022/P1013. Also sorted the CONFIG_CMD_* list. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc: add support for the Freescale P1022DS reference boardTimur Tabi2010-07-16-0/+1184
| | | | | | | | | | | | | | | | | | | | | | | | | | Specifics: 1) 36-bit only 2) Booting from NOR flash only 3) Environment stored in NOR flash only 4) No SPI support 5) No DIU support Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx/p1_p2_rdb: PCIe E1000 card support added.Poonam Aggrwal2010-07-16-0/+1
| | | | | | | | | | | | | | | | Enables the Intel Pro/1000 PT Gb Ethernet PCI-E Network Adapter configuration support for P1/P2 RDB. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fsl: add LAW target to fsl_pci_info structureTimur Tabi2010-07-16-8/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | Add the LAW target (enum law_trgt_if) to the fsl_pci_info structure, so that we can capture the LAW target for a given PCI or PCIE controller. Also update the SET_STD_PCI_INFO and SET_STD_PCIE_INFO macros to assign the LAW_TRGT_IF_PCI[E]_x macro to the LAW target field of the structure. This will allow future PCI[E] code to configure the LAW target automatically, rather than requiring each board to it for each PCI controller separately. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add support for link stack & STAC on e5500Kumar Gala2010-07-16-1/+3
| | | | | | | | | | | | | | | | The e5500 has a link register stack and segment target address cache. Its safe to enable these bits on older e500 cores as the bits are implemented in the register. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add recognition of e5500 coreKumar Gala2010-07-16-10/+18
| | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc 83xx/85xx: Merge lbc upmconfig codeBecky Bruce2010-07-16-127/+53
| | | | | | | | | | | | | | | | | | | | Each platform had its own version of the upmconfig, despite the init process being identical. Now that we have a spot for common lbc code, create a common upmconfig() there. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * mpc85xx: Add reginfo commandBecky Bruce2010-07-16-0/+41
| | | | | | | | | | | | | | | | The new command dumps the TLBCAM, the LAWs, and the BR/OR regs. Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fsl_law.c: Add print_laws() for FSL_CORENET platforms.Becky Bruce2010-07-16-0/+6
| | | | | | | | | | | | | | Add printing of LAWBARH/LAWBARL for FSL_CORENET platforms. Signed-off-by: Becky Bruce <Beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * drivers/misc/fsl_law.c: Rearrange code to avoid duplicationBecky Bruce2010-07-16-77/+49
| | | | | | | | | | | | | | | | The current code redefines functions based on FSL_CORENET_ vs not - create macros/inlines instead that hide the differences. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * mpc85xx: Add print_tlbcam() functionBecky Bruce2010-07-16-0/+21
| | | | | | | | | | | | | | This dumps out the contents of TLB1 on 85xx-based systems. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * mpc85xx: tlb.c cleanupsBecky Bruce2010-07-16-26/+25
| | | | | | | | | | | | | | | | | | | | | | Extract the operation to read a tlb into a function - we will need this later to print out the tlbs, and there's no point in duplicating the code. Create a TSIZE_TO_BYTES macro to deal with the conversion from the MAS field to an actual size instead of duplicating this in code. There are a few misc other minor cleanups. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 83xx/85xx/86xx: LBC register cleanupBecky Bruce2010-07-16-500/+318
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc: Update configs to properly set FSL_ELBCBecky Bruce2010-07-16-0/+6
| | | | | | | | | | | | | | | | | | | | | | Some parts that have an Enhanced Local Bus Controller weren't setting CONFIG_FSL_ELBC. Fix this so we can use this define properly going forward (currently it's only used if PHYS_64BIT is set, which meant not all platforms needed to have it set correctly). Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx/p1_p2_rdb: enable hwconfigPoonam Aggrwal2010-07-16-0/+2
| | | | | | | | | | Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * Move ICS CLK chip frequency calculation code into a common board libraryKumar Gala2010-07-16-160/+124
| | | | | | | | | | | | | | | | | | | | | | | | We have several boards that use the same ICS307 CLK chip to drive the System clock and DDR clock. Move the code into a common location so we share it. Convert the P2020DS board as the first to use the new common ICS307 code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Timur Tabi <timur@freescale.com>
| * ppc/85xx: Add a structure defn for PIXIS registersKumar Gala2010-07-16-1/+183
| | | | | | | | | | | | | | | | | | | | | | | | | | The various boards that have PIXIS FPGAs have slightly different register definitions, however there is some common functionality (like reset, ICS307 clk control, etc) that can be shared. The struct definition exists for MPC8536DS, MPC8544DS, MPC8572DS, MPC8610HPCD, and MPC8641HPCN boards. Also fixed ngpixis to be __packed__ instead of aligned. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/8xxx: Add is_core_disabled to remove disabled cores from dtbKumar Gala2010-07-16-7/+50
| | | | | | | | | | | | | | If we explicitly disabled a core remove it from the dtb we pass on to the kernel. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * mpc8xxx: Remove cpu-handles for cpus we deleteKumar Gala2010-07-16-6/+30
| | | | | | | | | | | | | | We may have cpu-handles pointing to the cpu nodes we delete. If so we should delete the handles as well. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/8xxx: Add base support for the SEC4Kim Phillips2010-07-16-1/+47
| | | | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/8xxx: Distinguish between incompatible SEC h/w typesKim Phillips2010-07-16-4/+11
| | | | | | | | | | | | | | | | | | CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x. Parts with newer SEC h/w versions will increment the number to accomodate incompatible code changes. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fdt: move fsl specific code from common fdt area to mpc8xxx/fdt.cKim Phillips2010-07-16-132/+138
| | | | | | | | | | Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-pxaWolfgang Denk2010-07-15-14/+2379
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| * | PXA: ZipitZ2 supportMarek Vasut2010-07-14-0/+625
| | | | | | | | | | | | | | | | | | This patch adds support for Aeronix Zipit Z2 handheld. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | PXA: Toradex Colibri PXA270 supportMarek Vasut2010-07-14-0/+480
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | PXA: Voipac PXA270 SupportMarek Vasut2010-07-14-0/+816
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the Voipac PXA270 board. The support includes: - Ethernet - USB - MMC - NOR Booting - OneNAND Booting - LCD - HDD Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Scott Wood <scottwood@freescale.com>
| * | PXA: Add support for LMS285GF05 into pxafbMarek Vasut2010-07-14-0/+34
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | Voipac PXA270 LCD SupportMarek Vasut2010-07-14-0/+33
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | PXA: Add OneNAND booting support to start.SMarek Vasut2010-07-14-5/+43
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | PXA: Add PWM2 and PWM3 regs to pxa-regs.hMarek Vasut2010-07-14-1/+9
| | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | PXA: Add hardware init helper macrosMarek Vasut2010-07-14-0/+324
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds macros for the following purposes: - GPIO configuration - SDRAM configuration - Wakeup - Clock configuration - Interrupt controller configuration These macros are intended to replace numerous copies of the same code. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
| * | Enable PXAFB for PXA27X and PXA3XXMarek Vasut2010-07-14-8/+15
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